fs_bigLITTLE.py revision 12476
1# Copyright (c) 2016-2017 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabor Dozsa 37# Andreas Sandberg 38 39# This is an example configuration script for full system simulation of 40# a generic ARM bigLITTLE system. 41 42 43import argparse 44import os 45import sys 46import m5 47import m5.util 48from m5.objects import * 49 50m5.util.addToPath("../../") 51 52from common import SysPaths 53from common import CpuConfig 54from common.cores.arm import ex5_big, ex5_LITTLE 55 56import devices 57from devices import AtomicCluster, KvmCluster 58 59 60default_kernel = 'vmlinux4.3.aarch64' 61default_disk = 'aarch64-ubuntu-trusty-headless.img' 62default_rcs = 'bootscript.rcS' 63 64default_mem_size= "2GB" 65 66def _to_ticks(value): 67 """Helper function to convert a latency from string format to Ticks""" 68 69 return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value)) 70 71def _using_pdes(root): 72 """Determine if the simulator is using multiple parallel event queues""" 73 74 for obj in root.descendants(): 75 if not m5.proxy.isproxy(obj.eventq_index) and \ 76 obj.eventq_index != root.eventq_index: 77 return True 78 79 return False 80 81 82class BigCluster(devices.CpuCluster): 83 def __init__(self, system, num_cpus, cpu_clock, 84 cpu_voltage="1.0V"): 85 cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D, 86 devices.WalkCache, devices.L2 ] 87 super(BigCluster, self).__init__(system, num_cpus, cpu_clock, 88 cpu_voltage, *cpu_config) 89 90class LittleCluster(devices.CpuCluster): 91 def __init__(self, system, num_cpus, cpu_clock, 92 cpu_voltage="1.0V"): 93 cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D, 94 devices.WalkCache, devices.L2 ] 95 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, 96 cpu_voltage, *cpu_config) 97 98class Ex5BigCluster(devices.CpuCluster): 99 def __init__(self, system, num_cpus, cpu_clock, 100 cpu_voltage="1.0V"): 101 cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D, 102 ex5_big.WalkCache, ex5_big.L2 ] 103 super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock, 104 cpu_voltage, *cpu_config) 105 106class Ex5LittleCluster(devices.CpuCluster): 107 def __init__(self, system, num_cpus, cpu_clock, 108 cpu_voltage="1.0V"): 109 cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I, 110 ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ] 111 super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock, 112 cpu_voltage, *cpu_config) 113 114def createSystem(caches, kernel, bootscript, disks=[]): 115 sys = devices.SimpleSystem(caches, default_mem_size, 116 kernel=SysPaths.binary(kernel), 117 readfile=bootscript) 118 119 sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master) 120 for r in sys.mem_ranges ] 121 122 sys.connect() 123 124 # Attach disk images 125 if disks: 126 def cow_disk(image_file): 127 image = CowDiskImage() 128 image.child.image_file = SysPaths.disk(image_file) 129 return image 130 131 sys.disk_images = [ cow_disk(f) for f in disks ] 132 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img)) 133 for img in sys.disk_images ] 134 for dev in sys.pci_vio_block: 135 sys.attach_pci(dev) 136 137 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary) 138 139 return sys 140 141cpu_types = { 142 "atomic" : (AtomicCluster, AtomicCluster), 143 "timing" : (BigCluster, LittleCluster), 144 "exynos" : (Ex5BigCluster, Ex5LittleCluster), 145} 146 147# Only add the KVM CPU if it has been compiled into gem5 148if devices.have_kvm: 149 cpu_types["kvm"] = (KvmCluster, KvmCluster) 150 151 152def addOptions(parser): 153 parser.add_argument("--restore-from", type=str, default=None, 154 help="Restore from checkpoint") 155 parser.add_argument("--dtb", type=str, default=None, 156 help="DTB file to load") 157 parser.add_argument("--kernel", type=str, default=default_kernel, 158 help="Linux kernel") 159 parser.add_argument("--disk", action="append", type=str, default=[], 160 help="Disks to instantiate") 161 parser.add_argument("--bootscript", type=str, default=default_rcs, 162 help="Linux bootscript") 163 parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(), 164 default="timing", 165 help="CPU simulation mode. Default: %(default)s") 166 parser.add_argument("--kernel-init", type=str, default="/sbin/init", 167 help="Override init") 168 parser.add_argument("--big-cpus", type=int, default=1, 169 help="Number of big CPUs to instantiate") 170 parser.add_argument("--little-cpus", type=int, default=1, 171 help="Number of little CPUs to instantiate") 172 parser.add_argument("--caches", action="store_true", default=False, 173 help="Instantiate caches") 174 parser.add_argument("--last-cache-level", type=int, default=2, 175 help="Last level of caches (e.g. 3 for L3)") 176 parser.add_argument("--big-cpu-clock", type=str, default="2GHz", 177 help="Big CPU clock frequency") 178 parser.add_argument("--little-cpu-clock", type=str, default="1GHz", 179 help="Little CPU clock frequency") 180 parser.add_argument("--sim-quantum", type=str, default="1ms", 181 help="Simulation quantum for parallel simulation. " \ 182 "Default: %(default)s") 183 return parser 184 185def build(options): 186 m5.ticks.fixGlobalFrequency() 187 188 kernel_cmd = [ 189 "earlyprintk=pl011,0x1c090000", 190 "console=ttyAMA0", 191 "lpj=19988480", 192 "norandmaps", 193 "loglevel=8", 194 "mem=%s" % default_mem_size, 195 "root=/dev/vda1", 196 "rw", 197 "init=%s" % options.kernel_init, 198 "vmalloc=768MB", 199 ] 200 201 root = Root(full_system=True) 202 203 disks = [default_disk] if len(options.disk) == 0 else options.disk 204 system = createSystem(options.caches, 205 options.kernel, 206 options.bootscript, 207 disks=disks) 208 209 root.system = system 210 system.boot_osflags = " ".join(kernel_cmd) 211 212 if options.big_cpus + options.little_cpus == 0: 213 m5.util.panic("Empty CPU clusters") 214 215 big_model, little_model = cpu_types[options.cpu_type] 216 217 all_cpus = [] 218 # big cluster 219 if options.big_cpus > 0: 220 system.bigCluster = big_model(system, options.big_cpus, 221 options.big_cpu_clock) 222 system.mem_mode = system.bigCluster.memoryMode() 223 all_cpus += system.bigCluster.cpus 224 225 # little cluster 226 if options.little_cpus > 0: 227 system.littleCluster = little_model(system, options.little_cpus, 228 options.little_cpu_clock) 229 system.mem_mode = system.littleCluster.memoryMode() 230 all_cpus += system.littleCluster.cpus 231 232 # Figure out the memory mode 233 if options.big_cpus > 0 and options.little_cpus > 0 and \ 234 system.littleCluster.memoryMode() != system.littleCluster.memoryMode(): 235 m5.util.panic("Memory mode missmatch among CPU clusters") 236 237 238 # create caches 239 system.addCaches(options.caches, options.last_cache_level) 240 if not options.caches: 241 if options.big_cpus > 0 and system.bigCluster.requireCaches(): 242 m5.util.panic("Big CPU model requires caches") 243 if options.little_cpus > 0 and system.littleCluster.requireCaches(): 244 m5.util.panic("Little CPU model requires caches") 245 246 # Create a KVM VM and do KVM-specific configuration 247 if issubclass(big_model, KvmCluster): 248 _build_kvm(system, all_cpus) 249 250 # Linux device tree 251 if options.dtb is not None: 252 system.dtb_filename = SysPaths.binary(options.dtb) 253 else: 254 def create_dtb_for_system(system, filename): 255 state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1) 256 rootNode = system.generateDeviceTree(state) 257 258 fdt = Fdt() 259 fdt.add_rootnode(rootNode) 260 dtb_filename = os.path.join(m5.options.outdir, filename) 261 return fdt.writeDtbFile(dtb_filename) 262 263 system.dtb_filename = create_dtb_for_system(system, 'system.dtb') 264 265 return root 266 267def _build_kvm(system, cpus): 268 system.kvm_vm = KvmVM() 269 270 # Assign KVM CPUs to their own event queues / threads. This 271 # has to be done after creating caches and other child objects 272 # since these mustn't inherit the CPU event queue. 273 if len(cpus) > 1: 274 device_eq = 0 275 first_cpu_eq = 1 276 for idx, cpu in enumerate(cpus): 277 # Child objects usually inherit the parent's event 278 # queue. Override that and use the same event queue for 279 # all devices. 280 for obj in cpu.descendants(): 281 obj.eventq_index = device_eq 282 cpu.eventq_index = first_cpu_eq + idx 283 284 285 286def instantiate(options, checkpoint_dir=None): 287 # Setup the simulation quantum if we are running in PDES-mode 288 # (e.g., when using KVM) 289 root = Root.getInstance() 290 if root and _using_pdes(root): 291 m5.util.inform("Running in PDES mode with a %s simulation quantum.", 292 options.sim_quantum) 293 root.sim_quantum = _to_ticks(options.sim_quantum) 294 295 # Get and load from the chkpt or simpoint checkpoint 296 if options.restore_from: 297 if checkpoint_dir and not os.path.isabs(options.restore_from): 298 cpt = os.path.join(checkpoint_dir, options.restore_from) 299 else: 300 cpt = options.restore_from 301 302 m5.util.inform("Restoring from checkpoint %s", cpt) 303 m5.instantiate(cpt) 304 else: 305 m5.instantiate() 306 307 308def run(checkpoint_dir=m5.options.outdir): 309 # start simulation (and drop checkpoints when requested) 310 while True: 311 event = m5.simulate() 312 exit_msg = event.getCause() 313 if exit_msg == "checkpoint": 314 print "Dropping checkpoint at tick %d" % m5.curTick() 315 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick()) 316 m5.checkpoint(cpt_dir) 317 print "Checkpoint done." 318 else: 319 print exit_msg, " @ ", m5.curTick() 320 break 321 322 sys.exit(event.getCode()) 323 324 325def main(): 326 parser = argparse.ArgumentParser( 327 description="Generic ARM big.LITTLE configuration") 328 addOptions(parser) 329 options = parser.parse_args() 330 root = build(options) 331 instantiate(options) 332 run() 333 334 335if __name__ == "__m5_main__": 336 main() 337