fs_bigLITTLE.py revision 13357
111935Sandreas.sandberg@arm.com# Copyright (c) 2016-2017 ARM Limited 211569Sgabor.dozsa@arm.com# All rights reserved. 311569Sgabor.dozsa@arm.com# 411569Sgabor.dozsa@arm.com# The license below extends only to copyright in the software and shall 511569Sgabor.dozsa@arm.com# not be construed as granting a license to any other intellectual 611569Sgabor.dozsa@arm.com# property including but not limited to intellectual property relating 711569Sgabor.dozsa@arm.com# to a hardware implementation of the functionality of the software 811569Sgabor.dozsa@arm.com# licensed hereunder. You may use the software subject to the license 911569Sgabor.dozsa@arm.com# terms below provided that you ensure that this notice is replicated 1011569Sgabor.dozsa@arm.com# unmodified and in its entirety in all distributions of the software, 1111569Sgabor.dozsa@arm.com# modified or unmodified, in source code or in binary form. 1211569Sgabor.dozsa@arm.com# 1311569Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without 1411569Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are 1511569Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright 1611569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer; 1711569Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright 1811569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the 1911569Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution; 2011569Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its 2111569Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from 2211569Sgabor.dozsa@arm.com# this software without specific prior written permission. 2311569Sgabor.dozsa@arm.com# 2411569Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2511569Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2611569Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2711569Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2811569Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2911569Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3011569Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3111569Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3211569Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3311569Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3411569Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3511569Sgabor.dozsa@arm.com# 3611569Sgabor.dozsa@arm.com# Authors: Gabor Dozsa 3711569Sgabor.dozsa@arm.com# Andreas Sandberg 3811569Sgabor.dozsa@arm.com 3911569Sgabor.dozsa@arm.com# This is an example configuration script for full system simulation of 4011569Sgabor.dozsa@arm.com# a generic ARM bigLITTLE system. 4111569Sgabor.dozsa@arm.com 4211569Sgabor.dozsa@arm.com 4312564Sgabeblack@google.comfrom __future__ import print_function 4412564Sgabeblack@google.com 4511569Sgabor.dozsa@arm.comimport argparse 4611569Sgabor.dozsa@arm.comimport os 4711569Sgabor.dozsa@arm.comimport sys 4811569Sgabor.dozsa@arm.comimport m5 4911936Sandreas.sandberg@arm.comimport m5.util 5011569Sgabor.dozsa@arm.comfrom m5.objects import * 5111569Sgabor.dozsa@arm.com 5211682Sandreas.hansson@arm.comm5.util.addToPath("../../") 5311682Sandreas.hansson@arm.com 5411682Sandreas.hansson@arm.comfrom common import SysPaths 5511682Sandreas.hansson@arm.comfrom common import CpuConfig 5612097Sandreas.sandberg@arm.comfrom common.cores.arm import ex5_big, ex5_LITTLE 5711569Sgabor.dozsa@arm.com 5811569Sgabor.dozsa@arm.comimport devices 5911936Sandreas.sandberg@arm.comfrom devices import AtomicCluster, KvmCluster 6011569Sgabor.dozsa@arm.com 6111569Sgabor.dozsa@arm.com 6211569Sgabor.dozsa@arm.comdefault_kernel = 'vmlinux4.3.aarch64' 6311569Sgabor.dozsa@arm.comdefault_disk = 'aarch64-ubuntu-trusty-headless.img' 6411569Sgabor.dozsa@arm.comdefault_rcs = 'bootscript.rcS' 6511569Sgabor.dozsa@arm.com 6611569Sgabor.dozsa@arm.comdefault_mem_size= "2GB" 6711569Sgabor.dozsa@arm.com 6811936Sandreas.sandberg@arm.comdef _to_ticks(value): 6911936Sandreas.sandberg@arm.com """Helper function to convert a latency from string format to Ticks""" 7011936Sandreas.sandberg@arm.com 7111936Sandreas.sandberg@arm.com return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value)) 7211936Sandreas.sandberg@arm.com 7311936Sandreas.sandberg@arm.comdef _using_pdes(root): 7411936Sandreas.sandberg@arm.com """Determine if the simulator is using multiple parallel event queues""" 7511936Sandreas.sandberg@arm.com 7611936Sandreas.sandberg@arm.com for obj in root.descendants(): 7711936Sandreas.sandberg@arm.com if not m5.proxy.isproxy(obj.eventq_index) and \ 7811936Sandreas.sandberg@arm.com obj.eventq_index != root.eventq_index: 7911936Sandreas.sandberg@arm.com return True 8011936Sandreas.sandberg@arm.com 8111936Sandreas.sandberg@arm.com return False 8211936Sandreas.sandberg@arm.com 8311630Sgabor.dozsa@arm.com 8411630Sgabor.dozsa@arm.comclass BigCluster(devices.CpuCluster): 8511630Sgabor.dozsa@arm.com def __init__(self, system, num_cpus, cpu_clock, 8611630Sgabor.dozsa@arm.com cpu_voltage="1.0V"): 8712029Spierre-yves.peneau@lirmm.fr cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D, 8811630Sgabor.dozsa@arm.com devices.WalkCache, devices.L2 ] 8911630Sgabor.dozsa@arm.com super(BigCluster, self).__init__(system, num_cpus, cpu_clock, 9011630Sgabor.dozsa@arm.com cpu_voltage, *cpu_config) 9111630Sgabor.dozsa@arm.com 9211630Sgabor.dozsa@arm.comclass LittleCluster(devices.CpuCluster): 9311630Sgabor.dozsa@arm.com def __init__(self, system, num_cpus, cpu_clock, 9411630Sgabor.dozsa@arm.com cpu_voltage="1.0V"): 9512029Spierre-yves.peneau@lirmm.fr cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D, 9611630Sgabor.dozsa@arm.com devices.WalkCache, devices.L2 ] 9711630Sgabor.dozsa@arm.com super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, 9811630Sgabor.dozsa@arm.com cpu_voltage, *cpu_config) 9911630Sgabor.dozsa@arm.com 10012028Spierre-yves.peneau@lirmm.frclass Ex5BigCluster(devices.CpuCluster): 10112028Spierre-yves.peneau@lirmm.fr def __init__(self, system, num_cpus, cpu_clock, 10212028Spierre-yves.peneau@lirmm.fr cpu_voltage="1.0V"): 10312028Spierre-yves.peneau@lirmm.fr cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D, 10412028Spierre-yves.peneau@lirmm.fr ex5_big.WalkCache, ex5_big.L2 ] 10512028Spierre-yves.peneau@lirmm.fr super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock, 10612028Spierre-yves.peneau@lirmm.fr cpu_voltage, *cpu_config) 10712028Spierre-yves.peneau@lirmm.fr 10812028Spierre-yves.peneau@lirmm.frclass Ex5LittleCluster(devices.CpuCluster): 10912028Spierre-yves.peneau@lirmm.fr def __init__(self, system, num_cpus, cpu_clock, 11012028Spierre-yves.peneau@lirmm.fr cpu_voltage="1.0V"): 11112028Spierre-yves.peneau@lirmm.fr cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I, 11212028Spierre-yves.peneau@lirmm.fr ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ] 11312028Spierre-yves.peneau@lirmm.fr super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock, 11412028Spierre-yves.peneau@lirmm.fr cpu_voltage, *cpu_config) 11511630Sgabor.dozsa@arm.com 11611756Sgabor.dozsa@arm.comdef createSystem(caches, kernel, bootscript, disks=[]): 11711756Sgabor.dozsa@arm.com sys = devices.SimpleSystem(caches, default_mem_size, 11811756Sgabor.dozsa@arm.com kernel=SysPaths.binary(kernel), 11912153Sandreas.sandberg@arm.com readfile=bootscript) 12011569Sgabor.dozsa@arm.com 12112166Sandreas.sandberg@arm.com sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master) 12212166Sandreas.sandberg@arm.com for r in sys.mem_ranges ] 12311569Sgabor.dozsa@arm.com 12411569Sgabor.dozsa@arm.com sys.connect() 12511569Sgabor.dozsa@arm.com 12611569Sgabor.dozsa@arm.com # Attach disk images 12711569Sgabor.dozsa@arm.com if disks: 12811569Sgabor.dozsa@arm.com def cow_disk(image_file): 12911569Sgabor.dozsa@arm.com image = CowDiskImage() 13011569Sgabor.dozsa@arm.com image.child.image_file = SysPaths.disk(image_file) 13111569Sgabor.dozsa@arm.com return image 13211569Sgabor.dozsa@arm.com 13311569Sgabor.dozsa@arm.com sys.disk_images = [ cow_disk(f) for f in disks ] 13411569Sgabor.dozsa@arm.com sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img)) 13511569Sgabor.dozsa@arm.com for img in sys.disk_images ] 13611569Sgabor.dozsa@arm.com for dev in sys.pci_vio_block: 13711569Sgabor.dozsa@arm.com sys.attach_pci(dev) 13811569Sgabor.dozsa@arm.com 13911569Sgabor.dozsa@arm.com sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary) 14011569Sgabor.dozsa@arm.com 14111569Sgabor.dozsa@arm.com return sys 14211569Sgabor.dozsa@arm.com 14311936Sandreas.sandberg@arm.comcpu_types = { 14411936Sandreas.sandberg@arm.com "atomic" : (AtomicCluster, AtomicCluster), 14511936Sandreas.sandberg@arm.com "timing" : (BigCluster, LittleCluster), 14612028Spierre-yves.peneau@lirmm.fr "exynos" : (Ex5BigCluster, Ex5LittleCluster), 14711936Sandreas.sandberg@arm.com} 14811936Sandreas.sandberg@arm.com 14911936Sandreas.sandberg@arm.com# Only add the KVM CPU if it has been compiled into gem5 15011936Sandreas.sandberg@arm.comif devices.have_kvm: 15111936Sandreas.sandberg@arm.com cpu_types["kvm"] = (KvmCluster, KvmCluster) 15211936Sandreas.sandberg@arm.com 15311569Sgabor.dozsa@arm.com 15411843Sgabor.dozsa@arm.comdef addOptions(parser): 15511569Sgabor.dozsa@arm.com parser.add_argument("--restore-from", type=str, default=None, 15611569Sgabor.dozsa@arm.com help="Restore from checkpoint") 15712476SCurtis.Dunham@arm.com parser.add_argument("--dtb", type=str, default=None, 15811569Sgabor.dozsa@arm.com help="DTB file to load") 15911569Sgabor.dozsa@arm.com parser.add_argument("--kernel", type=str, default=default_kernel, 16011569Sgabor.dozsa@arm.com help="Linux kernel") 16111569Sgabor.dozsa@arm.com parser.add_argument("--disk", action="append", type=str, default=[], 16211569Sgabor.dozsa@arm.com help="Disks to instantiate") 16311569Sgabor.dozsa@arm.com parser.add_argument("--bootscript", type=str, default=default_rcs, 16411569Sgabor.dozsa@arm.com help="Linux bootscript") 16511936Sandreas.sandberg@arm.com parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(), 16611936Sandreas.sandberg@arm.com default="timing", 16711936Sandreas.sandberg@arm.com help="CPU simulation mode. Default: %(default)s") 16811569Sgabor.dozsa@arm.com parser.add_argument("--kernel-init", type=str, default="/sbin/init", 16911569Sgabor.dozsa@arm.com help="Override init") 17011569Sgabor.dozsa@arm.com parser.add_argument("--big-cpus", type=int, default=1, 17111569Sgabor.dozsa@arm.com help="Number of big CPUs to instantiate") 17211569Sgabor.dozsa@arm.com parser.add_argument("--little-cpus", type=int, default=1, 17311569Sgabor.dozsa@arm.com help="Number of little CPUs to instantiate") 17411569Sgabor.dozsa@arm.com parser.add_argument("--caches", action="store_true", default=False, 17511569Sgabor.dozsa@arm.com help="Instantiate caches") 17611569Sgabor.dozsa@arm.com parser.add_argument("--last-cache-level", type=int, default=2, 17711569Sgabor.dozsa@arm.com help="Last level of caches (e.g. 3 for L3)") 17811569Sgabor.dozsa@arm.com parser.add_argument("--big-cpu-clock", type=str, default="2GHz", 17911569Sgabor.dozsa@arm.com help="Big CPU clock frequency") 18011569Sgabor.dozsa@arm.com parser.add_argument("--little-cpu-clock", type=str, default="1GHz", 18111569Sgabor.dozsa@arm.com help="Little CPU clock frequency") 18211936Sandreas.sandberg@arm.com parser.add_argument("--sim-quantum", type=str, default="1ms", 18311936Sandreas.sandberg@arm.com help="Simulation quantum for parallel simulation. " \ 18411936Sandreas.sandberg@arm.com "Default: %(default)s") 18513357Sciro.santilli@arm.com parser.add_argument("-P", "--param", action="append", default=[], 18613357Sciro.santilli@arm.com help="Set a SimObject parameter relative to the root node. " 18713357Sciro.santilli@arm.com "An extended Python multi range slicing syntax can be used " 18813357Sciro.santilli@arm.com "for arrays. For example: " 18913357Sciro.santilli@arm.com "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' " 19013357Sciro.santilli@arm.com "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 " 19113357Sciro.santilli@arm.com "Direct parameters of the root object are not accessible, " 19213357Sciro.santilli@arm.com "only parameters of its children.") 19311843Sgabor.dozsa@arm.com return parser 19411569Sgabor.dozsa@arm.com 19511843Sgabor.dozsa@arm.comdef build(options): 19611569Sgabor.dozsa@arm.com m5.ticks.fixGlobalFrequency() 19711569Sgabor.dozsa@arm.com 19811569Sgabor.dozsa@arm.com kernel_cmd = [ 19911569Sgabor.dozsa@arm.com "earlyprintk=pl011,0x1c090000", 20011569Sgabor.dozsa@arm.com "console=ttyAMA0", 20111569Sgabor.dozsa@arm.com "lpj=19988480", 20211569Sgabor.dozsa@arm.com "norandmaps", 20311569Sgabor.dozsa@arm.com "loglevel=8", 20411569Sgabor.dozsa@arm.com "mem=%s" % default_mem_size, 20511569Sgabor.dozsa@arm.com "root=/dev/vda1", 20611569Sgabor.dozsa@arm.com "rw", 20711569Sgabor.dozsa@arm.com "init=%s" % options.kernel_init, 20811569Sgabor.dozsa@arm.com "vmalloc=768MB", 20911569Sgabor.dozsa@arm.com ] 21011569Sgabor.dozsa@arm.com 21111569Sgabor.dozsa@arm.com root = Root(full_system=True) 21211569Sgabor.dozsa@arm.com 21311756Sgabor.dozsa@arm.com disks = [default_disk] if len(options.disk) == 0 else options.disk 21411756Sgabor.dozsa@arm.com system = createSystem(options.caches, 21511756Sgabor.dozsa@arm.com options.kernel, 21611756Sgabor.dozsa@arm.com options.bootscript, 21711756Sgabor.dozsa@arm.com disks=disks) 21811569Sgabor.dozsa@arm.com 21911569Sgabor.dozsa@arm.com root.system = system 22011569Sgabor.dozsa@arm.com system.boot_osflags = " ".join(kernel_cmd) 22111569Sgabor.dozsa@arm.com 22211630Sgabor.dozsa@arm.com if options.big_cpus + options.little_cpus == 0: 22311630Sgabor.dozsa@arm.com m5.util.panic("Empty CPU clusters") 22411630Sgabor.dozsa@arm.com 22511936Sandreas.sandberg@arm.com big_model, little_model = cpu_types[options.cpu_type] 22611936Sandreas.sandberg@arm.com 22711936Sandreas.sandberg@arm.com all_cpus = [] 22811569Sgabor.dozsa@arm.com # big cluster 22911569Sgabor.dozsa@arm.com if options.big_cpus > 0: 23011936Sandreas.sandberg@arm.com system.bigCluster = big_model(system, options.big_cpus, 23111936Sandreas.sandberg@arm.com options.big_cpu_clock) 23211936Sandreas.sandberg@arm.com system.mem_mode = system.bigCluster.memoryMode() 23311936Sandreas.sandberg@arm.com all_cpus += system.bigCluster.cpus 23411936Sandreas.sandberg@arm.com 23511630Sgabor.dozsa@arm.com # little cluster 23611630Sgabor.dozsa@arm.com if options.little_cpus > 0: 23711936Sandreas.sandberg@arm.com system.littleCluster = little_model(system, options.little_cpus, 23811936Sandreas.sandberg@arm.com options.little_cpu_clock) 23911936Sandreas.sandberg@arm.com system.mem_mode = system.littleCluster.memoryMode() 24011936Sandreas.sandberg@arm.com all_cpus += system.littleCluster.cpus 24111569Sgabor.dozsa@arm.com 24211936Sandreas.sandberg@arm.com # Figure out the memory mode 24311936Sandreas.sandberg@arm.com if options.big_cpus > 0 and options.little_cpus > 0 and \ 24411936Sandreas.sandberg@arm.com system.littleCluster.memoryMode() != system.littleCluster.memoryMode(): 24511936Sandreas.sandberg@arm.com m5.util.panic("Memory mode missmatch among CPU clusters") 24611569Sgabor.dozsa@arm.com 24711569Sgabor.dozsa@arm.com 24811630Sgabor.dozsa@arm.com # create caches 24911630Sgabor.dozsa@arm.com system.addCaches(options.caches, options.last_cache_level) 25011630Sgabor.dozsa@arm.com if not options.caches: 25111630Sgabor.dozsa@arm.com if options.big_cpus > 0 and system.bigCluster.requireCaches(): 25211630Sgabor.dozsa@arm.com m5.util.panic("Big CPU model requires caches") 25311630Sgabor.dozsa@arm.com if options.little_cpus > 0 and system.littleCluster.requireCaches(): 25411630Sgabor.dozsa@arm.com m5.util.panic("Little CPU model requires caches") 25511569Sgabor.dozsa@arm.com 25611936Sandreas.sandberg@arm.com # Create a KVM VM and do KVM-specific configuration 25711936Sandreas.sandberg@arm.com if issubclass(big_model, KvmCluster): 25811936Sandreas.sandberg@arm.com _build_kvm(system, all_cpus) 25911936Sandreas.sandberg@arm.com 26011569Sgabor.dozsa@arm.com # Linux device tree 26112476SCurtis.Dunham@arm.com if options.dtb is not None: 26212476SCurtis.Dunham@arm.com system.dtb_filename = SysPaths.binary(options.dtb) 26312476SCurtis.Dunham@arm.com else: 26412476SCurtis.Dunham@arm.com def create_dtb_for_system(system, filename): 26512476SCurtis.Dunham@arm.com state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1) 26612476SCurtis.Dunham@arm.com rootNode = system.generateDeviceTree(state) 26712476SCurtis.Dunham@arm.com 26812476SCurtis.Dunham@arm.com fdt = Fdt() 26912476SCurtis.Dunham@arm.com fdt.add_rootnode(rootNode) 27012476SCurtis.Dunham@arm.com dtb_filename = os.path.join(m5.options.outdir, filename) 27112476SCurtis.Dunham@arm.com return fdt.writeDtbFile(dtb_filename) 27212476SCurtis.Dunham@arm.com 27312476SCurtis.Dunham@arm.com system.dtb_filename = create_dtb_for_system(system, 'system.dtb') 27411569Sgabor.dozsa@arm.com 27511843Sgabor.dozsa@arm.com return root 27611843Sgabor.dozsa@arm.com 27711936Sandreas.sandberg@arm.comdef _build_kvm(system, cpus): 27811936Sandreas.sandberg@arm.com system.kvm_vm = KvmVM() 27911936Sandreas.sandberg@arm.com 28011936Sandreas.sandberg@arm.com # Assign KVM CPUs to their own event queues / threads. This 28111936Sandreas.sandberg@arm.com # has to be done after creating caches and other child objects 28211936Sandreas.sandberg@arm.com # since these mustn't inherit the CPU event queue. 28311936Sandreas.sandberg@arm.com if len(cpus) > 1: 28411936Sandreas.sandberg@arm.com device_eq = 0 28511936Sandreas.sandberg@arm.com first_cpu_eq = 1 28611936Sandreas.sandberg@arm.com for idx, cpu in enumerate(cpus): 28711936Sandreas.sandberg@arm.com # Child objects usually inherit the parent's event 28811936Sandreas.sandberg@arm.com # queue. Override that and use the same event queue for 28911936Sandreas.sandberg@arm.com # all devices. 29011936Sandreas.sandberg@arm.com for obj in cpu.descendants(): 29111936Sandreas.sandberg@arm.com obj.eventq_index = device_eq 29211936Sandreas.sandberg@arm.com cpu.eventq_index = first_cpu_eq + idx 29311936Sandreas.sandberg@arm.com 29411936Sandreas.sandberg@arm.com 29511843Sgabor.dozsa@arm.com 29611935Sandreas.sandberg@arm.comdef instantiate(options, checkpoint_dir=None): 29711936Sandreas.sandberg@arm.com # Setup the simulation quantum if we are running in PDES-mode 29811936Sandreas.sandberg@arm.com # (e.g., when using KVM) 29911936Sandreas.sandberg@arm.com root = Root.getInstance() 30011936Sandreas.sandberg@arm.com if root and _using_pdes(root): 30111936Sandreas.sandberg@arm.com m5.util.inform("Running in PDES mode with a %s simulation quantum.", 30211936Sandreas.sandberg@arm.com options.sim_quantum) 30311936Sandreas.sandberg@arm.com root.sim_quantum = _to_ticks(options.sim_quantum) 30411936Sandreas.sandberg@arm.com 30511569Sgabor.dozsa@arm.com # Get and load from the chkpt or simpoint checkpoint 30611935Sandreas.sandberg@arm.com if options.restore_from: 30711935Sandreas.sandberg@arm.com if checkpoint_dir and not os.path.isabs(options.restore_from): 30811935Sandreas.sandberg@arm.com cpt = os.path.join(checkpoint_dir, options.restore_from) 30911935Sandreas.sandberg@arm.com else: 31011935Sandreas.sandberg@arm.com cpt = options.restore_from 31111935Sandreas.sandberg@arm.com 31211935Sandreas.sandberg@arm.com m5.util.inform("Restoring from checkpoint %s", cpt) 31311935Sandreas.sandberg@arm.com m5.instantiate(cpt) 31411569Sgabor.dozsa@arm.com else: 31511569Sgabor.dozsa@arm.com m5.instantiate() 31611569Sgabor.dozsa@arm.com 31711843Sgabor.dozsa@arm.com 31811843Sgabor.dozsa@arm.comdef run(checkpoint_dir=m5.options.outdir): 31911569Sgabor.dozsa@arm.com # start simulation (and drop checkpoints when requested) 32011569Sgabor.dozsa@arm.com while True: 32111569Sgabor.dozsa@arm.com event = m5.simulate() 32211569Sgabor.dozsa@arm.com exit_msg = event.getCause() 32311569Sgabor.dozsa@arm.com if exit_msg == "checkpoint": 32412564Sgabeblack@google.com print("Dropping checkpoint at tick %d" % m5.curTick()) 32511843Sgabor.dozsa@arm.com cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick()) 32611843Sgabor.dozsa@arm.com m5.checkpoint(cpt_dir) 32712564Sgabeblack@google.com print("Checkpoint done.") 32811569Sgabor.dozsa@arm.com else: 32912564Sgabeblack@google.com print(exit_msg, " @ ", m5.curTick()) 33011569Sgabor.dozsa@arm.com break 33111569Sgabor.dozsa@arm.com 33211569Sgabor.dozsa@arm.com sys.exit(event.getCode()) 33311569Sgabor.dozsa@arm.com 33411569Sgabor.dozsa@arm.com 33511843Sgabor.dozsa@arm.comdef main(): 33611843Sgabor.dozsa@arm.com parser = argparse.ArgumentParser( 33711843Sgabor.dozsa@arm.com description="Generic ARM big.LITTLE configuration") 33811843Sgabor.dozsa@arm.com addOptions(parser) 33911843Sgabor.dozsa@arm.com options = parser.parse_args() 34011843Sgabor.dozsa@arm.com root = build(options) 34113357Sciro.santilli@arm.com root.apply_config(options.param) 34211935Sandreas.sandberg@arm.com instantiate(options) 34311843Sgabor.dozsa@arm.com run() 34411843Sgabor.dozsa@arm.com 34511843Sgabor.dozsa@arm.com 34611569Sgabor.dozsa@arm.comif __name__ == "__m5_main__": 34711569Sgabor.dozsa@arm.com main() 348