fs_bigLITTLE.py revision 12097
111935Sandreas.sandberg@arm.com# Copyright (c) 2016-2017 ARM Limited
211569Sgabor.dozsa@arm.com# All rights reserved.
311569Sgabor.dozsa@arm.com#
411569Sgabor.dozsa@arm.com# The license below extends only to copyright in the software and shall
511569Sgabor.dozsa@arm.com# not be construed as granting a license to any other intellectual
611569Sgabor.dozsa@arm.com# property including but not limited to intellectual property relating
711569Sgabor.dozsa@arm.com# to a hardware implementation of the functionality of the software
811569Sgabor.dozsa@arm.com# licensed hereunder.  You may use the software subject to the license
911569Sgabor.dozsa@arm.com# terms below provided that you ensure that this notice is replicated
1011569Sgabor.dozsa@arm.com# unmodified and in its entirety in all distributions of the software,
1111569Sgabor.dozsa@arm.com# modified or unmodified, in source code or in binary form.
1211569Sgabor.dozsa@arm.com#
1311569Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without
1411569Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are
1511569Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright
1611569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer;
1711569Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright
1811569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the
1911569Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution;
2011569Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its
2111569Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from
2211569Sgabor.dozsa@arm.com# this software without specific prior written permission.
2311569Sgabor.dozsa@arm.com#
2411569Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2511569Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2611569Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2711569Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2811569Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2911569Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3011569Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3111569Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3211569Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3311569Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3411569Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3511569Sgabor.dozsa@arm.com#
3611569Sgabor.dozsa@arm.com# Authors: Gabor Dozsa
3711569Sgabor.dozsa@arm.com#          Andreas Sandberg
3811569Sgabor.dozsa@arm.com
3911569Sgabor.dozsa@arm.com# This is an example configuration script for full system simulation of
4011569Sgabor.dozsa@arm.com# a generic ARM bigLITTLE system.
4111569Sgabor.dozsa@arm.com
4211569Sgabor.dozsa@arm.com
4311569Sgabor.dozsa@arm.comimport argparse
4411569Sgabor.dozsa@arm.comimport os
4511569Sgabor.dozsa@arm.comimport sys
4611569Sgabor.dozsa@arm.comimport m5
4711936Sandreas.sandberg@arm.comimport m5.util
4811569Sgabor.dozsa@arm.comfrom m5.objects import *
4911569Sgabor.dozsa@arm.com
5011682Sandreas.hansson@arm.comm5.util.addToPath("../../")
5111682Sandreas.hansson@arm.com
5211682Sandreas.hansson@arm.comfrom common import SysPaths
5311682Sandreas.hansson@arm.comfrom common import CpuConfig
5412097Sandreas.sandberg@arm.comfrom common.cores.arm import ex5_big, ex5_LITTLE
5511569Sgabor.dozsa@arm.com
5611569Sgabor.dozsa@arm.comimport devices
5711936Sandreas.sandberg@arm.comfrom devices import AtomicCluster, KvmCluster
5811569Sgabor.dozsa@arm.com
5911569Sgabor.dozsa@arm.com
6011569Sgabor.dozsa@arm.comdefault_dtb = 'armv8_gem5_v1_big_little_2_2.dtb'
6111569Sgabor.dozsa@arm.comdefault_kernel = 'vmlinux4.3.aarch64'
6211569Sgabor.dozsa@arm.comdefault_disk = 'aarch64-ubuntu-trusty-headless.img'
6311569Sgabor.dozsa@arm.comdefault_rcs = 'bootscript.rcS'
6411569Sgabor.dozsa@arm.com
6511569Sgabor.dozsa@arm.comdefault_mem_size= "2GB"
6611569Sgabor.dozsa@arm.com
6711936Sandreas.sandberg@arm.comdef _to_ticks(value):
6811936Sandreas.sandberg@arm.com    """Helper function to convert a latency from string format to Ticks"""
6911936Sandreas.sandberg@arm.com
7011936Sandreas.sandberg@arm.com    return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
7111936Sandreas.sandberg@arm.com
7211936Sandreas.sandberg@arm.comdef _using_pdes(root):
7311936Sandreas.sandberg@arm.com    """Determine if the simulator is using multiple parallel event queues"""
7411936Sandreas.sandberg@arm.com
7511936Sandreas.sandberg@arm.com    for obj in root.descendants():
7611936Sandreas.sandberg@arm.com        if not m5.proxy.isproxy(obj.eventq_index) and \
7711936Sandreas.sandberg@arm.com               obj.eventq_index != root.eventq_index:
7811936Sandreas.sandberg@arm.com            return True
7911936Sandreas.sandberg@arm.com
8011936Sandreas.sandberg@arm.com    return False
8111936Sandreas.sandberg@arm.com
8211630Sgabor.dozsa@arm.com
8311630Sgabor.dozsa@arm.comclass BigCluster(devices.CpuCluster):
8411630Sgabor.dozsa@arm.com    def __init__(self, system, num_cpus, cpu_clock,
8511630Sgabor.dozsa@arm.com                 cpu_voltage="1.0V"):
8612029Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D,
8711630Sgabor.dozsa@arm.com                    devices.WalkCache, devices.L2 ]
8811630Sgabor.dozsa@arm.com        super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
8911630Sgabor.dozsa@arm.com                                         cpu_voltage, *cpu_config)
9011630Sgabor.dozsa@arm.com
9111630Sgabor.dozsa@arm.comclass LittleCluster(devices.CpuCluster):
9211630Sgabor.dozsa@arm.com    def __init__(self, system, num_cpus, cpu_clock,
9311630Sgabor.dozsa@arm.com                 cpu_voltage="1.0V"):
9412029Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D,
9511630Sgabor.dozsa@arm.com                       devices.WalkCache, devices.L2 ]
9611630Sgabor.dozsa@arm.com        super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
9711630Sgabor.dozsa@arm.com                                         cpu_voltage, *cpu_config)
9811630Sgabor.dozsa@arm.com
9912028Spierre-yves.peneau@lirmm.frclass Ex5BigCluster(devices.CpuCluster):
10012028Spierre-yves.peneau@lirmm.fr    def __init__(self, system, num_cpus, cpu_clock,
10112028Spierre-yves.peneau@lirmm.fr                 cpu_voltage="1.0V"):
10212028Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
10312028Spierre-yves.peneau@lirmm.fr                    ex5_big.WalkCache, ex5_big.L2 ]
10412028Spierre-yves.peneau@lirmm.fr        super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
10512028Spierre-yves.peneau@lirmm.fr                                         cpu_voltage, *cpu_config)
10612028Spierre-yves.peneau@lirmm.fr
10712028Spierre-yves.peneau@lirmm.frclass Ex5LittleCluster(devices.CpuCluster):
10812028Spierre-yves.peneau@lirmm.fr    def __init__(self, system, num_cpus, cpu_clock,
10912028Spierre-yves.peneau@lirmm.fr                 cpu_voltage="1.0V"):
11012028Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
11112028Spierre-yves.peneau@lirmm.fr                    ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
11212028Spierre-yves.peneau@lirmm.fr        super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
11312028Spierre-yves.peneau@lirmm.fr                                         cpu_voltage, *cpu_config)
11411630Sgabor.dozsa@arm.com
11511756Sgabor.dozsa@arm.comdef createSystem(caches, kernel, bootscript, disks=[]):
11611756Sgabor.dozsa@arm.com    sys = devices.SimpleSystem(caches, default_mem_size,
11711756Sgabor.dozsa@arm.com                               kernel=SysPaths.binary(kernel),
11811569Sgabor.dozsa@arm.com                               readfile=bootscript,
11911569Sgabor.dozsa@arm.com                               machine_type="DTOnly")
12011569Sgabor.dozsa@arm.com
12111756Sgabor.dozsa@arm.com    sys.mem_ctrls = SimpleMemory(range=sys._mem_range)
12211569Sgabor.dozsa@arm.com    sys.mem_ctrls.port = sys.membus.master
12311569Sgabor.dozsa@arm.com
12411569Sgabor.dozsa@arm.com    sys.connect()
12511569Sgabor.dozsa@arm.com
12611569Sgabor.dozsa@arm.com    # Attach disk images
12711569Sgabor.dozsa@arm.com    if disks:
12811569Sgabor.dozsa@arm.com        def cow_disk(image_file):
12911569Sgabor.dozsa@arm.com            image = CowDiskImage()
13011569Sgabor.dozsa@arm.com            image.child.image_file = SysPaths.disk(image_file)
13111569Sgabor.dozsa@arm.com            return image
13211569Sgabor.dozsa@arm.com
13311569Sgabor.dozsa@arm.com        sys.disk_images = [ cow_disk(f) for f in disks ]
13411569Sgabor.dozsa@arm.com        sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
13511569Sgabor.dozsa@arm.com                              for img in sys.disk_images ]
13611569Sgabor.dozsa@arm.com        for dev in sys.pci_vio_block:
13711569Sgabor.dozsa@arm.com            sys.attach_pci(dev)
13811569Sgabor.dozsa@arm.com
13911569Sgabor.dozsa@arm.com    sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
14011569Sgabor.dozsa@arm.com
14111569Sgabor.dozsa@arm.com    return sys
14211569Sgabor.dozsa@arm.com
14311936Sandreas.sandberg@arm.comcpu_types = {
14411936Sandreas.sandberg@arm.com    "atomic" : (AtomicCluster, AtomicCluster),
14511936Sandreas.sandberg@arm.com    "timing" : (BigCluster, LittleCluster),
14612028Spierre-yves.peneau@lirmm.fr    "exynos" : (Ex5BigCluster, Ex5LittleCluster),
14711936Sandreas.sandberg@arm.com}
14811936Sandreas.sandberg@arm.com
14911936Sandreas.sandberg@arm.com# Only add the KVM CPU if it has been compiled into gem5
15011936Sandreas.sandberg@arm.comif devices.have_kvm:
15111936Sandreas.sandberg@arm.com    cpu_types["kvm"] = (KvmCluster, KvmCluster)
15211936Sandreas.sandberg@arm.com
15311569Sgabor.dozsa@arm.com
15411843Sgabor.dozsa@arm.comdef addOptions(parser):
15511569Sgabor.dozsa@arm.com    parser.add_argument("--restore-from", type=str, default=None,
15611569Sgabor.dozsa@arm.com                        help="Restore from checkpoint")
15711569Sgabor.dozsa@arm.com    parser.add_argument("--dtb", type=str, default=default_dtb,
15811569Sgabor.dozsa@arm.com                        help="DTB file to load")
15911569Sgabor.dozsa@arm.com    parser.add_argument("--kernel", type=str, default=default_kernel,
16011569Sgabor.dozsa@arm.com                        help="Linux kernel")
16111569Sgabor.dozsa@arm.com    parser.add_argument("--disk", action="append", type=str, default=[],
16211569Sgabor.dozsa@arm.com                        help="Disks to instantiate")
16311569Sgabor.dozsa@arm.com    parser.add_argument("--bootscript", type=str, default=default_rcs,
16411569Sgabor.dozsa@arm.com                        help="Linux bootscript")
16511936Sandreas.sandberg@arm.com    parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
16611936Sandreas.sandberg@arm.com                        default="timing",
16711936Sandreas.sandberg@arm.com                        help="CPU simulation mode. Default: %(default)s")
16811569Sgabor.dozsa@arm.com    parser.add_argument("--kernel-init", type=str, default="/sbin/init",
16911569Sgabor.dozsa@arm.com                        help="Override init")
17011569Sgabor.dozsa@arm.com    parser.add_argument("--big-cpus", type=int, default=1,
17111569Sgabor.dozsa@arm.com                        help="Number of big CPUs to instantiate")
17211569Sgabor.dozsa@arm.com    parser.add_argument("--little-cpus", type=int, default=1,
17311569Sgabor.dozsa@arm.com                        help="Number of little CPUs to instantiate")
17411569Sgabor.dozsa@arm.com    parser.add_argument("--caches", action="store_true", default=False,
17511569Sgabor.dozsa@arm.com                        help="Instantiate caches")
17611569Sgabor.dozsa@arm.com    parser.add_argument("--last-cache-level", type=int, default=2,
17711569Sgabor.dozsa@arm.com                        help="Last level of caches (e.g. 3 for L3)")
17811569Sgabor.dozsa@arm.com    parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
17911569Sgabor.dozsa@arm.com                        help="Big CPU clock frequency")
18011569Sgabor.dozsa@arm.com    parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
18111569Sgabor.dozsa@arm.com                        help="Little CPU clock frequency")
18211936Sandreas.sandberg@arm.com    parser.add_argument("--sim-quantum", type=str, default="1ms",
18311936Sandreas.sandberg@arm.com                        help="Simulation quantum for parallel simulation. " \
18411936Sandreas.sandberg@arm.com                        "Default: %(default)s")
18511843Sgabor.dozsa@arm.com    return parser
18611569Sgabor.dozsa@arm.com
18711843Sgabor.dozsa@arm.comdef build(options):
18811569Sgabor.dozsa@arm.com    m5.ticks.fixGlobalFrequency()
18911569Sgabor.dozsa@arm.com
19011569Sgabor.dozsa@arm.com    kernel_cmd = [
19111569Sgabor.dozsa@arm.com        "earlyprintk=pl011,0x1c090000",
19211569Sgabor.dozsa@arm.com        "console=ttyAMA0",
19311569Sgabor.dozsa@arm.com        "lpj=19988480",
19411569Sgabor.dozsa@arm.com        "norandmaps",
19511569Sgabor.dozsa@arm.com        "loglevel=8",
19611569Sgabor.dozsa@arm.com        "mem=%s" % default_mem_size,
19711569Sgabor.dozsa@arm.com        "root=/dev/vda1",
19811569Sgabor.dozsa@arm.com        "rw",
19911569Sgabor.dozsa@arm.com        "init=%s" % options.kernel_init,
20011569Sgabor.dozsa@arm.com        "vmalloc=768MB",
20111569Sgabor.dozsa@arm.com    ]
20211569Sgabor.dozsa@arm.com
20311569Sgabor.dozsa@arm.com    root = Root(full_system=True)
20411569Sgabor.dozsa@arm.com
20511756Sgabor.dozsa@arm.com    disks = [default_disk] if len(options.disk) == 0 else options.disk
20611756Sgabor.dozsa@arm.com    system = createSystem(options.caches,
20711756Sgabor.dozsa@arm.com                          options.kernel,
20811756Sgabor.dozsa@arm.com                          options.bootscript,
20911756Sgabor.dozsa@arm.com                          disks=disks)
21011569Sgabor.dozsa@arm.com
21111569Sgabor.dozsa@arm.com    root.system = system
21211569Sgabor.dozsa@arm.com    system.boot_osflags = " ".join(kernel_cmd)
21311569Sgabor.dozsa@arm.com
21411630Sgabor.dozsa@arm.com    if options.big_cpus + options.little_cpus == 0:
21511630Sgabor.dozsa@arm.com        m5.util.panic("Empty CPU clusters")
21611630Sgabor.dozsa@arm.com
21711936Sandreas.sandberg@arm.com    big_model, little_model = cpu_types[options.cpu_type]
21811936Sandreas.sandberg@arm.com
21911936Sandreas.sandberg@arm.com    all_cpus = []
22011569Sgabor.dozsa@arm.com    # big cluster
22111569Sgabor.dozsa@arm.com    if options.big_cpus > 0:
22211936Sandreas.sandberg@arm.com        system.bigCluster = big_model(system, options.big_cpus,
22311936Sandreas.sandberg@arm.com                                      options.big_cpu_clock)
22411936Sandreas.sandberg@arm.com        system.mem_mode = system.bigCluster.memoryMode()
22511936Sandreas.sandberg@arm.com        all_cpus += system.bigCluster.cpus
22611936Sandreas.sandberg@arm.com
22711630Sgabor.dozsa@arm.com    # little cluster
22811630Sgabor.dozsa@arm.com    if options.little_cpus > 0:
22911936Sandreas.sandberg@arm.com        system.littleCluster = little_model(system, options.little_cpus,
23011936Sandreas.sandberg@arm.com                                            options.little_cpu_clock)
23111936Sandreas.sandberg@arm.com        system.mem_mode = system.littleCluster.memoryMode()
23211936Sandreas.sandberg@arm.com        all_cpus += system.littleCluster.cpus
23311569Sgabor.dozsa@arm.com
23411936Sandreas.sandberg@arm.com    # Figure out the memory mode
23511936Sandreas.sandberg@arm.com    if options.big_cpus > 0 and options.little_cpus > 0 and \
23611936Sandreas.sandberg@arm.com       system.littleCluster.memoryMode() != system.littleCluster.memoryMode():
23711936Sandreas.sandberg@arm.com        m5.util.panic("Memory mode missmatch among CPU clusters")
23811569Sgabor.dozsa@arm.com
23911569Sgabor.dozsa@arm.com
24011630Sgabor.dozsa@arm.com    # create caches
24111630Sgabor.dozsa@arm.com    system.addCaches(options.caches, options.last_cache_level)
24211630Sgabor.dozsa@arm.com    if not options.caches:
24311630Sgabor.dozsa@arm.com        if options.big_cpus > 0 and system.bigCluster.requireCaches():
24411630Sgabor.dozsa@arm.com            m5.util.panic("Big CPU model requires caches")
24511630Sgabor.dozsa@arm.com        if options.little_cpus > 0 and system.littleCluster.requireCaches():
24611630Sgabor.dozsa@arm.com            m5.util.panic("Little CPU model requires caches")
24711569Sgabor.dozsa@arm.com
24811936Sandreas.sandberg@arm.com    # Create a KVM VM and do KVM-specific configuration
24911936Sandreas.sandberg@arm.com    if issubclass(big_model, KvmCluster):
25011936Sandreas.sandberg@arm.com        _build_kvm(system, all_cpus)
25111936Sandreas.sandberg@arm.com
25211569Sgabor.dozsa@arm.com    # Linux device tree
25311569Sgabor.dozsa@arm.com    system.dtb_filename = SysPaths.binary(options.dtb)
25411569Sgabor.dozsa@arm.com
25511843Sgabor.dozsa@arm.com    return root
25611843Sgabor.dozsa@arm.com
25711936Sandreas.sandberg@arm.comdef _build_kvm(system, cpus):
25811936Sandreas.sandberg@arm.com    system.kvm_vm = KvmVM()
25911936Sandreas.sandberg@arm.com
26011936Sandreas.sandberg@arm.com    # Assign KVM CPUs to their own event queues / threads. This
26111936Sandreas.sandberg@arm.com    # has to be done after creating caches and other child objects
26211936Sandreas.sandberg@arm.com    # since these mustn't inherit the CPU event queue.
26311936Sandreas.sandberg@arm.com    if len(cpus) > 1:
26411936Sandreas.sandberg@arm.com        device_eq = 0
26511936Sandreas.sandberg@arm.com        first_cpu_eq = 1
26611936Sandreas.sandberg@arm.com        for idx, cpu in enumerate(cpus):
26711936Sandreas.sandberg@arm.com            # Child objects usually inherit the parent's event
26811936Sandreas.sandberg@arm.com            # queue. Override that and use the same event queue for
26911936Sandreas.sandberg@arm.com            # all devices.
27011936Sandreas.sandberg@arm.com            for obj in cpu.descendants():
27111936Sandreas.sandberg@arm.com                obj.eventq_index = device_eq
27211936Sandreas.sandberg@arm.com            cpu.eventq_index = first_cpu_eq + idx
27311936Sandreas.sandberg@arm.com
27411936Sandreas.sandberg@arm.com
27511843Sgabor.dozsa@arm.com
27611935Sandreas.sandberg@arm.comdef instantiate(options, checkpoint_dir=None):
27711936Sandreas.sandberg@arm.com    # Setup the simulation quantum if we are running in PDES-mode
27811936Sandreas.sandberg@arm.com    # (e.g., when using KVM)
27911936Sandreas.sandberg@arm.com    root = Root.getInstance()
28011936Sandreas.sandberg@arm.com    if root and _using_pdes(root):
28111936Sandreas.sandberg@arm.com        m5.util.inform("Running in PDES mode with a %s simulation quantum.",
28211936Sandreas.sandberg@arm.com                       options.sim_quantum)
28311936Sandreas.sandberg@arm.com        root.sim_quantum = _to_ticks(options.sim_quantum)
28411936Sandreas.sandberg@arm.com
28511569Sgabor.dozsa@arm.com    # Get and load from the chkpt or simpoint checkpoint
28611935Sandreas.sandberg@arm.com    if options.restore_from:
28711935Sandreas.sandberg@arm.com        if checkpoint_dir and not os.path.isabs(options.restore_from):
28811935Sandreas.sandberg@arm.com            cpt = os.path.join(checkpoint_dir, options.restore_from)
28911935Sandreas.sandberg@arm.com        else:
29011935Sandreas.sandberg@arm.com            cpt = options.restore_from
29111935Sandreas.sandberg@arm.com
29211935Sandreas.sandberg@arm.com        m5.util.inform("Restoring from checkpoint %s", cpt)
29311935Sandreas.sandberg@arm.com        m5.instantiate(cpt)
29411569Sgabor.dozsa@arm.com    else:
29511569Sgabor.dozsa@arm.com        m5.instantiate()
29611569Sgabor.dozsa@arm.com
29711843Sgabor.dozsa@arm.com
29811843Sgabor.dozsa@arm.comdef run(checkpoint_dir=m5.options.outdir):
29911569Sgabor.dozsa@arm.com    # start simulation (and drop checkpoints when requested)
30011569Sgabor.dozsa@arm.com    while True:
30111569Sgabor.dozsa@arm.com        event = m5.simulate()
30211569Sgabor.dozsa@arm.com        exit_msg = event.getCause()
30311569Sgabor.dozsa@arm.com        if exit_msg == "checkpoint":
30411569Sgabor.dozsa@arm.com            print "Dropping checkpoint at tick %d" % m5.curTick()
30511843Sgabor.dozsa@arm.com            cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
30611843Sgabor.dozsa@arm.com            m5.checkpoint(cpt_dir)
30711569Sgabor.dozsa@arm.com            print "Checkpoint done."
30811569Sgabor.dozsa@arm.com        else:
30911569Sgabor.dozsa@arm.com            print exit_msg, " @ ", m5.curTick()
31011569Sgabor.dozsa@arm.com            break
31111569Sgabor.dozsa@arm.com
31211569Sgabor.dozsa@arm.com    sys.exit(event.getCode())
31311569Sgabor.dozsa@arm.com
31411569Sgabor.dozsa@arm.com
31511843Sgabor.dozsa@arm.comdef main():
31611843Sgabor.dozsa@arm.com    parser = argparse.ArgumentParser(
31711843Sgabor.dozsa@arm.com        description="Generic ARM big.LITTLE configuration")
31811843Sgabor.dozsa@arm.com    addOptions(parser)
31911843Sgabor.dozsa@arm.com    options = parser.parse_args()
32011843Sgabor.dozsa@arm.com    root = build(options)
32111935Sandreas.sandberg@arm.com    instantiate(options)
32211843Sgabor.dozsa@arm.com    run()
32311843Sgabor.dozsa@arm.com
32411843Sgabor.dozsa@arm.com
32511569Sgabor.dozsa@arm.comif __name__ == "__m5_main__":
32611569Sgabor.dozsa@arm.com    main()
327