fs_bigLITTLE.py revision 11843
1# Copyright (c) 2016 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabor Dozsa 37# Andreas Sandberg 38 39# This is an example configuration script for full system simulation of 40# a generic ARM bigLITTLE system. 41 42 43import argparse 44import os 45import sys 46import m5 47from m5.objects import * 48 49m5.util.addToPath("../../") 50 51from common import SysPaths 52from common import CpuConfig 53 54import devices 55 56 57default_dtb = 'armv8_gem5_v1_big_little_2_2.dtb' 58default_kernel = 'vmlinux4.3.aarch64' 59default_disk = 'aarch64-ubuntu-trusty-headless.img' 60default_rcs = 'bootscript.rcS' 61 62default_mem_size= "2GB" 63 64 65class BigCluster(devices.CpuCluster): 66 def __init__(self, system, num_cpus, cpu_clock, 67 cpu_voltage="1.0V"): 68 cpu_config = [ CpuConfig.get("arm_detailed"), devices.L1I, devices.L1D, 69 devices.WalkCache, devices.L2 ] 70 super(BigCluster, self).__init__(system, num_cpus, cpu_clock, 71 cpu_voltage, *cpu_config) 72 73class LittleCluster(devices.CpuCluster): 74 def __init__(self, system, num_cpus, cpu_clock, 75 cpu_voltage="1.0V"): 76 cpu_config = [ CpuConfig.get("minor"), devices.L1I, devices.L1D, 77 devices.WalkCache, devices.L2 ] 78 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, 79 cpu_voltage, *cpu_config) 80 81 82def createSystem(caches, kernel, bootscript, disks=[]): 83 sys = devices.SimpleSystem(caches, default_mem_size, 84 kernel=SysPaths.binary(kernel), 85 readfile=bootscript, 86 machine_type="DTOnly") 87 88 sys.mem_ctrls = SimpleMemory(range=sys._mem_range) 89 sys.mem_ctrls.port = sys.membus.master 90 91 sys.connect() 92 93 # Attach disk images 94 if disks: 95 def cow_disk(image_file): 96 image = CowDiskImage() 97 image.child.image_file = SysPaths.disk(image_file) 98 return image 99 100 sys.disk_images = [ cow_disk(f) for f in disks ] 101 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img)) 102 for img in sys.disk_images ] 103 for dev in sys.pci_vio_block: 104 sys.attach_pci(dev) 105 106 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary) 107 108 return sys 109 110 111def addOptions(parser): 112 parser.add_argument("--restore-from", type=str, default=None, 113 help="Restore from checkpoint") 114 parser.add_argument("--dtb", type=str, default=default_dtb, 115 help="DTB file to load") 116 parser.add_argument("--kernel", type=str, default=default_kernel, 117 help="Linux kernel") 118 parser.add_argument("--disk", action="append", type=str, default=[], 119 help="Disks to instantiate") 120 parser.add_argument("--bootscript", type=str, default=default_rcs, 121 help="Linux bootscript") 122 parser.add_argument("--atomic", action="store_true", default=False, 123 help="Use atomic CPUs") 124 parser.add_argument("--kernel-init", type=str, default="/sbin/init", 125 help="Override init") 126 parser.add_argument("--big-cpus", type=int, default=1, 127 help="Number of big CPUs to instantiate") 128 parser.add_argument("--little-cpus", type=int, default=1, 129 help="Number of little CPUs to instantiate") 130 parser.add_argument("--caches", action="store_true", default=False, 131 help="Instantiate caches") 132 parser.add_argument("--last-cache-level", type=int, default=2, 133 help="Last level of caches (e.g. 3 for L3)") 134 parser.add_argument("--big-cpu-clock", type=str, default="2GHz", 135 help="Big CPU clock frequency") 136 parser.add_argument("--little-cpu-clock", type=str, default="1GHz", 137 help="Little CPU clock frequency") 138 return parser 139 140 141def build(options): 142 m5.ticks.fixGlobalFrequency() 143 144 kernel_cmd = [ 145 "earlyprintk=pl011,0x1c090000", 146 "console=ttyAMA0", 147 "lpj=19988480", 148 "norandmaps", 149 "loglevel=8", 150 "mem=%s" % default_mem_size, 151 "root=/dev/vda1", 152 "rw", 153 "init=%s" % options.kernel_init, 154 "vmalloc=768MB", 155 ] 156 157 root = Root(full_system=True) 158 159 disks = [default_disk] if len(options.disk) == 0 else options.disk 160 system = createSystem(options.caches, 161 options.kernel, 162 options.bootscript, 163 disks=disks) 164 165 root.system = system 166 system.boot_osflags = " ".join(kernel_cmd) 167 168 AtomicCluster = devices.AtomicCluster 169 170 if options.big_cpus + options.little_cpus == 0: 171 m5.util.panic("Empty CPU clusters") 172 173 # big cluster 174 if options.big_cpus > 0: 175 if options.atomic: 176 system.bigCluster = AtomicCluster(system, options.big_cpus, 177 options.big_cpu_clock) 178 else: 179 system.bigCluster = BigCluster(system, options.big_cpus, 180 options.big_cpu_clock) 181 mem_mode = system.bigCluster.memoryMode() 182 # little cluster 183 if options.little_cpus > 0: 184 if options.atomic: 185 system.littleCluster = AtomicCluster(system, options.little_cpus, 186 options.little_cpu_clock) 187 188 else: 189 system.littleCluster = LittleCluster(system, options.little_cpus, 190 options.little_cpu_clock) 191 mem_mode = system.littleCluster.memoryMode() 192 193 if options.big_cpus > 0 and options.little_cpus > 0: 194 if system.bigCluster.memoryMode() != system.littleCluster.memoryMode(): 195 m5.util.panic("Memory mode missmatch among CPU clusters") 196 system.mem_mode = mem_mode 197 198 # create caches 199 system.addCaches(options.caches, options.last_cache_level) 200 if not options.caches: 201 if options.big_cpus > 0 and system.bigCluster.requireCaches(): 202 m5.util.panic("Big CPU model requires caches") 203 if options.little_cpus > 0 and system.littleCluster.requireCaches(): 204 m5.util.panic("Little CPU model requires caches") 205 206 # Linux device tree 207 system.dtb_filename = SysPaths.binary(options.dtb) 208 209 return root 210 211 212def instantiate(checkpoint_path=None): 213 # Get and load from the chkpt or simpoint checkpoint 214 if checkpoint_path is not None: 215 m5.util.inform("Restoring from checkpoint %s", checkpoint_path) 216 m5.instantiate(checkpoint_path) 217 else: 218 m5.instantiate() 219 220 221def run(checkpoint_dir=m5.options.outdir): 222 # start simulation (and drop checkpoints when requested) 223 while True: 224 event = m5.simulate() 225 exit_msg = event.getCause() 226 if exit_msg == "checkpoint": 227 print "Dropping checkpoint at tick %d" % m5.curTick() 228 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick()) 229 m5.checkpoint(cpt_dir) 230 print "Checkpoint done." 231 else: 232 print exit_msg, " @ ", m5.curTick() 233 break 234 235 sys.exit(event.getCode()) 236 237 238def main(): 239 parser = argparse.ArgumentParser( 240 description="Generic ARM big.LITTLE configuration") 241 addOptions(parser) 242 options = parser.parse_args() 243 root = build(options) 244 instantiate(options.restore_from) 245 run() 246 247 248if __name__ == "__m5_main__": 249 main() 250