114178Sadrian.herrera@arm.com# Copyright (c) 2016-2017, 2019 ARM Limited
211569Sgabor.dozsa@arm.com# All rights reserved.
311569Sgabor.dozsa@arm.com#
411569Sgabor.dozsa@arm.com# The license below extends only to copyright in the software and shall
511569Sgabor.dozsa@arm.com# not be construed as granting a license to any other intellectual
611569Sgabor.dozsa@arm.com# property including but not limited to intellectual property relating
711569Sgabor.dozsa@arm.com# to a hardware implementation of the functionality of the software
811569Sgabor.dozsa@arm.com# licensed hereunder.  You may use the software subject to the license
911569Sgabor.dozsa@arm.com# terms below provided that you ensure that this notice is replicated
1011569Sgabor.dozsa@arm.com# unmodified and in its entirety in all distributions of the software,
1111569Sgabor.dozsa@arm.com# modified or unmodified, in source code or in binary form.
1211569Sgabor.dozsa@arm.com#
1311569Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without
1411569Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are
1511569Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright
1611569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer;
1711569Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright
1811569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the
1911569Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution;
2011569Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its
2111569Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from
2211569Sgabor.dozsa@arm.com# this software without specific prior written permission.
2311569Sgabor.dozsa@arm.com#
2411569Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2511569Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2611569Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2711569Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2811569Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2911569Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3011569Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3111569Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3211569Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3311569Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3411569Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3511569Sgabor.dozsa@arm.com#
3611569Sgabor.dozsa@arm.com# Authors: Gabor Dozsa
3711569Sgabor.dozsa@arm.com#          Andreas Sandberg
3811569Sgabor.dozsa@arm.com
3911569Sgabor.dozsa@arm.com# This is an example configuration script for full system simulation of
4011569Sgabor.dozsa@arm.com# a generic ARM bigLITTLE system.
4111569Sgabor.dozsa@arm.com
4211569Sgabor.dozsa@arm.com
4312564Sgabeblack@google.comfrom __future__ import print_function
4413774Sandreas.sandberg@arm.comfrom __future__ import absolute_import
4512564Sgabeblack@google.com
4611569Sgabor.dozsa@arm.comimport argparse
4711569Sgabor.dozsa@arm.comimport os
4811569Sgabor.dozsa@arm.comimport sys
4911569Sgabor.dozsa@arm.comimport m5
5011936Sandreas.sandberg@arm.comimport m5.util
5111569Sgabor.dozsa@arm.comfrom m5.objects import *
5211569Sgabor.dozsa@arm.com
5311682Sandreas.hansson@arm.comm5.util.addToPath("../../")
5411682Sandreas.hansson@arm.com
5511682Sandreas.hansson@arm.comfrom common import SysPaths
5611682Sandreas.hansson@arm.comfrom common import CpuConfig
5714178Sadrian.herrera@arm.comfrom common import PlatformConfig
5812097Sandreas.sandberg@arm.comfrom common.cores.arm import ex5_big, ex5_LITTLE
5911569Sgabor.dozsa@arm.com
6011569Sgabor.dozsa@arm.comimport devices
6111936Sandreas.sandberg@arm.comfrom devices import AtomicCluster, KvmCluster
6211569Sgabor.dozsa@arm.com
6311569Sgabor.dozsa@arm.com
6411569Sgabor.dozsa@arm.comdefault_disk = 'aarch64-ubuntu-trusty-headless.img'
6511569Sgabor.dozsa@arm.comdefault_rcs = 'bootscript.rcS'
6611569Sgabor.dozsa@arm.com
6711569Sgabor.dozsa@arm.comdefault_mem_size= "2GB"
6811569Sgabor.dozsa@arm.com
6911936Sandreas.sandberg@arm.comdef _to_ticks(value):
7011936Sandreas.sandberg@arm.com    """Helper function to convert a latency from string format to Ticks"""
7111936Sandreas.sandberg@arm.com
7211936Sandreas.sandberg@arm.com    return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
7311936Sandreas.sandberg@arm.com
7411936Sandreas.sandberg@arm.comdef _using_pdes(root):
7511936Sandreas.sandberg@arm.com    """Determine if the simulator is using multiple parallel event queues"""
7611936Sandreas.sandberg@arm.com
7711936Sandreas.sandberg@arm.com    for obj in root.descendants():
7811936Sandreas.sandberg@arm.com        if not m5.proxy.isproxy(obj.eventq_index) and \
7911936Sandreas.sandberg@arm.com               obj.eventq_index != root.eventq_index:
8011936Sandreas.sandberg@arm.com            return True
8111936Sandreas.sandberg@arm.com
8211936Sandreas.sandberg@arm.com    return False
8311936Sandreas.sandberg@arm.com
8411630Sgabor.dozsa@arm.com
8511630Sgabor.dozsa@arm.comclass BigCluster(devices.CpuCluster):
8611630Sgabor.dozsa@arm.com    def __init__(self, system, num_cpus, cpu_clock,
8711630Sgabor.dozsa@arm.com                 cpu_voltage="1.0V"):
8812029Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D,
8911630Sgabor.dozsa@arm.com                    devices.WalkCache, devices.L2 ]
9011630Sgabor.dozsa@arm.com        super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
9111630Sgabor.dozsa@arm.com                                         cpu_voltage, *cpu_config)
9211630Sgabor.dozsa@arm.com
9311630Sgabor.dozsa@arm.comclass LittleCluster(devices.CpuCluster):
9411630Sgabor.dozsa@arm.com    def __init__(self, system, num_cpus, cpu_clock,
9511630Sgabor.dozsa@arm.com                 cpu_voltage="1.0V"):
9612029Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D,
9711630Sgabor.dozsa@arm.com                       devices.WalkCache, devices.L2 ]
9811630Sgabor.dozsa@arm.com        super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
9911630Sgabor.dozsa@arm.com                                         cpu_voltage, *cpu_config)
10011630Sgabor.dozsa@arm.com
10112028Spierre-yves.peneau@lirmm.frclass Ex5BigCluster(devices.CpuCluster):
10212028Spierre-yves.peneau@lirmm.fr    def __init__(self, system, num_cpus, cpu_clock,
10312028Spierre-yves.peneau@lirmm.fr                 cpu_voltage="1.0V"):
10412028Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
10512028Spierre-yves.peneau@lirmm.fr                    ex5_big.WalkCache, ex5_big.L2 ]
10612028Spierre-yves.peneau@lirmm.fr        super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
10712028Spierre-yves.peneau@lirmm.fr                                         cpu_voltage, *cpu_config)
10812028Spierre-yves.peneau@lirmm.fr
10912028Spierre-yves.peneau@lirmm.frclass Ex5LittleCluster(devices.CpuCluster):
11012028Spierre-yves.peneau@lirmm.fr    def __init__(self, system, num_cpus, cpu_clock,
11112028Spierre-yves.peneau@lirmm.fr                 cpu_voltage="1.0V"):
11212028Spierre-yves.peneau@lirmm.fr        cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
11312028Spierre-yves.peneau@lirmm.fr                    ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
11412028Spierre-yves.peneau@lirmm.fr        super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
11512028Spierre-yves.peneau@lirmm.fr                                         cpu_voltage, *cpu_config)
11611630Sgabor.dozsa@arm.com
11714178Sadrian.herrera@arm.comdef createSystem(caches, kernel, bootscript,
11814178Sadrian.herrera@arm.com                 machine_type="VExpress_GEM5", disks=[]):
11914178Sadrian.herrera@arm.com    platform = PlatformConfig.get(machine_type)
12014178Sadrian.herrera@arm.com    m5.util.inform("Simulated platform: %s", platform.__name__)
12114178Sadrian.herrera@arm.com
12214178Sadrian.herrera@arm.com    sys = devices.SimpleSystem(caches, default_mem_size, platform(),
12311756Sgabor.dozsa@arm.com                               kernel=SysPaths.binary(kernel),
12412153Sandreas.sandberg@arm.com                               readfile=bootscript)
12511569Sgabor.dozsa@arm.com
12612166Sandreas.sandberg@arm.com    sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master)
12712166Sandreas.sandberg@arm.com                      for r in sys.mem_ranges ]
12811569Sgabor.dozsa@arm.com
12911569Sgabor.dozsa@arm.com    sys.connect()
13011569Sgabor.dozsa@arm.com
13111569Sgabor.dozsa@arm.com    # Attach disk images
13211569Sgabor.dozsa@arm.com    if disks:
13311569Sgabor.dozsa@arm.com        def cow_disk(image_file):
13411569Sgabor.dozsa@arm.com            image = CowDiskImage()
13511569Sgabor.dozsa@arm.com            image.child.image_file = SysPaths.disk(image_file)
13611569Sgabor.dozsa@arm.com            return image
13711569Sgabor.dozsa@arm.com
13811569Sgabor.dozsa@arm.com        sys.disk_images = [ cow_disk(f) for f in disks ]
13911569Sgabor.dozsa@arm.com        sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
14011569Sgabor.dozsa@arm.com                              for img in sys.disk_images ]
14111569Sgabor.dozsa@arm.com        for dev in sys.pci_vio_block:
14211569Sgabor.dozsa@arm.com            sys.attach_pci(dev)
14311569Sgabor.dozsa@arm.com
14411569Sgabor.dozsa@arm.com    sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
14511569Sgabor.dozsa@arm.com
14611569Sgabor.dozsa@arm.com    return sys
14711569Sgabor.dozsa@arm.com
14811936Sandreas.sandberg@arm.comcpu_types = {
14911936Sandreas.sandberg@arm.com    "atomic" : (AtomicCluster, AtomicCluster),
15011936Sandreas.sandberg@arm.com    "timing" : (BigCluster, LittleCluster),
15112028Spierre-yves.peneau@lirmm.fr    "exynos" : (Ex5BigCluster, Ex5LittleCluster),
15211936Sandreas.sandberg@arm.com}
15311936Sandreas.sandberg@arm.com
15411936Sandreas.sandberg@arm.com# Only add the KVM CPU if it has been compiled into gem5
15511936Sandreas.sandberg@arm.comif devices.have_kvm:
15611936Sandreas.sandberg@arm.com    cpu_types["kvm"] = (KvmCluster, KvmCluster)
15711936Sandreas.sandberg@arm.com
15811569Sgabor.dozsa@arm.com
15911843Sgabor.dozsa@arm.comdef addOptions(parser):
16011569Sgabor.dozsa@arm.com    parser.add_argument("--restore-from", type=str, default=None,
16111569Sgabor.dozsa@arm.com                        help="Restore from checkpoint")
16212476SCurtis.Dunham@arm.com    parser.add_argument("--dtb", type=str, default=None,
16311569Sgabor.dozsa@arm.com                        help="DTB file to load")
16414178Sadrian.herrera@arm.com    parser.add_argument("--kernel", type=str, required=True,
16511569Sgabor.dozsa@arm.com                        help="Linux kernel")
16614178Sadrian.herrera@arm.com    parser.add_argument("--root", type=str, default="/dev/vda1",
16714178Sadrian.herrera@arm.com                        help="Specify the kernel CLI root= argument")
16814178Sadrian.herrera@arm.com    parser.add_argument("--machine-type", type=str,
16914178Sadrian.herrera@arm.com                        choices=PlatformConfig.platform_names(),
17014178Sadrian.herrera@arm.com                        default="VExpress_GEM5",
17114178Sadrian.herrera@arm.com                        help="Hardware platform class")
17211569Sgabor.dozsa@arm.com    parser.add_argument("--disk", action="append", type=str, default=[],
17311569Sgabor.dozsa@arm.com                        help="Disks to instantiate")
17411569Sgabor.dozsa@arm.com    parser.add_argument("--bootscript", type=str, default=default_rcs,
17511569Sgabor.dozsa@arm.com                        help="Linux bootscript")
17611936Sandreas.sandberg@arm.com    parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
17711936Sandreas.sandberg@arm.com                        default="timing",
17811936Sandreas.sandberg@arm.com                        help="CPU simulation mode. Default: %(default)s")
17911569Sgabor.dozsa@arm.com    parser.add_argument("--kernel-init", type=str, default="/sbin/init",
18011569Sgabor.dozsa@arm.com                        help="Override init")
18111569Sgabor.dozsa@arm.com    parser.add_argument("--big-cpus", type=int, default=1,
18211569Sgabor.dozsa@arm.com                        help="Number of big CPUs to instantiate")
18311569Sgabor.dozsa@arm.com    parser.add_argument("--little-cpus", type=int, default=1,
18411569Sgabor.dozsa@arm.com                        help="Number of little CPUs to instantiate")
18511569Sgabor.dozsa@arm.com    parser.add_argument("--caches", action="store_true", default=False,
18611569Sgabor.dozsa@arm.com                        help="Instantiate caches")
18711569Sgabor.dozsa@arm.com    parser.add_argument("--last-cache-level", type=int, default=2,
18811569Sgabor.dozsa@arm.com                        help="Last level of caches (e.g. 3 for L3)")
18911569Sgabor.dozsa@arm.com    parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
19011569Sgabor.dozsa@arm.com                        help="Big CPU clock frequency")
19111569Sgabor.dozsa@arm.com    parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
19211569Sgabor.dozsa@arm.com                        help="Little CPU clock frequency")
19311936Sandreas.sandberg@arm.com    parser.add_argument("--sim-quantum", type=str, default="1ms",
19411936Sandreas.sandberg@arm.com                        help="Simulation quantum for parallel simulation. " \
19511936Sandreas.sandberg@arm.com                        "Default: %(default)s")
19613357Sciro.santilli@arm.com    parser.add_argument("-P", "--param", action="append", default=[],
19713357Sciro.santilli@arm.com        help="Set a SimObject parameter relative to the root node. "
19813357Sciro.santilli@arm.com             "An extended Python multi range slicing syntax can be used "
19913357Sciro.santilli@arm.com             "for arrays. For example: "
20013357Sciro.santilli@arm.com             "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' "
20113357Sciro.santilli@arm.com             "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 "
20213357Sciro.santilli@arm.com             "Direct parameters of the root object are not accessible, "
20313357Sciro.santilli@arm.com             "only parameters of its children.")
20411843Sgabor.dozsa@arm.com    return parser
20511569Sgabor.dozsa@arm.com
20611843Sgabor.dozsa@arm.comdef build(options):
20711569Sgabor.dozsa@arm.com    m5.ticks.fixGlobalFrequency()
20811569Sgabor.dozsa@arm.com
20911569Sgabor.dozsa@arm.com    kernel_cmd = [
21011569Sgabor.dozsa@arm.com        "earlyprintk=pl011,0x1c090000",
21111569Sgabor.dozsa@arm.com        "console=ttyAMA0",
21211569Sgabor.dozsa@arm.com        "lpj=19988480",
21311569Sgabor.dozsa@arm.com        "norandmaps",
21411569Sgabor.dozsa@arm.com        "loglevel=8",
21511569Sgabor.dozsa@arm.com        "mem=%s" % default_mem_size,
21614178Sadrian.herrera@arm.com        "root=%s" % options.root,
21711569Sgabor.dozsa@arm.com        "rw",
21811569Sgabor.dozsa@arm.com        "init=%s" % options.kernel_init,
21911569Sgabor.dozsa@arm.com        "vmalloc=768MB",
22011569Sgabor.dozsa@arm.com    ]
22111569Sgabor.dozsa@arm.com
22211569Sgabor.dozsa@arm.com    root = Root(full_system=True)
22311569Sgabor.dozsa@arm.com
22411756Sgabor.dozsa@arm.com    disks = [default_disk] if len(options.disk) == 0 else options.disk
22511756Sgabor.dozsa@arm.com    system = createSystem(options.caches,
22611756Sgabor.dozsa@arm.com                          options.kernel,
22711756Sgabor.dozsa@arm.com                          options.bootscript,
22814178Sadrian.herrera@arm.com                          options.machine_type,
22911756Sgabor.dozsa@arm.com                          disks=disks)
23011569Sgabor.dozsa@arm.com
23111569Sgabor.dozsa@arm.com    root.system = system
23211569Sgabor.dozsa@arm.com    system.boot_osflags = " ".join(kernel_cmd)
23311569Sgabor.dozsa@arm.com
23411630Sgabor.dozsa@arm.com    if options.big_cpus + options.little_cpus == 0:
23511630Sgabor.dozsa@arm.com        m5.util.panic("Empty CPU clusters")
23611630Sgabor.dozsa@arm.com
23711936Sandreas.sandberg@arm.com    big_model, little_model = cpu_types[options.cpu_type]
23811936Sandreas.sandberg@arm.com
23911936Sandreas.sandberg@arm.com    all_cpus = []
24011569Sgabor.dozsa@arm.com    # big cluster
24111569Sgabor.dozsa@arm.com    if options.big_cpus > 0:
24211936Sandreas.sandberg@arm.com        system.bigCluster = big_model(system, options.big_cpus,
24311936Sandreas.sandberg@arm.com                                      options.big_cpu_clock)
24411936Sandreas.sandberg@arm.com        system.mem_mode = system.bigCluster.memoryMode()
24511936Sandreas.sandberg@arm.com        all_cpus += system.bigCluster.cpus
24611936Sandreas.sandberg@arm.com
24711630Sgabor.dozsa@arm.com    # little cluster
24811630Sgabor.dozsa@arm.com    if options.little_cpus > 0:
24911936Sandreas.sandberg@arm.com        system.littleCluster = little_model(system, options.little_cpus,
25011936Sandreas.sandberg@arm.com                                            options.little_cpu_clock)
25111936Sandreas.sandberg@arm.com        system.mem_mode = system.littleCluster.memoryMode()
25211936Sandreas.sandberg@arm.com        all_cpus += system.littleCluster.cpus
25311569Sgabor.dozsa@arm.com
25411936Sandreas.sandberg@arm.com    # Figure out the memory mode
25511936Sandreas.sandberg@arm.com    if options.big_cpus > 0 and options.little_cpus > 0 and \
25614032Swilly.mh.wolff.ml@gmail.com       system.bigCluster.memoryMode() != system.littleCluster.memoryMode():
25711936Sandreas.sandberg@arm.com        m5.util.panic("Memory mode missmatch among CPU clusters")
25811569Sgabor.dozsa@arm.com
25911569Sgabor.dozsa@arm.com
26011630Sgabor.dozsa@arm.com    # create caches
26111630Sgabor.dozsa@arm.com    system.addCaches(options.caches, options.last_cache_level)
26211630Sgabor.dozsa@arm.com    if not options.caches:
26311630Sgabor.dozsa@arm.com        if options.big_cpus > 0 and system.bigCluster.requireCaches():
26411630Sgabor.dozsa@arm.com            m5.util.panic("Big CPU model requires caches")
26511630Sgabor.dozsa@arm.com        if options.little_cpus > 0 and system.littleCluster.requireCaches():
26611630Sgabor.dozsa@arm.com            m5.util.panic("Little CPU model requires caches")
26711569Sgabor.dozsa@arm.com
26811936Sandreas.sandberg@arm.com    # Create a KVM VM and do KVM-specific configuration
26911936Sandreas.sandberg@arm.com    if issubclass(big_model, KvmCluster):
27011936Sandreas.sandberg@arm.com        _build_kvm(system, all_cpus)
27111936Sandreas.sandberg@arm.com
27211569Sgabor.dozsa@arm.com    # Linux device tree
27312476SCurtis.Dunham@arm.com    if options.dtb is not None:
27412476SCurtis.Dunham@arm.com        system.dtb_filename = SysPaths.binary(options.dtb)
27512476SCurtis.Dunham@arm.com    else:
27613608Sgiacomo.travaglini@arm.com        system.generateDtb(m5.options.outdir, 'system.dtb')
27711569Sgabor.dozsa@arm.com
27811843Sgabor.dozsa@arm.com    return root
27911843Sgabor.dozsa@arm.com
28011936Sandreas.sandberg@arm.comdef _build_kvm(system, cpus):
28111936Sandreas.sandberg@arm.com    system.kvm_vm = KvmVM()
28211936Sandreas.sandberg@arm.com
28311936Sandreas.sandberg@arm.com    # Assign KVM CPUs to their own event queues / threads. This
28411936Sandreas.sandberg@arm.com    # has to be done after creating caches and other child objects
28511936Sandreas.sandberg@arm.com    # since these mustn't inherit the CPU event queue.
28611936Sandreas.sandberg@arm.com    if len(cpus) > 1:
28711936Sandreas.sandberg@arm.com        device_eq = 0
28811936Sandreas.sandberg@arm.com        first_cpu_eq = 1
28911936Sandreas.sandberg@arm.com        for idx, cpu in enumerate(cpus):
29011936Sandreas.sandberg@arm.com            # Child objects usually inherit the parent's event
29111936Sandreas.sandberg@arm.com            # queue. Override that and use the same event queue for
29211936Sandreas.sandberg@arm.com            # all devices.
29311936Sandreas.sandberg@arm.com            for obj in cpu.descendants():
29411936Sandreas.sandberg@arm.com                obj.eventq_index = device_eq
29511936Sandreas.sandberg@arm.com            cpu.eventq_index = first_cpu_eq + idx
29611936Sandreas.sandberg@arm.com
29711936Sandreas.sandberg@arm.com
29811843Sgabor.dozsa@arm.com
29911935Sandreas.sandberg@arm.comdef instantiate(options, checkpoint_dir=None):
30011936Sandreas.sandberg@arm.com    # Setup the simulation quantum if we are running in PDES-mode
30111936Sandreas.sandberg@arm.com    # (e.g., when using KVM)
30211936Sandreas.sandberg@arm.com    root = Root.getInstance()
30311936Sandreas.sandberg@arm.com    if root and _using_pdes(root):
30411936Sandreas.sandberg@arm.com        m5.util.inform("Running in PDES mode with a %s simulation quantum.",
30511936Sandreas.sandberg@arm.com                       options.sim_quantum)
30611936Sandreas.sandberg@arm.com        root.sim_quantum = _to_ticks(options.sim_quantum)
30711936Sandreas.sandberg@arm.com
30811569Sgabor.dozsa@arm.com    # Get and load from the chkpt or simpoint checkpoint
30911935Sandreas.sandberg@arm.com    if options.restore_from:
31011935Sandreas.sandberg@arm.com        if checkpoint_dir and not os.path.isabs(options.restore_from):
31111935Sandreas.sandberg@arm.com            cpt = os.path.join(checkpoint_dir, options.restore_from)
31211935Sandreas.sandberg@arm.com        else:
31311935Sandreas.sandberg@arm.com            cpt = options.restore_from
31411935Sandreas.sandberg@arm.com
31511935Sandreas.sandberg@arm.com        m5.util.inform("Restoring from checkpoint %s", cpt)
31611935Sandreas.sandberg@arm.com        m5.instantiate(cpt)
31711569Sgabor.dozsa@arm.com    else:
31811569Sgabor.dozsa@arm.com        m5.instantiate()
31911569Sgabor.dozsa@arm.com
32011843Sgabor.dozsa@arm.com
32111843Sgabor.dozsa@arm.comdef run(checkpoint_dir=m5.options.outdir):
32211569Sgabor.dozsa@arm.com    # start simulation (and drop checkpoints when requested)
32311569Sgabor.dozsa@arm.com    while True:
32411569Sgabor.dozsa@arm.com        event = m5.simulate()
32511569Sgabor.dozsa@arm.com        exit_msg = event.getCause()
32611569Sgabor.dozsa@arm.com        if exit_msg == "checkpoint":
32712564Sgabeblack@google.com            print("Dropping checkpoint at tick %d" % m5.curTick())
32811843Sgabor.dozsa@arm.com            cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
32911843Sgabor.dozsa@arm.com            m5.checkpoint(cpt_dir)
33012564Sgabeblack@google.com            print("Checkpoint done.")
33111569Sgabor.dozsa@arm.com        else:
33212564Sgabeblack@google.com            print(exit_msg, " @ ", m5.curTick())
33311569Sgabor.dozsa@arm.com            break
33411569Sgabor.dozsa@arm.com
33511569Sgabor.dozsa@arm.com    sys.exit(event.getCode())
33611569Sgabor.dozsa@arm.com
33711569Sgabor.dozsa@arm.com
33811843Sgabor.dozsa@arm.comdef main():
33911843Sgabor.dozsa@arm.com    parser = argparse.ArgumentParser(
34011843Sgabor.dozsa@arm.com        description="Generic ARM big.LITTLE configuration")
34111843Sgabor.dozsa@arm.com    addOptions(parser)
34211843Sgabor.dozsa@arm.com    options = parser.parse_args()
34311843Sgabor.dozsa@arm.com    root = build(options)
34413357Sciro.santilli@arm.com    root.apply_config(options.param)
34511935Sandreas.sandberg@arm.com    instantiate(options)
34611843Sgabor.dozsa@arm.com    run()
34711843Sgabor.dozsa@arm.com
34811843Sgabor.dozsa@arm.com
34911569Sgabor.dozsa@arm.comif __name__ == "__m5_main__":
35011569Sgabor.dozsa@arm.com    main()
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