Simulation.py revision 9129
15347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
27534Ssteve.reinhardt@amd.com# Copyright (c) 2010 Advanced Micro Devices, Inc.
33395Shsul@eecs.umich.edu# All rights reserved.
43395Shsul@eecs.umich.edu#
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63395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
73395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
83395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
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133395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
143395Shsul@eecs.umich.edu# this software without specific prior written permission.
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273395Shsul@eecs.umich.edu#
283395Shsul@eecs.umich.edu# Authors: Lisa Hsu
293395Shsul@eecs.umich.edu
303395Shsul@eecs.umich.edufrom os import getcwd
313509Shsul@eecs.umich.edufrom os.path import join as joinpath
326654Snate@binkert.org
333395Shsul@eecs.umich.eduimport m5
346654Snate@binkert.orgfrom m5.defines import buildEnv
353395Shsul@eecs.umich.edufrom m5.objects import *
366654Snate@binkert.orgfrom m5.util import *
378724Srdreslin@umich.edufrom O3_ARM_v7a import *
386654Snate@binkert.org
396654Snate@binkert.orgaddToPath('../common')
403395Shsul@eecs.umich.edu
413481Shsul@eecs.umich.edudef setCPUClass(options):
423481Shsul@eecs.umich.edu
433481Shsul@eecs.umich.edu    atomic = False
448649Snilay@cs.wisc.edu    if options.cpu_type == "timing":
455347Ssaidi@eecs.umich.edu        class TmpClass(TimingSimpleCPU): pass
468724Srdreslin@umich.edu    elif options.cpu_type == "detailed" or options.cpu_type == "arm_detailed":
478718Snilay@cs.wisc.edu        if not options.caches and not options.ruby:
483681Sktlim@umich.edu            print "O3 CPU must be used with caches"
493681Sktlim@umich.edu            sys.exit(1)
508724Srdreslin@umich.edu        if options.cpu_type == "arm_detailed":
518724Srdreslin@umich.edu            class TmpClass(O3_ARM_v7a_3): pass
528724Srdreslin@umich.edu        else:
538724Srdreslin@umich.edu            class TmpClass(DerivO3CPU): pass
548649Snilay@cs.wisc.edu    elif options.cpu_type == "inorder":
555869Sksewell@umich.edu        if not options.caches:
565869Sksewell@umich.edu            print "InOrder CPU must be used with caches"
575869Sksewell@umich.edu            sys.exit(1)
585869Sksewell@umich.edu        class TmpClass(InOrderCPU): pass
593481Shsul@eecs.umich.edu    else:
605347Ssaidi@eecs.umich.edu        class TmpClass(AtomicSimpleCPU): pass
613481Shsul@eecs.umich.edu        atomic = True
623481Shsul@eecs.umich.edu
633481Shsul@eecs.umich.edu    CPUClass = None
643481Shsul@eecs.umich.edu    test_mem_mode = 'atomic'
653481Shsul@eecs.umich.edu
663481Shsul@eecs.umich.edu    if not atomic:
678689Snilay@cs.wisc.edu        if options.checkpoint_restore != None:
688689Snilay@cs.wisc.edu            if options.restore_with_cpu != options.cpu_type:
698689Snilay@cs.wisc.edu                CPUClass = TmpClass
708689Snilay@cs.wisc.edu                class TmpClass(AtomicSimpleCPU): pass
718689Snilay@cs.wisc.edu            else:
728689Snilay@cs.wisc.edu                if options.restore_with_cpu != "atomic":
738689Snilay@cs.wisc.edu                    test_mem_mode = 'timing'
748689Snilay@cs.wisc.edu
758689Snilay@cs.wisc.edu        elif options.fast_forward:
763481Shsul@eecs.umich.edu            CPUClass = TmpClass
775347Ssaidi@eecs.umich.edu            class TmpClass(AtomicSimpleCPU): pass
783481Shsul@eecs.umich.edu        else:
793481Shsul@eecs.umich.edu            test_mem_mode = 'timing'
803481Shsul@eecs.umich.edu
813481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
823481Shsul@eecs.umich.edu
838919Snilay@cs.wisc.edudef setWorkCountOptions(system, options):
848919Snilay@cs.wisc.edu    if options.work_item_id != None:
858919Snilay@cs.wisc.edu        system.work_item_id = options.work_item_id
868919Snilay@cs.wisc.edu    if options.work_begin_cpu_id_exit != None:
878919Snilay@cs.wisc.edu        system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
888919Snilay@cs.wisc.edu    if options.work_end_exit_count != None:
898919Snilay@cs.wisc.edu        system.work_end_exit_count = options.work_end_exit_count
908919Snilay@cs.wisc.edu    if options.work_end_checkpoint_count != None:
918919Snilay@cs.wisc.edu        system.work_end_ckpt_count = options.work_end_checkpoint_count
928919Snilay@cs.wisc.edu    if options.work_begin_exit_count != None:
938919Snilay@cs.wisc.edu        system.work_begin_exit_count = options.work_begin_exit_count
948919Snilay@cs.wisc.edu    if options.work_begin_checkpoint_count != None:
958919Snilay@cs.wisc.edu        system.work_begin_ckpt_count = options.work_begin_checkpoint_count
968919Snilay@cs.wisc.edu    if options.work_cpus_checkpoint_count != None:
978919Snilay@cs.wisc.edu        system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
983481Shsul@eecs.umich.edu
993481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
1003395Shsul@eecs.umich.edu    if options.maxtick:
1013395Shsul@eecs.umich.edu        maxtick = options.maxtick
1023395Shsul@eecs.umich.edu    elif options.maxtime:
1034167Sbinkertn@umich.edu        simtime = m5.ticks.seconds(simtime)
1043395Shsul@eecs.umich.edu        print "simulating for: ", simtime
1053395Shsul@eecs.umich.edu        maxtick = simtime
1063395Shsul@eecs.umich.edu    else:
1073511Shsul@eecs.umich.edu        maxtick = m5.MaxTick
1083395Shsul@eecs.umich.edu
1093395Shsul@eecs.umich.edu    if options.checkpoint_dir:
1103395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
1115211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
1125211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
1133395Shsul@eecs.umich.edu    else:
1143395Shsul@eecs.umich.edu        cptdir = getcwd()
1153395Shsul@eecs.umich.edu
1165370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
1176654Snate@binkert.org        fatal("Can't specify both --fast-forward and --checkpoint-restore")
1185370Ssaidi@eecs.umich.edu
1195371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
1206654Snate@binkert.org        fatal("Must specify --caches when using --standard-switch")
1215370Ssaidi@eecs.umich.edu
1223395Shsul@eecs.umich.edu    np = options.num_cpus
1233395Shsul@eecs.umich.edu    max_checkpoints = options.max_checkpoints
1243481Shsul@eecs.umich.edu    switch_cpus = None
1253481Shsul@eecs.umich.edu
1268318Sksewell@umich.edu    if options.prog_interval:
1276144Sksewell@umich.edu        for i in xrange(np):
1288311Sksewell@umich.edu            testsys.cpu[i].progress_interval = options.prog_interval
1296144Sksewell@umich.edu
1306641Sksewell@umich.edu    if options.maxinsts:
1316641Sksewell@umich.edu        for i in xrange(np):
1326641Sksewell@umich.edu            testsys.cpu[i].max_insts_any_thread = options.maxinsts
1336641Sksewell@umich.edu
1343481Shsul@eecs.umich.edu    if cpu_class:
1353481Shsul@eecs.umich.edu        switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
1363481Shsul@eecs.umich.edu                       for i in xrange(np)]
1373481Shsul@eecs.umich.edu
1383481Shsul@eecs.umich.edu        for i in xrange(np):
1395361Srstrong@cs.ucsd.edu            if options.fast_forward:
1405369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
1413481Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
1428803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
1439129Sandreas.hansson@arm.com            switch_cpus[i].clock = testsys.cpu[i].clock
1445369Ssaidi@eecs.umich.edu            # simulation period
1458311Sksewell@umich.edu            if options.maxinsts:
1468311Sksewell@umich.edu                switch_cpus[i].max_insts_any_thread = options.maxinsts
1478887Sgeoffrey.blake@arm.com            # Add checker cpu if selected
1488887Sgeoffrey.blake@arm.com            if options.checker:
1498887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
1503481Shsul@eecs.umich.edu
1515311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
1523481Shsul@eecs.umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
1533395Shsul@eecs.umich.edu
1543395Shsul@eecs.umich.edu    if options.standard_switch:
1558211Satgutier@umich.edu        if not options.caches:
1568211Satgutier@umich.edu            # O3 CPU must have a cache to work.
1578211Satgutier@umich.edu            print "O3 CPU must be used with caches"
1588211Satgutier@umich.edu            sys.exit(1)
1598211Satgutier@umich.edu
1603395Shsul@eecs.umich.edu        switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
1613395Shsul@eecs.umich.edu                       for i in xrange(np)]
1623478Shsul@eecs.umich.edu        switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
1633395Shsul@eecs.umich.edu                        for i in xrange(np)]
1643478Shsul@eecs.umich.edu
1653395Shsul@eecs.umich.edu        for i in xrange(np):
1663395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
1673478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
1688803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
1698803Sgblack@eecs.umich.edu            switch_cpus_1[i].workload = testsys.cpu[i].workload
1709129Sandreas.hansson@arm.com            switch_cpus[i].clock = testsys.cpu[i].clock
1719129Sandreas.hansson@arm.com            switch_cpus_1[i].clock = testsys.cpu[i].clock
1723480Shsul@eecs.umich.edu
1735361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
1745369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
1755361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
1765361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
1775361Srstrong@cs.ucsd.edu            elif options.fast_forward:
1785369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
1795361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
1805361Srstrong@cs.ucsd.edu            elif options.simpoint:
1815378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
1826654Snate@binkert.org                    fatal('simpoint not found')
1835361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
1845361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
1855361Srstrong@cs.ucsd.edu            # No distance specified, just switch
1865361Srstrong@cs.ucsd.edu            else:
1875361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
1885361Srstrong@cs.ucsd.edu
1895361Srstrong@cs.ucsd.edu            # warmup period
1905361Srstrong@cs.ucsd.edu            if options.warmup_insts:
1915361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
1925361Srstrong@cs.ucsd.edu
1935361Srstrong@cs.ucsd.edu            # simulation period
1948311Sksewell@umich.edu            if options.maxinsts:
1958311Sksewell@umich.edu                switch_cpus_1[i].max_insts_any_thread = options.maxinsts
1965353Svilas.sridharan@gmail.com
1978887Sgeoffrey.blake@arm.com            # attach the checker cpu if selected
1988887Sgeoffrey.blake@arm.com            if options.checker:
1998887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
2008887Sgeoffrey.blake@arm.com                switch_cpus_1[i].addCheckerCpu()
2018887Sgeoffrey.blake@arm.com
2028211Satgutier@umich.edu        testsys.switch_cpus = switch_cpus
2038211Satgutier@umich.edu        testsys.switch_cpus_1 = switch_cpus_1
2048211Satgutier@umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
2058211Satgutier@umich.edu        switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
2063395Shsul@eecs.umich.edu
2075361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
2085369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
2095361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
2105361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
2115361Srstrong@cs.ucsd.edu        # Set an instruction break point
2125361Srstrong@cs.ucsd.edu        if options.simpoint:
2135361Srstrong@cs.ucsd.edu            for i in xrange(np):
2145378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
2156654Snate@binkert.org                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
2165369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
2175361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
2185361Srstrong@cs.ucsd.edu                # used for output below
2195361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
2205361Srstrong@cs.ucsd.edu        else:
2215361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
2225361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
2235361Srstrong@cs.ucsd.edu            # for the upcoming simulation
2245361Srstrong@cs.ucsd.edu            for i in xrange(np):
2255361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
2265361Srstrong@cs.ucsd.edu
2277531Ssteve.reinhardt@amd.com    checkpoint_dir = None
2285369Ssaidi@eecs.umich.edu    if options.checkpoint_restore != None:
2295361Srstrong@cs.ucsd.edu        from os.path import isdir, exists
2303395Shsul@eecs.umich.edu        from os import listdir
2313395Shsul@eecs.umich.edu        import re
2323395Shsul@eecs.umich.edu
2333395Shsul@eecs.umich.edu        if not isdir(cptdir):
2346654Snate@binkert.org            fatal("checkpoint dir %s does not exist!", cptdir)
2353395Shsul@eecs.umich.edu
2367530Ssteve.reinhardt@amd.com        if options.at_instruction or options.simpoint:
2377530Ssteve.reinhardt@amd.com            inst = options.checkpoint_restore
2387530Ssteve.reinhardt@amd.com            if options.simpoint:
2397530Ssteve.reinhardt@amd.com                # assume workload 0 has the simpoint
2407530Ssteve.reinhardt@amd.com                if testsys.cpu[0].workload[0].simpoint == 0:
2417530Ssteve.reinhardt@amd.com                    fatal('Unable to find simpoint')
2427530Ssteve.reinhardt@amd.com                inst += int(testsys.cpu[0].workload[0].simpoint)
2437530Ssteve.reinhardt@amd.com
2447530Ssteve.reinhardt@amd.com            checkpoint_dir = joinpath(cptdir,
2457530Ssteve.reinhardt@amd.com                                      "cpt.%s.%s" % (options.bench, inst))
2465361Srstrong@cs.ucsd.edu            if not exists(checkpoint_dir):
2476654Snate@binkert.org                fatal("Unable to find checkpoint directory %s", checkpoint_dir)
2485361Srstrong@cs.ucsd.edu        else:
2495361Srstrong@cs.ucsd.edu            dirs = listdir(cptdir)
2505361Srstrong@cs.ucsd.edu            expr = re.compile('cpt\.([0-9]*)')
2515361Srstrong@cs.ucsd.edu            cpts = []
2525361Srstrong@cs.ucsd.edu            for dir in dirs:
2535361Srstrong@cs.ucsd.edu                match = expr.match(dir)
2545361Srstrong@cs.ucsd.edu                if match:
2555361Srstrong@cs.ucsd.edu                    cpts.append(match.group(1))
2563999Ssaidi@eecs.umich.edu
2575361Srstrong@cs.ucsd.edu            cpts.sort(lambda a,b: cmp(long(a), long(b)))
2585361Srstrong@cs.ucsd.edu
2595361Srstrong@cs.ucsd.edu            cpt_num = options.checkpoint_restore
2605361Srstrong@cs.ucsd.edu
2615361Srstrong@cs.ucsd.edu            if cpt_num > len(cpts):
2626654Snate@binkert.org                fatal('Checkpoint %d not found', cpt_num)
2635361Srstrong@cs.ucsd.edu
2645361Srstrong@cs.ucsd.edu            ## Adjust max tick based on our starting tick
2655361Srstrong@cs.ucsd.edu            maxtick = maxtick - int(cpts[cpt_num - 1])
2667531Ssteve.reinhardt@amd.com            checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
2675361Srstrong@cs.ucsd.edu
2687531Ssteve.reinhardt@amd.com    m5.instantiate(checkpoint_dir)
2693395Shsul@eecs.umich.edu
2703481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
2715361Srstrong@cs.ucsd.edu        if options.standard_switch:
2725361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
2735361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
2745361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
2755361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
2765361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
2775361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
2785361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
2795361Srstrong@cs.ucsd.edu        else:
2805361Srstrong@cs.ucsd.edu            print "Switch at curTick count:%s" % str(10000)
2815361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
2827766Sgblack@eecs.umich.edu        print "Switched CPUS @ tick %s" % (m5.curTick())
2833395Shsul@eecs.umich.edu
2845361Srstrong@cs.ucsd.edu        # when you change to Timing (or Atomic), you halt the system
2855361Srstrong@cs.ucsd.edu        # given as argument.  When you are finished with the system
2865361Srstrong@cs.ucsd.edu        # changes (including switchCpus), you must resume the system
2875361Srstrong@cs.ucsd.edu        # manually.  You DON'T need to resume after just switching
2885361Srstrong@cs.ucsd.edu        # CPUs if you haven't changed anything on the system level.
2893395Shsul@eecs.umich.edu
2903395Shsul@eecs.umich.edu        m5.changeToTiming(testsys)
2913395Shsul@eecs.umich.edu        m5.switchCpus(switch_cpu_list)
2923395Shsul@eecs.umich.edu        m5.resume(testsys)
2933395Shsul@eecs.umich.edu
2943481Shsul@eecs.umich.edu        if options.standard_switch:
2955361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%d" % \
2965361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus[0].max_insts_any_thread)
2975361Srstrong@cs.ucsd.edu
2985361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
2995361Srstrong@cs.ucsd.edu            if options.warmup_insts:
3005361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
3015361Srstrong@cs.ucsd.edu            else:
3025353Svilas.sridharan@gmail.com                exit_event = m5.simulate(options.warmup)
3037766Sgblack@eecs.umich.edu            print "Switching CPUS @ tick %s" % (m5.curTick())
3045361Srstrong@cs.ucsd.edu            print "Simulation ends instruction count:%d" % \
3055361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus_1[0].max_insts_any_thread)
3065072Ssaidi@eecs.umich.edu            m5.drain(testsys)
3073481Shsul@eecs.umich.edu            m5.switchCpus(switch_cpu_list1)
3085072Ssaidi@eecs.umich.edu            m5.resume(testsys)
3093395Shsul@eecs.umich.edu
3103395Shsul@eecs.umich.edu    num_checkpoints = 0
3113395Shsul@eecs.umich.edu    exit_cause = ''
3123395Shsul@eecs.umich.edu
3137489Ssteve.reinhardt@amd.com    # If we're taking and restoring checkpoints, use checkpoint_dir
3147489Ssteve.reinhardt@amd.com    # option only for finding the checkpoints to restore from.  This
3157489Ssteve.reinhardt@amd.com    # lets us test checkpointing by restoring from one set of
3167489Ssteve.reinhardt@amd.com    # checkpoints, generating a second set, and then comparing them.
3177489Ssteve.reinhardt@amd.com    if options.take_checkpoints and options.checkpoint_restore:
3187489Ssteve.reinhardt@amd.com        if m5.options.outdir:
3197489Ssteve.reinhardt@amd.com            cptdir = m5.options.outdir
3207489Ssteve.reinhardt@amd.com        else:
3217489Ssteve.reinhardt@amd.com            cptdir = getcwd()
3227489Ssteve.reinhardt@amd.com
3235361Srstrong@cs.ucsd.edu    # Checkpoints being taken via the command line at <when> and at
3245361Srstrong@cs.ucsd.edu    # subsequent periods of <period>.  Checkpoint instructions
3255361Srstrong@cs.ucsd.edu    # received from the benchmark running are ignored and skipped in
3265361Srstrong@cs.ucsd.edu    # favor of command line checkpoint instructions.
3275369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
3285361Srstrong@cs.ucsd.edu        if options.at_instruction or options.simpoint:
3295369Ssaidi@eecs.umich.edu            checkpoint_inst = int(options.take_checkpoints)
3303395Shsul@eecs.umich.edu
3315361Srstrong@cs.ucsd.edu            # maintain correct offset if we restored from some instruction
3325369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
3335361Srstrong@cs.ucsd.edu                checkpoint_inst += options.checkpoint_restore
3343395Shsul@eecs.umich.edu
3355361Srstrong@cs.ucsd.edu            print "Creating checkpoint at inst:%d" % (checkpoint_inst)
3365361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
3375361Srstrong@cs.ucsd.edu            print "exit cause = %s" % (exit_event.getCause())
3383395Shsul@eecs.umich.edu
3395361Srstrong@cs.ucsd.edu            # skip checkpoint instructions should they exist
3405361Srstrong@cs.ucsd.edu            while exit_event.getCause() == "checkpoint":
3415361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
3423999Ssaidi@eecs.umich.edu
3435361Srstrong@cs.ucsd.edu            if exit_event.getCause() == \
3445361Srstrong@cs.ucsd.edu                   "a thread reached the max instruction count":
3457525Ssteve.reinhardt@amd.com                m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
3465361Srstrong@cs.ucsd.edu                        (options.bench, checkpoint_inst)))
3475361Srstrong@cs.ucsd.edu                print "Checkpoint written."
3485361Srstrong@cs.ucsd.edu                num_checkpoints += 1
3493999Ssaidi@eecs.umich.edu
3505361Srstrong@cs.ucsd.edu            if exit_event.getCause() == "user interrupt received":
3515361Srstrong@cs.ucsd.edu                exit_cause = exit_event.getCause();
3525361Srstrong@cs.ucsd.edu        else:
3535369Ssaidi@eecs.umich.edu            when, period = options.take_checkpoints.split(",", 1)
3545369Ssaidi@eecs.umich.edu            when = int(when)
3555369Ssaidi@eecs.umich.edu            period = int(period)
3565369Ssaidi@eecs.umich.edu
3575361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(when)
3585361Srstrong@cs.ucsd.edu            while exit_event.getCause() == "checkpoint":
3595361Srstrong@cs.ucsd.edu                exit_event = m5.simulate(when - m5.curTick())
3605361Srstrong@cs.ucsd.edu
3615361Srstrong@cs.ucsd.edu            if exit_event.getCause() == "simulate() limit reached":
3627525Ssteve.reinhardt@amd.com                m5.checkpoint(joinpath(cptdir, "cpt.%d"))
3635361Srstrong@cs.ucsd.edu                num_checkpoints += 1
3645361Srstrong@cs.ucsd.edu
3655361Srstrong@cs.ucsd.edu            sim_ticks = when
3665361Srstrong@cs.ucsd.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
3675361Srstrong@cs.ucsd.edu            while num_checkpoints < max_checkpoints and \
3685361Srstrong@cs.ucsd.edu                    exit_event.getCause() == "simulate() limit reached":
3695361Srstrong@cs.ucsd.edu                if (sim_ticks + period) > maxtick:
3705361Srstrong@cs.ucsd.edu                    exit_event = m5.simulate(maxtick - sim_ticks)
3715361Srstrong@cs.ucsd.edu                    exit_cause = exit_event.getCause()
3725361Srstrong@cs.ucsd.edu                    break
3735361Srstrong@cs.ucsd.edu                else:
3745361Srstrong@cs.ucsd.edu                    exit_event = m5.simulate(period)
3755361Srstrong@cs.ucsd.edu                    sim_ticks += period
3765361Srstrong@cs.ucsd.edu                    while exit_event.getCause() == "checkpoint":
3775361Srstrong@cs.ucsd.edu                        exit_event = m5.simulate(sim_ticks - m5.curTick())
3785361Srstrong@cs.ucsd.edu                    if exit_event.getCause() == "simulate() limit reached":
3797525Ssteve.reinhardt@amd.com                        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
3805361Srstrong@cs.ucsd.edu                        num_checkpoints += 1
3815361Srstrong@cs.ucsd.edu
3825361Srstrong@cs.ucsd.edu            if exit_event.getCause() != "simulate() limit reached":
3835361Srstrong@cs.ucsd.edu                exit_cause = exit_event.getCause();
3845361Srstrong@cs.ucsd.edu
3855361Srstrong@cs.ucsd.edu    else: # no checkpoints being taken via this script
3865361Srstrong@cs.ucsd.edu        if options.fast_forward:
3875361Srstrong@cs.ucsd.edu            m5.stats.reset()
3885361Srstrong@cs.ucsd.edu        print "**** REAL SIMULATION ****"
3893395Shsul@eecs.umich.edu        exit_event = m5.simulate(maxtick)
3903395Shsul@eecs.umich.edu
3913395Shsul@eecs.umich.edu        while exit_event.getCause() == "checkpoint":
3927525Ssteve.reinhardt@amd.com            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
3933395Shsul@eecs.umich.edu            num_checkpoints += 1
3943395Shsul@eecs.umich.edu            if num_checkpoints == max_checkpoints:
3955361Srstrong@cs.ucsd.edu                exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
3963395Shsul@eecs.umich.edu                break
3973395Shsul@eecs.umich.edu
3983511Shsul@eecs.umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
3993395Shsul@eecs.umich.edu            exit_cause = exit_event.getCause()
4003395Shsul@eecs.umich.edu
4013395Shsul@eecs.umich.edu    if exit_cause == '':
4023395Shsul@eecs.umich.edu        exit_cause = exit_event.getCause()
4037766Sgblack@eecs.umich.edu    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
4043395Shsul@eecs.umich.edu
4056776SBrad.Beckmann@amd.com    if options.checkpoint_at_end:
4067525Ssteve.reinhardt@amd.com        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
4076776SBrad.Beckmann@amd.com
408