Simulation.py revision 12880
19793Sakash.bagdia@arm.com# Copyright (c) 2012-2013 ARM Limited
29518SAndreas.Sandberg@ARM.com# All rights reserved
311320Ssteve.reinhardt@amd.com#
49518SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
59518SAndreas.Sandberg@ARM.com# not be construed as granting a license to any other intellectual
69518SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79518SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89518SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99518SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
109518SAndreas.Sandberg@ARM.com# unmodified and in its entirety in all distributions of the software,
119518SAndreas.Sandberg@ARM.com# modified or unmodified, in source code or in binary form.
129518SAndreas.Sandberg@ARM.com#
135347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
147534Ssteve.reinhardt@amd.com# Copyright (c) 2010 Advanced Micro Devices, Inc.
153395Shsul@eecs.umich.edu# All rights reserved.
163395Shsul@eecs.umich.edu#
173395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
183395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
193395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
203395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
213395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
223395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
233395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution;
243395Shsul@eecs.umich.edu# neither the name of the copyright holders nor the names of its
253395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
263395Shsul@eecs.umich.edu# this software without specific prior written permission.
273395Shsul@eecs.umich.edu#
283395Shsul@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
293395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
303395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
323395Shsul@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
333395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
343395Shsul@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
353395Shsul@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
363395Shsul@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
373395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
383395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
393395Shsul@eecs.umich.edu#
403395Shsul@eecs.umich.edu# Authors: Lisa Hsu
413395Shsul@eecs.umich.edu
4212564Sgabeblack@google.comfrom __future__ import print_function
4312564Sgabeblack@google.com
449457Svilanova@ac.upc.eduimport sys
453395Shsul@eecs.umich.edufrom os import getcwd
463509Shsul@eecs.umich.edufrom os.path import join as joinpath
476654Snate@binkert.org
4811688Sandreas.hansson@arm.comfrom common import CpuConfig
4911688Sandreas.hansson@arm.comfrom common import MemConfig
509520SAndreas.Sandberg@ARM.com
513395Shsul@eecs.umich.eduimport m5
526654Snate@binkert.orgfrom m5.defines import buildEnv
533395Shsul@eecs.umich.edufrom m5.objects import *
546654Snate@binkert.orgfrom m5.util import *
556654Snate@binkert.org
566654Snate@binkert.orgaddToPath('../common')
573395Shsul@eecs.umich.edu
589139Snilay@cs.wisc.edudef getCPUClass(cpu_type):
599520SAndreas.Sandberg@ARM.com    """Returns the required cpu class and the mode of operation."""
609520SAndreas.Sandberg@ARM.com    cls = CpuConfig.get(cpu_type)
619520SAndreas.Sandberg@ARM.com    return cls, cls.memory_mode()
629139Snilay@cs.wisc.edu
633481Shsul@eecs.umich.edudef setCPUClass(options):
649139Snilay@cs.wisc.edu    """Returns two cpu classes and the initial mode of operation.
653481Shsul@eecs.umich.edu
669139Snilay@cs.wisc.edu       Restoring from a checkpoint or fast forwarding through a benchmark
679139Snilay@cs.wisc.edu       can be done using one type of cpu, and then the actual
689139Snilay@cs.wisc.edu       simulation can be carried out using another type. This function
699139Snilay@cs.wisc.edu       returns these two types of cpus and the initial mode of operation
709139Snilay@cs.wisc.edu       depending on the options provided.
719139Snilay@cs.wisc.edu    """
729139Snilay@cs.wisc.edu
739139Snilay@cs.wisc.edu    TmpClass, test_mem_mode = getCPUClass(options.cpu_type)
743481Shsul@eecs.umich.edu    CPUClass = None
759518SAndreas.Sandberg@ARM.com    if TmpClass.require_caches() and \
769518SAndreas.Sandberg@ARM.com            not options.caches and not options.ruby:
779518SAndreas.Sandberg@ARM.com        fatal("%s must be used with caches" % options.cpu_type)
783481Shsul@eecs.umich.edu
799139Snilay@cs.wisc.edu    if options.checkpoint_restore != None:
809139Snilay@cs.wisc.edu        if options.restore_with_cpu != options.cpu_type:
813481Shsul@eecs.umich.edu            CPUClass = TmpClass
829139Snilay@cs.wisc.edu            TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu)
839139Snilay@cs.wisc.edu    elif options.fast_forward:
849139Snilay@cs.wisc.edu        CPUClass = TmpClass
859139Snilay@cs.wisc.edu        TmpClass = AtomicSimpleCPU
869139Snilay@cs.wisc.edu        test_mem_mode = 'atomic'
873481Shsul@eecs.umich.edu
8812395Sswapnilster@gmail.com    # Ruby only supports atomic accesses in noncaching mode
8912395Sswapnilster@gmail.com    if test_mem_mode == 'atomic' and options.ruby:
9012395Sswapnilster@gmail.com        warn("Memory mode will be changed to atomic_noncaching")
9112395Sswapnilster@gmail.com        test_mem_mode = 'atomic_noncaching'
9212395Sswapnilster@gmail.com
933481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
943481Shsul@eecs.umich.edu
959665Sandreas.hansson@arm.comdef setMemClass(options):
969665Sandreas.hansson@arm.com    """Returns a memory controller class."""
979665Sandreas.hansson@arm.com
989665Sandreas.hansson@arm.com    return MemConfig.get(options.mem_type)
999665Sandreas.hansson@arm.com
1008919Snilay@cs.wisc.edudef setWorkCountOptions(system, options):
1018919Snilay@cs.wisc.edu    if options.work_item_id != None:
1028919Snilay@cs.wisc.edu        system.work_item_id = options.work_item_id
10310159Sgedare@rtems.org    if options.num_work_ids != None:
10410159Sgedare@rtems.org        system.num_work_ids = options.num_work_ids
1058919Snilay@cs.wisc.edu    if options.work_begin_cpu_id_exit != None:
1068919Snilay@cs.wisc.edu        system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
1078919Snilay@cs.wisc.edu    if options.work_end_exit_count != None:
1088919Snilay@cs.wisc.edu        system.work_end_exit_count = options.work_end_exit_count
1098919Snilay@cs.wisc.edu    if options.work_end_checkpoint_count != None:
1108919Snilay@cs.wisc.edu        system.work_end_ckpt_count = options.work_end_checkpoint_count
1118919Snilay@cs.wisc.edu    if options.work_begin_exit_count != None:
1128919Snilay@cs.wisc.edu        system.work_begin_exit_count = options.work_begin_exit_count
1138919Snilay@cs.wisc.edu    if options.work_begin_checkpoint_count != None:
1148919Snilay@cs.wisc.edu        system.work_begin_ckpt_count = options.work_begin_checkpoint_count
1158919Snilay@cs.wisc.edu    if options.work_cpus_checkpoint_count != None:
1168919Snilay@cs.wisc.edu        system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
1173481Shsul@eecs.umich.edu
1189816Sjthestness@gmail.comdef findCptDir(options, cptdir, testsys):
1199140Snilay@cs.wisc.edu    """Figures out the directory from which the checkpointed state is read.
1209140Snilay@cs.wisc.edu
1219140Snilay@cs.wisc.edu    There are two different ways in which the directories holding checkpoints
1229140Snilay@cs.wisc.edu    can be named --
1239140Snilay@cs.wisc.edu    1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
1249140Snilay@cs.wisc.edu    2. cpt.<some number, usually the tick value when the checkpoint was taken>
1259140Snilay@cs.wisc.edu
1269140Snilay@cs.wisc.edu    This function parses through the options to figure out which one of the
1279140Snilay@cs.wisc.edu    above should be used for selecting the checkpoint, and then figures out
1289140Snilay@cs.wisc.edu    the appropriate directory.
1299140Snilay@cs.wisc.edu    """
1309140Snilay@cs.wisc.edu
1319140Snilay@cs.wisc.edu    from os.path import isdir, exists
1329140Snilay@cs.wisc.edu    from os import listdir
1339140Snilay@cs.wisc.edu    import re
1349140Snilay@cs.wisc.edu
1359140Snilay@cs.wisc.edu    if not isdir(cptdir):
1369140Snilay@cs.wisc.edu        fatal("checkpoint dir %s does not exist!", cptdir)
1379140Snilay@cs.wisc.edu
1389867Sjthestness@gmail.com    cpt_starttick = 0
1399140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
1409140Snilay@cs.wisc.edu        inst = options.checkpoint_restore
1419140Snilay@cs.wisc.edu        if options.simpoint:
1429140Snilay@cs.wisc.edu            # assume workload 0 has the simpoint
1439140Snilay@cs.wisc.edu            if testsys.cpu[0].workload[0].simpoint == 0:
1449140Snilay@cs.wisc.edu                fatal('Unable to find simpoint')
1459140Snilay@cs.wisc.edu            inst += int(testsys.cpu[0].workload[0].simpoint)
1469140Snilay@cs.wisc.edu
1479140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % (options.bench, inst))
1489140Snilay@cs.wisc.edu        if not exists(checkpoint_dir):
1499140Snilay@cs.wisc.edu            fatal("Unable to find checkpoint directory %s", checkpoint_dir)
15010608Sdam.sunwoo@arm.com
15110608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint:
15210608Sdam.sunwoo@arm.com        # Restore from SimPoint checkpoints
15310608Sdam.sunwoo@arm.com        # Assumes that the checkpoint dir names are formatted as follows:
15410608Sdam.sunwoo@arm.com        dirs = listdir(cptdir)
15510608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.simpoint_(\d+)_inst_(\d+)' +
15610608Sdam.sunwoo@arm.com                    '_weight_([\d\.e\-]+)_interval_(\d+)_warmup_(\d+)')
15710608Sdam.sunwoo@arm.com        cpts = []
15810608Sdam.sunwoo@arm.com        for dir in dirs:
15910608Sdam.sunwoo@arm.com            match = expr.match(dir)
16010608Sdam.sunwoo@arm.com            if match:
16110608Sdam.sunwoo@arm.com                cpts.append(dir)
16210608Sdam.sunwoo@arm.com        cpts.sort()
16310608Sdam.sunwoo@arm.com
16410608Sdam.sunwoo@arm.com        cpt_num = options.checkpoint_restore
16510608Sdam.sunwoo@arm.com        if cpt_num > len(cpts):
16610608Sdam.sunwoo@arm.com            fatal('Checkpoint %d not found', cpt_num)
16710608Sdam.sunwoo@arm.com        checkpoint_dir = joinpath(cptdir, cpts[cpt_num - 1])
16810608Sdam.sunwoo@arm.com        match = expr.match(cpts[cpt_num - 1])
16910608Sdam.sunwoo@arm.com        if match:
17010608Sdam.sunwoo@arm.com            index = int(match.group(1))
17110608Sdam.sunwoo@arm.com            start_inst = int(match.group(2))
17210608Sdam.sunwoo@arm.com            weight_inst = float(match.group(3))
17310608Sdam.sunwoo@arm.com            interval_length = int(match.group(4))
17410608Sdam.sunwoo@arm.com            warmup_length = int(match.group(5))
17512564Sgabeblack@google.com        print("Resuming from", checkpoint_dir)
17610608Sdam.sunwoo@arm.com        simpoint_start_insts = []
17710608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length)
17810608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length + interval_length)
17910608Sdam.sunwoo@arm.com        testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
18010608Sdam.sunwoo@arm.com        if testsys.switch_cpus != None:
18110608Sdam.sunwoo@arm.com            testsys.switch_cpus[0].simpoint_start_insts = simpoint_start_insts
18210608Sdam.sunwoo@arm.com
18312564Sgabeblack@google.com        print("Resuming from SimPoint", end=' ')
18412564Sgabeblack@google.com        print("#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" %
18512564Sgabeblack@google.com            (index, start_inst, weight_inst, interval_length, warmup_length))
18610608Sdam.sunwoo@arm.com
1879140Snilay@cs.wisc.edu    else:
1889140Snilay@cs.wisc.edu        dirs = listdir(cptdir)
18910608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.([0-9]+)')
1909140Snilay@cs.wisc.edu        cpts = []
1919140Snilay@cs.wisc.edu        for dir in dirs:
1929140Snilay@cs.wisc.edu            match = expr.match(dir)
1939140Snilay@cs.wisc.edu            if match:
1949140Snilay@cs.wisc.edu                cpts.append(match.group(1))
1959140Snilay@cs.wisc.edu
1969140Snilay@cs.wisc.edu        cpts.sort(lambda a,b: cmp(long(a), long(b)))
1979140Snilay@cs.wisc.edu
1989140Snilay@cs.wisc.edu        cpt_num = options.checkpoint_restore
1999140Snilay@cs.wisc.edu        if cpt_num > len(cpts):
2009140Snilay@cs.wisc.edu            fatal('Checkpoint %d not found', cpt_num)
2019140Snilay@cs.wisc.edu
2029816Sjthestness@gmail.com        cpt_starttick = int(cpts[cpt_num - 1])
2039140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
2049140Snilay@cs.wisc.edu
2059816Sjthestness@gmail.com    return cpt_starttick, checkpoint_dir
2069140Snilay@cs.wisc.edu
2079215Sandreas.hansson@arm.comdef scriptCheckpoints(options, maxtick, cptdir):
2089140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
2099140Snilay@cs.wisc.edu        checkpoint_inst = int(options.take_checkpoints)
2109140Snilay@cs.wisc.edu
2119140Snilay@cs.wisc.edu        # maintain correct offset if we restored from some instruction
2129140Snilay@cs.wisc.edu        if options.checkpoint_restore != None:
2139140Snilay@cs.wisc.edu            checkpoint_inst += options.checkpoint_restore
2149140Snilay@cs.wisc.edu
21512564Sgabeblack@google.com        print("Creating checkpoint at inst:%d" % (checkpoint_inst))
2169140Snilay@cs.wisc.edu        exit_event = m5.simulate()
2179140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
21812564Sgabeblack@google.com        print("exit cause = %s" % exit_cause)
2199140Snilay@cs.wisc.edu
2209140Snilay@cs.wisc.edu        # skip checkpoint instructions should they exist
2219140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2229140Snilay@cs.wisc.edu            exit_event = m5.simulate()
2239140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2249140Snilay@cs.wisc.edu
2259140Snilay@cs.wisc.edu        if exit_cause == "a thread reached the max instruction count":
2269140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
2279140Snilay@cs.wisc.edu                    (options.bench, checkpoint_inst)))
22812564Sgabeblack@google.com            print("Checkpoint written.")
2299140Snilay@cs.wisc.edu
2309140Snilay@cs.wisc.edu    else:
2319140Snilay@cs.wisc.edu        when, period = options.take_checkpoints.split(",", 1)
2329140Snilay@cs.wisc.edu        when = int(when)
2339140Snilay@cs.wisc.edu        period = int(period)
2349156Sandreas.hansson@arm.com        num_checkpoints = 0
2359140Snilay@cs.wisc.edu
2369634Sjthestness@gmail.com        exit_event = m5.simulate(when - m5.curTick())
2379140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2389140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2399140Snilay@cs.wisc.edu            exit_event = m5.simulate(when - m5.curTick())
2409140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2419140Snilay@cs.wisc.edu
2429140Snilay@cs.wisc.edu        if exit_cause == "simulate() limit reached":
2439140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2449140Snilay@cs.wisc.edu            num_checkpoints += 1
2459140Snilay@cs.wisc.edu
2469140Snilay@cs.wisc.edu        sim_ticks = when
2479140Snilay@cs.wisc.edu        max_checkpoints = options.max_checkpoints
2489140Snilay@cs.wisc.edu
2499140Snilay@cs.wisc.edu        while num_checkpoints < max_checkpoints and \
2509140Snilay@cs.wisc.edu                exit_cause == "simulate() limit reached":
2519140Snilay@cs.wisc.edu            if (sim_ticks + period) > maxtick:
2529140Snilay@cs.wisc.edu                exit_event = m5.simulate(maxtick - sim_ticks)
2539140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2549140Snilay@cs.wisc.edu                break
2559140Snilay@cs.wisc.edu            else:
2569140Snilay@cs.wisc.edu                exit_event = m5.simulate(period)
2579140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2589140Snilay@cs.wisc.edu                sim_ticks += period
2599140Snilay@cs.wisc.edu                while exit_event.getCause() == "checkpoint":
2609140Snilay@cs.wisc.edu                    exit_event = m5.simulate(sim_ticks - m5.curTick())
2619140Snilay@cs.wisc.edu                if exit_event.getCause() == "simulate() limit reached":
2629140Snilay@cs.wisc.edu                    m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2639140Snilay@cs.wisc.edu                    num_checkpoints += 1
2649140Snilay@cs.wisc.edu
2659606Snilay@cs.wisc.edu    return exit_event
2669140Snilay@cs.wisc.edu
2679140Snilay@cs.wisc.edudef benchCheckpoints(options, maxtick, cptdir):
2689634Sjthestness@gmail.com    exit_event = m5.simulate(maxtick - m5.curTick())
2699140Snilay@cs.wisc.edu    exit_cause = exit_event.getCause()
2709140Snilay@cs.wisc.edu
2719140Snilay@cs.wisc.edu    num_checkpoints = 0
2729140Snilay@cs.wisc.edu    max_checkpoints = options.max_checkpoints
2739140Snilay@cs.wisc.edu
2749140Snilay@cs.wisc.edu    while exit_cause == "checkpoint":
2759140Snilay@cs.wisc.edu        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2769140Snilay@cs.wisc.edu        num_checkpoints += 1
2779140Snilay@cs.wisc.edu        if num_checkpoints == max_checkpoints:
2789140Snilay@cs.wisc.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
2799140Snilay@cs.wisc.edu            break
2809140Snilay@cs.wisc.edu
2819140Snilay@cs.wisc.edu        exit_event = m5.simulate(maxtick - m5.curTick())
2829140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2839140Snilay@cs.wisc.edu
2849460Ssaidi@eecs.umich.edu    return exit_event
2859140Snilay@cs.wisc.edu
28610608Sdam.sunwoo@arm.com# Set up environment for taking SimPoint checkpoints
28710608Sdam.sunwoo@arm.com# Expecting SimPoint files generated by SimPoint 3.2
28810608Sdam.sunwoo@arm.comdef parseSimpointAnalysisFile(options, testsys):
28910608Sdam.sunwoo@arm.com    import re
29010608Sdam.sunwoo@arm.com
29110608Sdam.sunwoo@arm.com    simpoint_filename, weight_filename, interval_length, warmup_length = \
29210608Sdam.sunwoo@arm.com        options.take_simpoint_checkpoints.split(",", 3)
29312564Sgabeblack@google.com    print("simpoint analysis file:", simpoint_filename)
29412564Sgabeblack@google.com    print("simpoint weight file:", weight_filename)
29512564Sgabeblack@google.com    print("interval length:", interval_length)
29612564Sgabeblack@google.com    print("warmup length:", warmup_length)
29710608Sdam.sunwoo@arm.com
29810608Sdam.sunwoo@arm.com    interval_length = int(interval_length)
29910608Sdam.sunwoo@arm.com    warmup_length = int(warmup_length)
30010608Sdam.sunwoo@arm.com
30110608Sdam.sunwoo@arm.com    # Simpoint analysis output starts interval counts with 0.
30210608Sdam.sunwoo@arm.com    simpoints = []
30310608Sdam.sunwoo@arm.com    simpoint_start_insts = []
30410608Sdam.sunwoo@arm.com
30510608Sdam.sunwoo@arm.com    # Read in SimPoint analysis files
30610608Sdam.sunwoo@arm.com    simpoint_file = open(simpoint_filename)
30710608Sdam.sunwoo@arm.com    weight_file = open(weight_filename)
30810608Sdam.sunwoo@arm.com    while True:
30910608Sdam.sunwoo@arm.com        line = simpoint_file.readline()
31010608Sdam.sunwoo@arm.com        if not line:
31110608Sdam.sunwoo@arm.com            break
31210608Sdam.sunwoo@arm.com        m = re.match("(\d+)\s+(\d+)", line)
31310608Sdam.sunwoo@arm.com        if m:
31410608Sdam.sunwoo@arm.com            interval = int(m.group(1))
31510608Sdam.sunwoo@arm.com        else:
31610608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint file!')
31710608Sdam.sunwoo@arm.com
31810608Sdam.sunwoo@arm.com        line = weight_file.readline()
31910608Sdam.sunwoo@arm.com        if not line:
32010608Sdam.sunwoo@arm.com            fatal('not enough lines in simpoint weight file!')
32110608Sdam.sunwoo@arm.com        m = re.match("([0-9\.e\-]+)\s+(\d+)", line)
32210608Sdam.sunwoo@arm.com        if m:
32310608Sdam.sunwoo@arm.com            weight = float(m.group(1))
32410608Sdam.sunwoo@arm.com        else:
32510608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint weight file!')
32610608Sdam.sunwoo@arm.com
32710608Sdam.sunwoo@arm.com        if (interval * interval_length - warmup_length > 0):
32810608Sdam.sunwoo@arm.com            starting_inst_count = \
32910608Sdam.sunwoo@arm.com                interval * interval_length - warmup_length
33010608Sdam.sunwoo@arm.com            actual_warmup_length = warmup_length
33110608Sdam.sunwoo@arm.com        else:
33210608Sdam.sunwoo@arm.com            # Not enough room for proper warmup
33310608Sdam.sunwoo@arm.com            # Just starting from the beginning
33410608Sdam.sunwoo@arm.com            starting_inst_count = 0
33510608Sdam.sunwoo@arm.com            actual_warmup_length = interval * interval_length
33610608Sdam.sunwoo@arm.com
33710608Sdam.sunwoo@arm.com        simpoints.append((interval, weight, starting_inst_count,
33810608Sdam.sunwoo@arm.com            actual_warmup_length))
33910608Sdam.sunwoo@arm.com
34010608Sdam.sunwoo@arm.com    # Sort SimPoints by starting inst count
34110608Sdam.sunwoo@arm.com    simpoints.sort(key=lambda obj: obj[2])
34210608Sdam.sunwoo@arm.com    for s in simpoints:
34310608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = s
34412564Sgabeblack@google.com        print(str(interval), str(weight), starting_inst_count,
34512564Sgabeblack@google.com            actual_warmup_length)
34610608Sdam.sunwoo@arm.com        simpoint_start_insts.append(starting_inst_count)
34710608Sdam.sunwoo@arm.com
34812564Sgabeblack@google.com    print("Total # of simpoints:", len(simpoints))
34910608Sdam.sunwoo@arm.com    testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
35010608Sdam.sunwoo@arm.com
35110608Sdam.sunwoo@arm.com    return (simpoints, interval_length)
35210608Sdam.sunwoo@arm.com
35310608Sdam.sunwoo@arm.comdef takeSimpointCheckpoints(simpoints, interval_length, cptdir):
35410608Sdam.sunwoo@arm.com    num_checkpoints = 0
35510608Sdam.sunwoo@arm.com    index = 0
35610608Sdam.sunwoo@arm.com    last_chkpnt_inst_count = -1
35710608Sdam.sunwoo@arm.com    for simpoint in simpoints:
35810608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = simpoint
35910608Sdam.sunwoo@arm.com        if starting_inst_count == last_chkpnt_inst_count:
36010608Sdam.sunwoo@arm.com            # checkpoint starting point same as last time
36110608Sdam.sunwoo@arm.com            # (when warmup period longer than starting point)
36210608Sdam.sunwoo@arm.com            exit_cause = "simpoint starting point found"
36310608Sdam.sunwoo@arm.com            code = 0
36410608Sdam.sunwoo@arm.com        else:
36510608Sdam.sunwoo@arm.com            exit_event = m5.simulate()
36610608Sdam.sunwoo@arm.com
36710608Sdam.sunwoo@arm.com            # skip checkpoint instructions should they exist
36810608Sdam.sunwoo@arm.com            while exit_event.getCause() == "checkpoint":
36912564Sgabeblack@google.com                print("Found 'checkpoint' exit event...ignoring...")
37010608Sdam.sunwoo@arm.com                exit_event = m5.simulate()
37110608Sdam.sunwoo@arm.com
37210608Sdam.sunwoo@arm.com            exit_cause = exit_event.getCause()
37310608Sdam.sunwoo@arm.com            code = exit_event.getCode()
37410608Sdam.sunwoo@arm.com
37510608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
37610608Sdam.sunwoo@arm.com            m5.checkpoint(joinpath(cptdir,
37710608Sdam.sunwoo@arm.com                "cpt.simpoint_%02d_inst_%d_weight_%f_interval_%d_warmup_%d"
37810608Sdam.sunwoo@arm.com                % (index, starting_inst_count, weight, interval_length,
37910608Sdam.sunwoo@arm.com                actual_warmup_length)))
38012564Sgabeblack@google.com            print("Checkpoint #%d written. start inst:%d weight:%f" %
38112564Sgabeblack@google.com                (num_checkpoints, starting_inst_count, weight))
38210608Sdam.sunwoo@arm.com            num_checkpoints += 1
38310608Sdam.sunwoo@arm.com            last_chkpnt_inst_count = starting_inst_count
38410608Sdam.sunwoo@arm.com        else:
38510608Sdam.sunwoo@arm.com            break
38610608Sdam.sunwoo@arm.com        index += 1
38710608Sdam.sunwoo@arm.com
38812564Sgabeblack@google.com    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
38912564Sgabeblack@google.com    print("%d checkpoints taken" % num_checkpoints)
39010608Sdam.sunwoo@arm.com    sys.exit(code)
39110608Sdam.sunwoo@arm.com
39210608Sdam.sunwoo@arm.comdef restoreSimpointCheckpoint():
39310608Sdam.sunwoo@arm.com    exit_event = m5.simulate()
39410608Sdam.sunwoo@arm.com    exit_cause = exit_event.getCause()
39510608Sdam.sunwoo@arm.com
39610608Sdam.sunwoo@arm.com    if exit_cause == "simpoint starting point found":
39712564Sgabeblack@google.com        print("Warmed up! Dumping and resetting stats!")
39810608Sdam.sunwoo@arm.com        m5.stats.dump()
39910608Sdam.sunwoo@arm.com        m5.stats.reset()
40010608Sdam.sunwoo@arm.com
40110608Sdam.sunwoo@arm.com        exit_event = m5.simulate()
40210608Sdam.sunwoo@arm.com        exit_cause = exit_event.getCause()
40310608Sdam.sunwoo@arm.com
40410608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
40512564Sgabeblack@google.com            print("Done running SimPoint!")
40610608Sdam.sunwoo@arm.com            sys.exit(exit_event.getCode())
40710608Sdam.sunwoo@arm.com
40812564Sgabeblack@google.com    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
40910608Sdam.sunwoo@arm.com    sys.exit(exit_event.getCode())
41010608Sdam.sunwoo@arm.com
4119151Satgutier@umich.edudef repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
41212564Sgabeblack@google.com    print("starting switch loop")
4139151Satgutier@umich.edu    while True:
4149151Satgutier@umich.edu        exit_event = m5.simulate(switch_freq)
4159151Satgutier@umich.edu        exit_cause = exit_event.getCause()
4169151Satgutier@umich.edu
4179151Satgutier@umich.edu        if exit_cause != "simulate() limit reached":
4189460Ssaidi@eecs.umich.edu            return exit_event
4199151Satgutier@umich.edu
4209521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, repeat_switch_cpu_list)
4219151Satgutier@umich.edu
4229151Satgutier@umich.edu        tmp_cpu_list = []
4239151Satgutier@umich.edu        for old_cpu, new_cpu in repeat_switch_cpu_list:
4249151Satgutier@umich.edu            tmp_cpu_list.append((new_cpu, old_cpu))
4259151Satgutier@umich.edu        repeat_switch_cpu_list = tmp_cpu_list
4269151Satgutier@umich.edu
4279151Satgutier@umich.edu        if (maxtick - m5.curTick()) <= switch_freq:
4289151Satgutier@umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
4299460Ssaidi@eecs.umich.edu            return exit_event
4309151Satgutier@umich.edu
4313481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
4323395Shsul@eecs.umich.edu    if options.checkpoint_dir:
4333395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
4345211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
4355211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
4363395Shsul@eecs.umich.edu    else:
4373395Shsul@eecs.umich.edu        cptdir = getcwd()
4383395Shsul@eecs.umich.edu
4395370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
4406654Snate@binkert.org        fatal("Can't specify both --fast-forward and --checkpoint-restore")
4415370Ssaidi@eecs.umich.edu
4425371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
4436654Snate@binkert.org        fatal("Must specify --caches when using --standard-switch")
4445370Ssaidi@eecs.umich.edu
4459151Satgutier@umich.edu    if options.standard_switch and options.repeat_switch:
4469151Satgutier@umich.edu        fatal("Can't specify both --standard-switch and --repeat-switch")
4479151Satgutier@umich.edu
4489151Satgutier@umich.edu    if options.repeat_switch and options.take_checkpoints:
4499151Satgutier@umich.edu        fatal("Can't specify both --repeat-switch and --take-checkpoints")
4509151Satgutier@umich.edu
4513395Shsul@eecs.umich.edu    np = options.num_cpus
4523481Shsul@eecs.umich.edu    switch_cpus = None
4533481Shsul@eecs.umich.edu
4548318Sksewell@umich.edu    if options.prog_interval:
4556144Sksewell@umich.edu        for i in xrange(np):
4568311Sksewell@umich.edu            testsys.cpu[i].progress_interval = options.prog_interval
4576144Sksewell@umich.edu
4586641Sksewell@umich.edu    if options.maxinsts:
4596641Sksewell@umich.edu        for i in xrange(np):
4606641Sksewell@umich.edu            testsys.cpu[i].max_insts_any_thread = options.maxinsts
4616641Sksewell@umich.edu
4623481Shsul@eecs.umich.edu    if cpu_class:
4639433SAndreas.Sandberg@ARM.com        switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
4643481Shsul@eecs.umich.edu                       for i in xrange(np)]
4653481Shsul@eecs.umich.edu
4663481Shsul@eecs.umich.edu        for i in xrange(np):
4675361Srstrong@cs.ucsd.edu            if options.fast_forward:
4685369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
46911251Sradhika.jagtap@ARM.com            switch_cpus[i].system = testsys
4708803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
4719793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
47211251Sradhika.jagtap@ARM.com            switch_cpus[i].progress_interval = \
47311251Sradhika.jagtap@ARM.com                testsys.cpu[i].progress_interval
47412374Saustinharris@utexas.edu            switch_cpus[i].isa = testsys.cpu[i].isa
4755369Ssaidi@eecs.umich.edu            # simulation period
4768311Sksewell@umich.edu            if options.maxinsts:
4778311Sksewell@umich.edu                switch_cpus[i].max_insts_any_thread = options.maxinsts
4788887Sgeoffrey.blake@arm.com            # Add checker cpu if selected
4798887Sgeoffrey.blake@arm.com            if options.checker:
4808887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
4813481Shsul@eecs.umich.edu
48211251Sradhika.jagtap@ARM.com        # If elastic tracing is enabled attach the elastic trace probe
48311251Sradhika.jagtap@ARM.com        # to the switch CPUs
48411251Sradhika.jagtap@ARM.com        if options.elastic_trace_en:
48511251Sradhika.jagtap@ARM.com            CpuConfig.config_etrace(cpu_class, switch_cpus, options)
48611251Sradhika.jagtap@ARM.com
4875311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
4883481Shsul@eecs.umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
4893395Shsul@eecs.umich.edu
4909151Satgutier@umich.edu    if options.repeat_switch:
4919518SAndreas.Sandberg@ARM.com        switch_class = getCPUClass(options.cpu_type)[0]
4929518SAndreas.Sandberg@ARM.com        if switch_class.require_caches() and \
4939518SAndreas.Sandberg@ARM.com                not options.caches:
49412564Sgabeblack@google.com            print("%s: Must be used with caches" % str(switch_class))
4959518SAndreas.Sandberg@ARM.com            sys.exit(1)
4969518SAndreas.Sandberg@ARM.com        if not switch_class.support_take_over():
49712564Sgabeblack@google.com            print("%s: CPU switching not supported" % str(switch_class))
4989518SAndreas.Sandberg@ARM.com            sys.exit(1)
4999151Satgutier@umich.edu
5009518SAndreas.Sandberg@ARM.com        repeat_switch_cpus = [switch_class(switched_out=True, \
5019518SAndreas.Sandberg@ARM.com                                               cpu_id=(i)) for i in xrange(np)]
5029151Satgutier@umich.edu
5039151Satgutier@umich.edu        for i in xrange(np):
5049151Satgutier@umich.edu            repeat_switch_cpus[i].system = testsys
5059151Satgutier@umich.edu            repeat_switch_cpus[i].workload = testsys.cpu[i].workload
5069793Sakash.bagdia@arm.com            repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
50712374Saustinharris@utexas.edu            repeat_switch_cpus[i].isa = testsys.cpu[i].isa
5089151Satgutier@umich.edu
5099151Satgutier@umich.edu            if options.maxinsts:
5109151Satgutier@umich.edu                repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
5119151Satgutier@umich.edu
5129151Satgutier@umich.edu            if options.checker:
5139151Satgutier@umich.edu                repeat_switch_cpus[i].addCheckerCpu()
5149151Satgutier@umich.edu
5159151Satgutier@umich.edu        testsys.repeat_switch_cpus = repeat_switch_cpus
5169151Satgutier@umich.edu
5179151Satgutier@umich.edu        if cpu_class:
5189151Satgutier@umich.edu            repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
5199151Satgutier@umich.edu                                      for i in xrange(np)]
5209151Satgutier@umich.edu        else:
5219151Satgutier@umich.edu            repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
5229151Satgutier@umich.edu                                      for i in xrange(np)]
5239151Satgutier@umich.edu
5243395Shsul@eecs.umich.edu    if options.standard_switch:
5259433SAndreas.Sandberg@ARM.com        switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
5263395Shsul@eecs.umich.edu                       for i in xrange(np)]
5279433SAndreas.Sandberg@ARM.com        switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
5283395Shsul@eecs.umich.edu                        for i in xrange(np)]
5293478Shsul@eecs.umich.edu
5303395Shsul@eecs.umich.edu        for i in xrange(np):
5313395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
5323478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
5338803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
5348803Sgblack@eecs.umich.edu            switch_cpus_1[i].workload = testsys.cpu[i].workload
5359793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
5369793Sakash.bagdia@arm.com            switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain
53712374Saustinharris@utexas.edu            switch_cpus[i].isa = testsys.cpu[i].isa
53812374Saustinharris@utexas.edu            switch_cpus_1[i].isa = testsys.cpu[i].isa
5393480Shsul@eecs.umich.edu
5405361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
5415369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
5425361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5435361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
5445361Srstrong@cs.ucsd.edu            elif options.fast_forward:
5455369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
5465361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
5475361Srstrong@cs.ucsd.edu            elif options.simpoint:
5485378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5496654Snate@binkert.org                    fatal('simpoint not found')
5505361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
5515361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
5525361Srstrong@cs.ucsd.edu            # No distance specified, just switch
5535361Srstrong@cs.ucsd.edu            else:
5545361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5555361Srstrong@cs.ucsd.edu
5565361Srstrong@cs.ucsd.edu            # warmup period
5575361Srstrong@cs.ucsd.edu            if options.warmup_insts:
5585361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
5595361Srstrong@cs.ucsd.edu
5605361Srstrong@cs.ucsd.edu            # simulation period
5618311Sksewell@umich.edu            if options.maxinsts:
5628311Sksewell@umich.edu                switch_cpus_1[i].max_insts_any_thread = options.maxinsts
5635353Svilas.sridharan@gmail.com
5648887Sgeoffrey.blake@arm.com            # attach the checker cpu if selected
5658887Sgeoffrey.blake@arm.com            if options.checker:
5668887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
5678887Sgeoffrey.blake@arm.com                switch_cpus_1[i].addCheckerCpu()
5688887Sgeoffrey.blake@arm.com
5698211Satgutier@umich.edu        testsys.switch_cpus = switch_cpus
5708211Satgutier@umich.edu        testsys.switch_cpus_1 = switch_cpus_1
5718211Satgutier@umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
5728211Satgutier@umich.edu        switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
5733395Shsul@eecs.umich.edu
5745361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
5755369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
5765361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
5775361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
5785361Srstrong@cs.ucsd.edu        # Set an instruction break point
5795361Srstrong@cs.ucsd.edu        if options.simpoint:
5805361Srstrong@cs.ucsd.edu            for i in xrange(np):
5815378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5826654Snate@binkert.org                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
5835369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
5845361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
5855361Srstrong@cs.ucsd.edu                # used for output below
5865361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
5875361Srstrong@cs.ucsd.edu        else:
5885361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
5895361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
5905361Srstrong@cs.ucsd.edu            # for the upcoming simulation
5915361Srstrong@cs.ucsd.edu            for i in xrange(np):
5925361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
5935361Srstrong@cs.ucsd.edu
59410608Sdam.sunwoo@arm.com    if options.take_simpoint_checkpoints != None:
59510608Sdam.sunwoo@arm.com        simpoints, interval_length = parseSimpointAnalysisFile(options, testsys)
59610608Sdam.sunwoo@arm.com
5977531Ssteve.reinhardt@amd.com    checkpoint_dir = None
5989816Sjthestness@gmail.com    if options.checkpoint_restore:
5999816Sjthestness@gmail.com        cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys)
6007531Ssteve.reinhardt@amd.com    m5.instantiate(checkpoint_dir)
6013395Shsul@eecs.umich.edu
60210757SCurtis.Dunham@arm.com    # Initialization is complete.  If we're not in control of simulation
60310757SCurtis.Dunham@arm.com    # (that is, if we're a slave simulator acting as a component in another
60410757SCurtis.Dunham@arm.com    #  'master' simulator) then we're done here.  The other simulator will
60510757SCurtis.Dunham@arm.com    # call simulate() directly. --initialize-only is used to indicate this.
60610757SCurtis.Dunham@arm.com    if options.initialize_only:
60710757SCurtis.Dunham@arm.com        return
60810757SCurtis.Dunham@arm.com
6099816Sjthestness@gmail.com    # Handle the max tick settings now that tick frequency was resolved
6109816Sjthestness@gmail.com    # during system instantiation
6119816Sjthestness@gmail.com    # NOTE: the maxtick variable here is in absolute ticks, so it must
6129816Sjthestness@gmail.com    # include any simulated ticks before a checkpoint
6139816Sjthestness@gmail.com    explicit_maxticks = 0
6149816Sjthestness@gmail.com    maxtick_from_abs = m5.MaxTick
6159816Sjthestness@gmail.com    maxtick_from_rel = m5.MaxTick
6169816Sjthestness@gmail.com    maxtick_from_maxtime = m5.MaxTick
6179816Sjthestness@gmail.com    if options.abs_max_tick:
6189816Sjthestness@gmail.com        maxtick_from_abs = options.abs_max_tick
6199816Sjthestness@gmail.com        explicit_maxticks += 1
6209816Sjthestness@gmail.com    if options.rel_max_tick:
6219816Sjthestness@gmail.com        maxtick_from_rel = options.rel_max_tick
6229816Sjthestness@gmail.com        if options.checkpoint_restore:
6239816Sjthestness@gmail.com            # NOTE: this may need to be updated if checkpoints ever store
6249816Sjthestness@gmail.com            # the ticks per simulated second
6259816Sjthestness@gmail.com            maxtick_from_rel += cpt_starttick
6269867Sjthestness@gmail.com            if options.at_instruction or options.simpoint:
6279867Sjthestness@gmail.com                warn("Relative max tick specified with --at-instruction or" \
6289867Sjthestness@gmail.com                     " --simpoint\n      These options don't specify the " \
6299867Sjthestness@gmail.com                     "checkpoint start tick, so assuming\n      you mean " \
6309867Sjthestness@gmail.com                     "absolute max tick")
6319816Sjthestness@gmail.com        explicit_maxticks += 1
6329816Sjthestness@gmail.com    if options.maxtime:
6339816Sjthestness@gmail.com        maxtick_from_maxtime = m5.ticks.fromSeconds(options.maxtime)
6349816Sjthestness@gmail.com        explicit_maxticks += 1
6359816Sjthestness@gmail.com    if explicit_maxticks > 1:
6369816Sjthestness@gmail.com        warn("Specified multiple of --abs-max-tick, --rel-max-tick, --maxtime."\
6379816Sjthestness@gmail.com             " Using least")
6389816Sjthestness@gmail.com    maxtick = min([maxtick_from_abs, maxtick_from_rel, maxtick_from_maxtime])
6399816Sjthestness@gmail.com
6409816Sjthestness@gmail.com    if options.checkpoint_restore != None and maxtick < cpt_starttick:
6419816Sjthestness@gmail.com        fatal("Bad maxtick (%d) specified: " \
6429816Sjthestness@gmail.com              "Checkpoint starts starts from tick: %d", maxtick, cpt_starttick)
6439816Sjthestness@gmail.com
6443481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
6455361Srstrong@cs.ucsd.edu        if options.standard_switch:
64612564Sgabeblack@google.com            print("Switch at instruction count:%s" %
64712564Sgabeblack@google.com                    str(testsys.cpu[0].max_insts_any_thread))
6485361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6495361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
65012564Sgabeblack@google.com            print("Switch at instruction count:%s" %
65112564Sgabeblack@google.com                    str(testsys.cpu[0].max_insts_any_thread))
6525361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6535361Srstrong@cs.ucsd.edu        else:
65412564Sgabeblack@google.com            print("Switch at curTick count:%s" % str(10000))
6555361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
65612564Sgabeblack@google.com        print("Switched CPUS @ tick %s" % (m5.curTick()))
6573395Shsul@eecs.umich.edu
6589521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, switch_cpu_list)
6593395Shsul@eecs.umich.edu
6603481Shsul@eecs.umich.edu        if options.standard_switch:
66112564Sgabeblack@google.com            print("Switch at instruction count:%d" %
66212564Sgabeblack@google.com                    (testsys.switch_cpus[0].max_insts_any_thread))
6635361Srstrong@cs.ucsd.edu
6645361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
6655361Srstrong@cs.ucsd.edu            if options.warmup_insts:
6665361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
6675361Srstrong@cs.ucsd.edu            else:
6689151Satgutier@umich.edu                exit_event = m5.simulate(options.standard_switch)
66912564Sgabeblack@google.com            print("Switching CPUS @ tick %s" % (m5.curTick()))
67012564Sgabeblack@google.com            print("Simulation ends instruction count:%d" %
67112564Sgabeblack@google.com                    (testsys.switch_cpus_1[0].max_insts_any_thread))
6729521SAndreas.Sandberg@ARM.com            m5.switchCpus(testsys, switch_cpu_list1)
6733395Shsul@eecs.umich.edu
6747489Ssteve.reinhardt@amd.com    # If we're taking and restoring checkpoints, use checkpoint_dir
6757489Ssteve.reinhardt@amd.com    # option only for finding the checkpoints to restore from.  This
6767489Ssteve.reinhardt@amd.com    # lets us test checkpointing by restoring from one set of
6777489Ssteve.reinhardt@amd.com    # checkpoints, generating a second set, and then comparing them.
67810608Sdam.sunwoo@arm.com    if (options.take_checkpoints or options.take_simpoint_checkpoints) \
67910608Sdam.sunwoo@arm.com        and options.checkpoint_restore:
68010608Sdam.sunwoo@arm.com
6817489Ssteve.reinhardt@amd.com        if m5.options.outdir:
6827489Ssteve.reinhardt@amd.com            cptdir = m5.options.outdir
6837489Ssteve.reinhardt@amd.com        else:
6847489Ssteve.reinhardt@amd.com            cptdir = getcwd()
6857489Ssteve.reinhardt@amd.com
6865369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
6879140Snilay@cs.wisc.edu        # Checkpoints being taken via the command line at <when> and at
6889140Snilay@cs.wisc.edu        # subsequent periods of <period>.  Checkpoint instructions
6899140Snilay@cs.wisc.edu        # received from the benchmark running are ignored and skipped in
6909140Snilay@cs.wisc.edu        # favor of command line checkpoint instructions.
6919606Snilay@cs.wisc.edu        exit_event = scriptCheckpoints(options, maxtick, cptdir)
69210608Sdam.sunwoo@arm.com
69310608Sdam.sunwoo@arm.com    # Take SimPoint checkpoints
69410608Sdam.sunwoo@arm.com    elif options.take_simpoint_checkpoints != None:
69510608Sdam.sunwoo@arm.com        takeSimpointCheckpoints(simpoints, interval_length, cptdir)
69610608Sdam.sunwoo@arm.com
69710608Sdam.sunwoo@arm.com    # Restore from SimPoint checkpoints
69810608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint != None:
69910608Sdam.sunwoo@arm.com        restoreSimpointCheckpoint()
70010608Sdam.sunwoo@arm.com
7019140Snilay@cs.wisc.edu    else:
7029151Satgutier@umich.edu        if options.fast_forward:
7039151Satgutier@umich.edu            m5.stats.reset()
70412564Sgabeblack@google.com        print("**** REAL SIMULATION ****")
7059151Satgutier@umich.edu
7069140Snilay@cs.wisc.edu        # If checkpoints are being taken, then the checkpoint instruction
7079140Snilay@cs.wisc.edu        # will occur in the benchmark code it self.
7089151Satgutier@umich.edu        if options.repeat_switch and maxtick > options.repeat_switch:
7099460Ssaidi@eecs.umich.edu            exit_event = repeatSwitch(testsys, repeat_switch_cpu_list,
7109151Satgutier@umich.edu                                      maxtick, options.repeat_switch)
7119151Satgutier@umich.edu        else:
7129460Ssaidi@eecs.umich.edu            exit_event = benchCheckpoints(options, maxtick, cptdir)
7133395Shsul@eecs.umich.edu
71412564Sgabeblack@google.com    print('Exiting @ tick %i because %s' %
71512564Sgabeblack@google.com          (m5.curTick(), exit_event.getCause()))
7166776SBrad.Beckmann@amd.com    if options.checkpoint_at_end:
7177525Ssteve.reinhardt@amd.com        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
7189457Svilanova@ac.upc.edu
71912880Sjason@lowepower.com    if exit_event.getCode() != 0:
72012880Sjason@lowepower.com        print("Simulated exit code not 0! Exit code is", exit_event.getCode())
721