Simulation.py revision 11320
19793Sakash.bagdia@arm.com# Copyright (c) 2012-2013 ARM Limited
29518SAndreas.Sandberg@ARM.com# All rights reserved
311320Ssteve.reinhardt@amd.com#
49518SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
59518SAndreas.Sandberg@ARM.com# not be construed as granting a license to any other intellectual
69518SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79518SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89518SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99518SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
109518SAndreas.Sandberg@ARM.com# unmodified and in its entirety in all distributions of the software,
119518SAndreas.Sandberg@ARM.com# modified or unmodified, in source code or in binary form.
129518SAndreas.Sandberg@ARM.com#
135347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
147534Ssteve.reinhardt@amd.com# Copyright (c) 2010 Advanced Micro Devices, Inc.
153395Shsul@eecs.umich.edu# All rights reserved.
163395Shsul@eecs.umich.edu#
173395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
183395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
193395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
203395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
213395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
223395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
233395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution;
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253395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
263395Shsul@eecs.umich.edu# this software without specific prior written permission.
273395Shsul@eecs.umich.edu#
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293395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
303395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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333395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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373395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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393395Shsul@eecs.umich.edu#
403395Shsul@eecs.umich.edu# Authors: Lisa Hsu
413395Shsul@eecs.umich.edu
429457Svilanova@ac.upc.eduimport sys
433395Shsul@eecs.umich.edufrom os import getcwd
443509Shsul@eecs.umich.edufrom os.path import join as joinpath
456654Snate@binkert.org
469520SAndreas.Sandberg@ARM.comimport CpuConfig
479665Sandreas.hansson@arm.comimport MemConfig
489520SAndreas.Sandberg@ARM.com
493395Shsul@eecs.umich.eduimport m5
506654Snate@binkert.orgfrom m5.defines import buildEnv
513395Shsul@eecs.umich.edufrom m5.objects import *
526654Snate@binkert.orgfrom m5.util import *
536654Snate@binkert.org
546654Snate@binkert.orgaddToPath('../common')
553395Shsul@eecs.umich.edu
569139Snilay@cs.wisc.edudef getCPUClass(cpu_type):
579520SAndreas.Sandberg@ARM.com    """Returns the required cpu class and the mode of operation."""
589520SAndreas.Sandberg@ARM.com    cls = CpuConfig.get(cpu_type)
599520SAndreas.Sandberg@ARM.com    return cls, cls.memory_mode()
609139Snilay@cs.wisc.edu
613481Shsul@eecs.umich.edudef setCPUClass(options):
629139Snilay@cs.wisc.edu    """Returns two cpu classes and the initial mode of operation.
633481Shsul@eecs.umich.edu
649139Snilay@cs.wisc.edu       Restoring from a checkpoint or fast forwarding through a benchmark
659139Snilay@cs.wisc.edu       can be done using one type of cpu, and then the actual
669139Snilay@cs.wisc.edu       simulation can be carried out using another type. This function
679139Snilay@cs.wisc.edu       returns these two types of cpus and the initial mode of operation
689139Snilay@cs.wisc.edu       depending on the options provided.
699139Snilay@cs.wisc.edu    """
709139Snilay@cs.wisc.edu
719139Snilay@cs.wisc.edu    TmpClass, test_mem_mode = getCPUClass(options.cpu_type)
723481Shsul@eecs.umich.edu    CPUClass = None
739518SAndreas.Sandberg@ARM.com    if TmpClass.require_caches() and \
749518SAndreas.Sandberg@ARM.com            not options.caches and not options.ruby:
759518SAndreas.Sandberg@ARM.com        fatal("%s must be used with caches" % options.cpu_type)
763481Shsul@eecs.umich.edu
779139Snilay@cs.wisc.edu    if options.checkpoint_restore != None:
789139Snilay@cs.wisc.edu        if options.restore_with_cpu != options.cpu_type:
793481Shsul@eecs.umich.edu            CPUClass = TmpClass
809139Snilay@cs.wisc.edu            TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu)
819139Snilay@cs.wisc.edu    elif options.fast_forward:
829139Snilay@cs.wisc.edu        CPUClass = TmpClass
839139Snilay@cs.wisc.edu        TmpClass = AtomicSimpleCPU
849139Snilay@cs.wisc.edu        test_mem_mode = 'atomic'
853481Shsul@eecs.umich.edu
863481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
873481Shsul@eecs.umich.edu
889665Sandreas.hansson@arm.comdef setMemClass(options):
899665Sandreas.hansson@arm.com    """Returns a memory controller class."""
909665Sandreas.hansson@arm.com
919665Sandreas.hansson@arm.com    return MemConfig.get(options.mem_type)
929665Sandreas.hansson@arm.com
938919Snilay@cs.wisc.edudef setWorkCountOptions(system, options):
948919Snilay@cs.wisc.edu    if options.work_item_id != None:
958919Snilay@cs.wisc.edu        system.work_item_id = options.work_item_id
9610159Sgedare@rtems.org    if options.num_work_ids != None:
9710159Sgedare@rtems.org        system.num_work_ids = options.num_work_ids
988919Snilay@cs.wisc.edu    if options.work_begin_cpu_id_exit != None:
998919Snilay@cs.wisc.edu        system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
1008919Snilay@cs.wisc.edu    if options.work_end_exit_count != None:
1018919Snilay@cs.wisc.edu        system.work_end_exit_count = options.work_end_exit_count
1028919Snilay@cs.wisc.edu    if options.work_end_checkpoint_count != None:
1038919Snilay@cs.wisc.edu        system.work_end_ckpt_count = options.work_end_checkpoint_count
1048919Snilay@cs.wisc.edu    if options.work_begin_exit_count != None:
1058919Snilay@cs.wisc.edu        system.work_begin_exit_count = options.work_begin_exit_count
1068919Snilay@cs.wisc.edu    if options.work_begin_checkpoint_count != None:
1078919Snilay@cs.wisc.edu        system.work_begin_ckpt_count = options.work_begin_checkpoint_count
1088919Snilay@cs.wisc.edu    if options.work_cpus_checkpoint_count != None:
1098919Snilay@cs.wisc.edu        system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
1103481Shsul@eecs.umich.edu
1119816Sjthestness@gmail.comdef findCptDir(options, cptdir, testsys):
1129140Snilay@cs.wisc.edu    """Figures out the directory from which the checkpointed state is read.
1139140Snilay@cs.wisc.edu
1149140Snilay@cs.wisc.edu    There are two different ways in which the directories holding checkpoints
1159140Snilay@cs.wisc.edu    can be named --
1169140Snilay@cs.wisc.edu    1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
1179140Snilay@cs.wisc.edu    2. cpt.<some number, usually the tick value when the checkpoint was taken>
1189140Snilay@cs.wisc.edu
1199140Snilay@cs.wisc.edu    This function parses through the options to figure out which one of the
1209140Snilay@cs.wisc.edu    above should be used for selecting the checkpoint, and then figures out
1219140Snilay@cs.wisc.edu    the appropriate directory.
1229140Snilay@cs.wisc.edu    """
1239140Snilay@cs.wisc.edu
1249140Snilay@cs.wisc.edu    from os.path import isdir, exists
1259140Snilay@cs.wisc.edu    from os import listdir
1269140Snilay@cs.wisc.edu    import re
1279140Snilay@cs.wisc.edu
1289140Snilay@cs.wisc.edu    if not isdir(cptdir):
1299140Snilay@cs.wisc.edu        fatal("checkpoint dir %s does not exist!", cptdir)
1309140Snilay@cs.wisc.edu
1319867Sjthestness@gmail.com    cpt_starttick = 0
1329140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
1339140Snilay@cs.wisc.edu        inst = options.checkpoint_restore
1349140Snilay@cs.wisc.edu        if options.simpoint:
1359140Snilay@cs.wisc.edu            # assume workload 0 has the simpoint
1369140Snilay@cs.wisc.edu            if testsys.cpu[0].workload[0].simpoint == 0:
1379140Snilay@cs.wisc.edu                fatal('Unable to find simpoint')
1389140Snilay@cs.wisc.edu            inst += int(testsys.cpu[0].workload[0].simpoint)
1399140Snilay@cs.wisc.edu
1409140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % (options.bench, inst))
1419140Snilay@cs.wisc.edu        if not exists(checkpoint_dir):
1429140Snilay@cs.wisc.edu            fatal("Unable to find checkpoint directory %s", checkpoint_dir)
14310608Sdam.sunwoo@arm.com
14410608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint:
14510608Sdam.sunwoo@arm.com        # Restore from SimPoint checkpoints
14610608Sdam.sunwoo@arm.com        # Assumes that the checkpoint dir names are formatted as follows:
14710608Sdam.sunwoo@arm.com        dirs = listdir(cptdir)
14810608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.simpoint_(\d+)_inst_(\d+)' +
14910608Sdam.sunwoo@arm.com                    '_weight_([\d\.e\-]+)_interval_(\d+)_warmup_(\d+)')
15010608Sdam.sunwoo@arm.com        cpts = []
15110608Sdam.sunwoo@arm.com        for dir in dirs:
15210608Sdam.sunwoo@arm.com            match = expr.match(dir)
15310608Sdam.sunwoo@arm.com            if match:
15410608Sdam.sunwoo@arm.com                cpts.append(dir)
15510608Sdam.sunwoo@arm.com        cpts.sort()
15610608Sdam.sunwoo@arm.com
15710608Sdam.sunwoo@arm.com        cpt_num = options.checkpoint_restore
15810608Sdam.sunwoo@arm.com        if cpt_num > len(cpts):
15910608Sdam.sunwoo@arm.com            fatal('Checkpoint %d not found', cpt_num)
16010608Sdam.sunwoo@arm.com        checkpoint_dir = joinpath(cptdir, cpts[cpt_num - 1])
16110608Sdam.sunwoo@arm.com        match = expr.match(cpts[cpt_num - 1])
16210608Sdam.sunwoo@arm.com        if match:
16310608Sdam.sunwoo@arm.com            index = int(match.group(1))
16410608Sdam.sunwoo@arm.com            start_inst = int(match.group(2))
16510608Sdam.sunwoo@arm.com            weight_inst = float(match.group(3))
16610608Sdam.sunwoo@arm.com            interval_length = int(match.group(4))
16710608Sdam.sunwoo@arm.com            warmup_length = int(match.group(5))
16810608Sdam.sunwoo@arm.com        print "Resuming from", checkpoint_dir
16910608Sdam.sunwoo@arm.com        simpoint_start_insts = []
17010608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length)
17110608Sdam.sunwoo@arm.com        simpoint_start_insts.append(warmup_length + interval_length)
17210608Sdam.sunwoo@arm.com        testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
17310608Sdam.sunwoo@arm.com        if testsys.switch_cpus != None:
17410608Sdam.sunwoo@arm.com            testsys.switch_cpus[0].simpoint_start_insts = simpoint_start_insts
17510608Sdam.sunwoo@arm.com
17610608Sdam.sunwoo@arm.com        print "Resuming from SimPoint",
17710608Sdam.sunwoo@arm.com        print "#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" % \
17810608Sdam.sunwoo@arm.com            (index, start_inst, weight_inst, interval_length, warmup_length)
17910608Sdam.sunwoo@arm.com
1809140Snilay@cs.wisc.edu    else:
1819140Snilay@cs.wisc.edu        dirs = listdir(cptdir)
18210608Sdam.sunwoo@arm.com        expr = re.compile('cpt\.([0-9]+)')
1839140Snilay@cs.wisc.edu        cpts = []
1849140Snilay@cs.wisc.edu        for dir in dirs:
1859140Snilay@cs.wisc.edu            match = expr.match(dir)
1869140Snilay@cs.wisc.edu            if match:
1879140Snilay@cs.wisc.edu                cpts.append(match.group(1))
1889140Snilay@cs.wisc.edu
1899140Snilay@cs.wisc.edu        cpts.sort(lambda a,b: cmp(long(a), long(b)))
1909140Snilay@cs.wisc.edu
1919140Snilay@cs.wisc.edu        cpt_num = options.checkpoint_restore
1929140Snilay@cs.wisc.edu        if cpt_num > len(cpts):
1939140Snilay@cs.wisc.edu            fatal('Checkpoint %d not found', cpt_num)
1949140Snilay@cs.wisc.edu
1959816Sjthestness@gmail.com        cpt_starttick = int(cpts[cpt_num - 1])
1969140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
1979140Snilay@cs.wisc.edu
1989816Sjthestness@gmail.com    return cpt_starttick, checkpoint_dir
1999140Snilay@cs.wisc.edu
2009215Sandreas.hansson@arm.comdef scriptCheckpoints(options, maxtick, cptdir):
2019140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
2029140Snilay@cs.wisc.edu        checkpoint_inst = int(options.take_checkpoints)
2039140Snilay@cs.wisc.edu
2049140Snilay@cs.wisc.edu        # maintain correct offset if we restored from some instruction
2059140Snilay@cs.wisc.edu        if options.checkpoint_restore != None:
2069140Snilay@cs.wisc.edu            checkpoint_inst += options.checkpoint_restore
2079140Snilay@cs.wisc.edu
2089140Snilay@cs.wisc.edu        print "Creating checkpoint at inst:%d" % (checkpoint_inst)
2099140Snilay@cs.wisc.edu        exit_event = m5.simulate()
2109140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2119140Snilay@cs.wisc.edu        print "exit cause = %s" % exit_cause
2129140Snilay@cs.wisc.edu
2139140Snilay@cs.wisc.edu        # skip checkpoint instructions should they exist
2149140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2159140Snilay@cs.wisc.edu            exit_event = m5.simulate()
2169140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2179140Snilay@cs.wisc.edu
2189140Snilay@cs.wisc.edu        if exit_cause == "a thread reached the max instruction count":
2199140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
2209140Snilay@cs.wisc.edu                    (options.bench, checkpoint_inst)))
2219140Snilay@cs.wisc.edu            print "Checkpoint written."
2229140Snilay@cs.wisc.edu
2239140Snilay@cs.wisc.edu    else:
2249140Snilay@cs.wisc.edu        when, period = options.take_checkpoints.split(",", 1)
2259140Snilay@cs.wisc.edu        when = int(when)
2269140Snilay@cs.wisc.edu        period = int(period)
2279156Sandreas.hansson@arm.com        num_checkpoints = 0
2289140Snilay@cs.wisc.edu
2299634Sjthestness@gmail.com        exit_event = m5.simulate(when - m5.curTick())
2309140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2319140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
2329140Snilay@cs.wisc.edu            exit_event = m5.simulate(when - m5.curTick())
2339140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
2349140Snilay@cs.wisc.edu
2359140Snilay@cs.wisc.edu        if exit_cause == "simulate() limit reached":
2369140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2379140Snilay@cs.wisc.edu            num_checkpoints += 1
2389140Snilay@cs.wisc.edu
2399140Snilay@cs.wisc.edu        sim_ticks = when
2409140Snilay@cs.wisc.edu        max_checkpoints = options.max_checkpoints
2419140Snilay@cs.wisc.edu
2429140Snilay@cs.wisc.edu        while num_checkpoints < max_checkpoints and \
2439140Snilay@cs.wisc.edu                exit_cause == "simulate() limit reached":
2449140Snilay@cs.wisc.edu            if (sim_ticks + period) > maxtick:
2459140Snilay@cs.wisc.edu                exit_event = m5.simulate(maxtick - sim_ticks)
2469140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2479140Snilay@cs.wisc.edu                break
2489140Snilay@cs.wisc.edu            else:
2499140Snilay@cs.wisc.edu                exit_event = m5.simulate(period)
2509140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2519140Snilay@cs.wisc.edu                sim_ticks += period
2529140Snilay@cs.wisc.edu                while exit_event.getCause() == "checkpoint":
2539140Snilay@cs.wisc.edu                    exit_event = m5.simulate(sim_ticks - m5.curTick())
2549140Snilay@cs.wisc.edu                if exit_event.getCause() == "simulate() limit reached":
2559140Snilay@cs.wisc.edu                    m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2569140Snilay@cs.wisc.edu                    num_checkpoints += 1
2579140Snilay@cs.wisc.edu
2589606Snilay@cs.wisc.edu    return exit_event
2599140Snilay@cs.wisc.edu
2609140Snilay@cs.wisc.edudef benchCheckpoints(options, maxtick, cptdir):
2619634Sjthestness@gmail.com    exit_event = m5.simulate(maxtick - m5.curTick())
2629140Snilay@cs.wisc.edu    exit_cause = exit_event.getCause()
2639140Snilay@cs.wisc.edu
2649140Snilay@cs.wisc.edu    num_checkpoints = 0
2659140Snilay@cs.wisc.edu    max_checkpoints = options.max_checkpoints
2669140Snilay@cs.wisc.edu
2679140Snilay@cs.wisc.edu    while exit_cause == "checkpoint":
2689140Snilay@cs.wisc.edu        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2699140Snilay@cs.wisc.edu        num_checkpoints += 1
2709140Snilay@cs.wisc.edu        if num_checkpoints == max_checkpoints:
2719140Snilay@cs.wisc.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
2729140Snilay@cs.wisc.edu            break
2739140Snilay@cs.wisc.edu
2749140Snilay@cs.wisc.edu        exit_event = m5.simulate(maxtick - m5.curTick())
2759140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2769140Snilay@cs.wisc.edu
2779460Ssaidi@eecs.umich.edu    return exit_event
2789140Snilay@cs.wisc.edu
27910608Sdam.sunwoo@arm.com# Set up environment for taking SimPoint checkpoints
28010608Sdam.sunwoo@arm.com# Expecting SimPoint files generated by SimPoint 3.2
28110608Sdam.sunwoo@arm.comdef parseSimpointAnalysisFile(options, testsys):
28210608Sdam.sunwoo@arm.com    import re
28310608Sdam.sunwoo@arm.com
28410608Sdam.sunwoo@arm.com    simpoint_filename, weight_filename, interval_length, warmup_length = \
28510608Sdam.sunwoo@arm.com        options.take_simpoint_checkpoints.split(",", 3)
28610608Sdam.sunwoo@arm.com    print "simpoint analysis file:", simpoint_filename
28710608Sdam.sunwoo@arm.com    print "simpoint weight file:", weight_filename
28810608Sdam.sunwoo@arm.com    print "interval length:", interval_length
28910608Sdam.sunwoo@arm.com    print "warmup length:", warmup_length
29010608Sdam.sunwoo@arm.com
29110608Sdam.sunwoo@arm.com    interval_length = int(interval_length)
29210608Sdam.sunwoo@arm.com    warmup_length = int(warmup_length)
29310608Sdam.sunwoo@arm.com
29410608Sdam.sunwoo@arm.com    # Simpoint analysis output starts interval counts with 0.
29510608Sdam.sunwoo@arm.com    simpoints = []
29610608Sdam.sunwoo@arm.com    simpoint_start_insts = []
29710608Sdam.sunwoo@arm.com
29810608Sdam.sunwoo@arm.com    # Read in SimPoint analysis files
29910608Sdam.sunwoo@arm.com    simpoint_file = open(simpoint_filename)
30010608Sdam.sunwoo@arm.com    weight_file = open(weight_filename)
30110608Sdam.sunwoo@arm.com    while True:
30210608Sdam.sunwoo@arm.com        line = simpoint_file.readline()
30310608Sdam.sunwoo@arm.com        if not line:
30410608Sdam.sunwoo@arm.com            break
30510608Sdam.sunwoo@arm.com        m = re.match("(\d+)\s+(\d+)", line)
30610608Sdam.sunwoo@arm.com        if m:
30710608Sdam.sunwoo@arm.com            interval = int(m.group(1))
30810608Sdam.sunwoo@arm.com        else:
30910608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint file!')
31010608Sdam.sunwoo@arm.com
31110608Sdam.sunwoo@arm.com        line = weight_file.readline()
31210608Sdam.sunwoo@arm.com        if not line:
31310608Sdam.sunwoo@arm.com            fatal('not enough lines in simpoint weight file!')
31410608Sdam.sunwoo@arm.com        m = re.match("([0-9\.e\-]+)\s+(\d+)", line)
31510608Sdam.sunwoo@arm.com        if m:
31610608Sdam.sunwoo@arm.com            weight = float(m.group(1))
31710608Sdam.sunwoo@arm.com        else:
31810608Sdam.sunwoo@arm.com            fatal('unrecognized line in simpoint weight file!')
31910608Sdam.sunwoo@arm.com
32010608Sdam.sunwoo@arm.com        if (interval * interval_length - warmup_length > 0):
32110608Sdam.sunwoo@arm.com            starting_inst_count = \
32210608Sdam.sunwoo@arm.com                interval * interval_length - warmup_length
32310608Sdam.sunwoo@arm.com            actual_warmup_length = warmup_length
32410608Sdam.sunwoo@arm.com        else:
32510608Sdam.sunwoo@arm.com            # Not enough room for proper warmup
32610608Sdam.sunwoo@arm.com            # Just starting from the beginning
32710608Sdam.sunwoo@arm.com            starting_inst_count = 0
32810608Sdam.sunwoo@arm.com            actual_warmup_length = interval * interval_length
32910608Sdam.sunwoo@arm.com
33010608Sdam.sunwoo@arm.com        simpoints.append((interval, weight, starting_inst_count,
33110608Sdam.sunwoo@arm.com            actual_warmup_length))
33210608Sdam.sunwoo@arm.com
33310608Sdam.sunwoo@arm.com    # Sort SimPoints by starting inst count
33410608Sdam.sunwoo@arm.com    simpoints.sort(key=lambda obj: obj[2])
33510608Sdam.sunwoo@arm.com    for s in simpoints:
33610608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = s
33710608Sdam.sunwoo@arm.com        print str(interval), str(weight), starting_inst_count, \
33810608Sdam.sunwoo@arm.com            actual_warmup_length
33910608Sdam.sunwoo@arm.com        simpoint_start_insts.append(starting_inst_count)
34010608Sdam.sunwoo@arm.com
34110608Sdam.sunwoo@arm.com    print "Total # of simpoints:", len(simpoints)
34210608Sdam.sunwoo@arm.com    testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
34310608Sdam.sunwoo@arm.com
34410608Sdam.sunwoo@arm.com    return (simpoints, interval_length)
34510608Sdam.sunwoo@arm.com
34610608Sdam.sunwoo@arm.comdef takeSimpointCheckpoints(simpoints, interval_length, cptdir):
34710608Sdam.sunwoo@arm.com    num_checkpoints = 0
34810608Sdam.sunwoo@arm.com    index = 0
34910608Sdam.sunwoo@arm.com    last_chkpnt_inst_count = -1
35010608Sdam.sunwoo@arm.com    for simpoint in simpoints:
35110608Sdam.sunwoo@arm.com        interval, weight, starting_inst_count, actual_warmup_length = simpoint
35210608Sdam.sunwoo@arm.com        if starting_inst_count == last_chkpnt_inst_count:
35310608Sdam.sunwoo@arm.com            # checkpoint starting point same as last time
35410608Sdam.sunwoo@arm.com            # (when warmup period longer than starting point)
35510608Sdam.sunwoo@arm.com            exit_cause = "simpoint starting point found"
35610608Sdam.sunwoo@arm.com            code = 0
35710608Sdam.sunwoo@arm.com        else:
35810608Sdam.sunwoo@arm.com            exit_event = m5.simulate()
35910608Sdam.sunwoo@arm.com
36010608Sdam.sunwoo@arm.com            # skip checkpoint instructions should they exist
36110608Sdam.sunwoo@arm.com            while exit_event.getCause() == "checkpoint":
36210608Sdam.sunwoo@arm.com                print "Found 'checkpoint' exit event...ignoring..."
36310608Sdam.sunwoo@arm.com                exit_event = m5.simulate()
36410608Sdam.sunwoo@arm.com
36510608Sdam.sunwoo@arm.com            exit_cause = exit_event.getCause()
36610608Sdam.sunwoo@arm.com            code = exit_event.getCode()
36710608Sdam.sunwoo@arm.com
36810608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
36910608Sdam.sunwoo@arm.com            m5.checkpoint(joinpath(cptdir,
37010608Sdam.sunwoo@arm.com                "cpt.simpoint_%02d_inst_%d_weight_%f_interval_%d_warmup_%d"
37110608Sdam.sunwoo@arm.com                % (index, starting_inst_count, weight, interval_length,
37210608Sdam.sunwoo@arm.com                actual_warmup_length)))
37310608Sdam.sunwoo@arm.com            print "Checkpoint #%d written. start inst:%d weight:%f" % \
37410608Sdam.sunwoo@arm.com                (num_checkpoints, starting_inst_count, weight)
37510608Sdam.sunwoo@arm.com            num_checkpoints += 1
37610608Sdam.sunwoo@arm.com            last_chkpnt_inst_count = starting_inst_count
37710608Sdam.sunwoo@arm.com        else:
37810608Sdam.sunwoo@arm.com            break
37910608Sdam.sunwoo@arm.com        index += 1
38010608Sdam.sunwoo@arm.com
38110608Sdam.sunwoo@arm.com    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
38210608Sdam.sunwoo@arm.com    print "%d checkpoints taken" % num_checkpoints
38310608Sdam.sunwoo@arm.com    sys.exit(code)
38410608Sdam.sunwoo@arm.com
38510608Sdam.sunwoo@arm.comdef restoreSimpointCheckpoint():
38610608Sdam.sunwoo@arm.com    exit_event = m5.simulate()
38710608Sdam.sunwoo@arm.com    exit_cause = exit_event.getCause()
38810608Sdam.sunwoo@arm.com
38910608Sdam.sunwoo@arm.com    if exit_cause == "simpoint starting point found":
39010608Sdam.sunwoo@arm.com        print "Warmed up! Dumping and resetting stats!"
39110608Sdam.sunwoo@arm.com        m5.stats.dump()
39210608Sdam.sunwoo@arm.com        m5.stats.reset()
39310608Sdam.sunwoo@arm.com
39410608Sdam.sunwoo@arm.com        exit_event = m5.simulate()
39510608Sdam.sunwoo@arm.com        exit_cause = exit_event.getCause()
39610608Sdam.sunwoo@arm.com
39710608Sdam.sunwoo@arm.com        if exit_cause == "simpoint starting point found":
39810608Sdam.sunwoo@arm.com            print "Done running SimPoint!"
39910608Sdam.sunwoo@arm.com            sys.exit(exit_event.getCode())
40010608Sdam.sunwoo@arm.com
40110608Sdam.sunwoo@arm.com    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
40210608Sdam.sunwoo@arm.com    sys.exit(exit_event.getCode())
40310608Sdam.sunwoo@arm.com
4049151Satgutier@umich.edudef repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
4059151Satgutier@umich.edu    print "starting switch loop"
4069151Satgutier@umich.edu    while True:
4079151Satgutier@umich.edu        exit_event = m5.simulate(switch_freq)
4089151Satgutier@umich.edu        exit_cause = exit_event.getCause()
4099151Satgutier@umich.edu
4109151Satgutier@umich.edu        if exit_cause != "simulate() limit reached":
4119460Ssaidi@eecs.umich.edu            return exit_event
4129151Satgutier@umich.edu
4139521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, repeat_switch_cpu_list)
4149151Satgutier@umich.edu
4159151Satgutier@umich.edu        tmp_cpu_list = []
4169151Satgutier@umich.edu        for old_cpu, new_cpu in repeat_switch_cpu_list:
4179151Satgutier@umich.edu            tmp_cpu_list.append((new_cpu, old_cpu))
4189151Satgutier@umich.edu        repeat_switch_cpu_list = tmp_cpu_list
4199151Satgutier@umich.edu
4209151Satgutier@umich.edu        if (maxtick - m5.curTick()) <= switch_freq:
4219151Satgutier@umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
4229460Ssaidi@eecs.umich.edu            return exit_event
4239151Satgutier@umich.edu
4243481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
4253395Shsul@eecs.umich.edu    if options.checkpoint_dir:
4263395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
4275211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
4285211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
4293395Shsul@eecs.umich.edu    else:
4303395Shsul@eecs.umich.edu        cptdir = getcwd()
4313395Shsul@eecs.umich.edu
4325370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
4336654Snate@binkert.org        fatal("Can't specify both --fast-forward and --checkpoint-restore")
4345370Ssaidi@eecs.umich.edu
4355371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
4366654Snate@binkert.org        fatal("Must specify --caches when using --standard-switch")
4375370Ssaidi@eecs.umich.edu
4389151Satgutier@umich.edu    if options.standard_switch and options.repeat_switch:
4399151Satgutier@umich.edu        fatal("Can't specify both --standard-switch and --repeat-switch")
4409151Satgutier@umich.edu
4419151Satgutier@umich.edu    if options.repeat_switch and options.take_checkpoints:
4429151Satgutier@umich.edu        fatal("Can't specify both --repeat-switch and --take-checkpoints")
4439151Satgutier@umich.edu
4443395Shsul@eecs.umich.edu    np = options.num_cpus
4453481Shsul@eecs.umich.edu    switch_cpus = None
4463481Shsul@eecs.umich.edu
4478318Sksewell@umich.edu    if options.prog_interval:
4486144Sksewell@umich.edu        for i in xrange(np):
4498311Sksewell@umich.edu            testsys.cpu[i].progress_interval = options.prog_interval
4506144Sksewell@umich.edu
4516641Sksewell@umich.edu    if options.maxinsts:
4526641Sksewell@umich.edu        for i in xrange(np):
4536641Sksewell@umich.edu            testsys.cpu[i].max_insts_any_thread = options.maxinsts
4546641Sksewell@umich.edu
4553481Shsul@eecs.umich.edu    if cpu_class:
4569433SAndreas.Sandberg@ARM.com        switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
4573481Shsul@eecs.umich.edu                       for i in xrange(np)]
4583481Shsul@eecs.umich.edu
4593481Shsul@eecs.umich.edu        for i in xrange(np):
4605361Srstrong@cs.ucsd.edu            if options.fast_forward:
4615369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
46211251Sradhika.jagtap@ARM.com            switch_cpus[i].system = testsys
4638803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
4649793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
46511251Sradhika.jagtap@ARM.com            switch_cpus[i].progress_interval = \
46611251Sradhika.jagtap@ARM.com                testsys.cpu[i].progress_interval
4675369Ssaidi@eecs.umich.edu            # simulation period
4688311Sksewell@umich.edu            if options.maxinsts:
4698311Sksewell@umich.edu                switch_cpus[i].max_insts_any_thread = options.maxinsts
4708887Sgeoffrey.blake@arm.com            # Add checker cpu if selected
4718887Sgeoffrey.blake@arm.com            if options.checker:
4728887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
4733481Shsul@eecs.umich.edu
47411251Sradhika.jagtap@ARM.com        # If elastic tracing is enabled attach the elastic trace probe
47511251Sradhika.jagtap@ARM.com        # to the switch CPUs
47611251Sradhika.jagtap@ARM.com        if options.elastic_trace_en:
47711251Sradhika.jagtap@ARM.com            CpuConfig.config_etrace(cpu_class, switch_cpus, options)
47811251Sradhika.jagtap@ARM.com
4795311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
4803481Shsul@eecs.umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
4813395Shsul@eecs.umich.edu
4829151Satgutier@umich.edu    if options.repeat_switch:
4839518SAndreas.Sandberg@ARM.com        switch_class = getCPUClass(options.cpu_type)[0]
4849518SAndreas.Sandberg@ARM.com        if switch_class.require_caches() and \
4859518SAndreas.Sandberg@ARM.com                not options.caches:
4869518SAndreas.Sandberg@ARM.com            print "%s: Must be used with caches" % str(switch_class)
4879518SAndreas.Sandberg@ARM.com            sys.exit(1)
4889518SAndreas.Sandberg@ARM.com        if not switch_class.support_take_over():
4899518SAndreas.Sandberg@ARM.com            print "%s: CPU switching not supported" % str(switch_class)
4909518SAndreas.Sandberg@ARM.com            sys.exit(1)
4919151Satgutier@umich.edu
4929518SAndreas.Sandberg@ARM.com        repeat_switch_cpus = [switch_class(switched_out=True, \
4939518SAndreas.Sandberg@ARM.com                                               cpu_id=(i)) for i in xrange(np)]
4949151Satgutier@umich.edu
4959151Satgutier@umich.edu        for i in xrange(np):
4969151Satgutier@umich.edu            repeat_switch_cpus[i].system = testsys
4979151Satgutier@umich.edu            repeat_switch_cpus[i].workload = testsys.cpu[i].workload
4989793Sakash.bagdia@arm.com            repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
4999151Satgutier@umich.edu
5009151Satgutier@umich.edu            if options.maxinsts:
5019151Satgutier@umich.edu                repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
5029151Satgutier@umich.edu
5039151Satgutier@umich.edu            if options.checker:
5049151Satgutier@umich.edu                repeat_switch_cpus[i].addCheckerCpu()
5059151Satgutier@umich.edu
5069151Satgutier@umich.edu        testsys.repeat_switch_cpus = repeat_switch_cpus
5079151Satgutier@umich.edu
5089151Satgutier@umich.edu        if cpu_class:
5099151Satgutier@umich.edu            repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
5109151Satgutier@umich.edu                                      for i in xrange(np)]
5119151Satgutier@umich.edu        else:
5129151Satgutier@umich.edu            repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
5139151Satgutier@umich.edu                                      for i in xrange(np)]
5149151Satgutier@umich.edu
5153395Shsul@eecs.umich.edu    if options.standard_switch:
5169433SAndreas.Sandberg@ARM.com        switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
5173395Shsul@eecs.umich.edu                       for i in xrange(np)]
5189433SAndreas.Sandberg@ARM.com        switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
5193395Shsul@eecs.umich.edu                        for i in xrange(np)]
5203478Shsul@eecs.umich.edu
5213395Shsul@eecs.umich.edu        for i in xrange(np):
5223395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
5233478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
5248803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
5258803Sgblack@eecs.umich.edu            switch_cpus_1[i].workload = testsys.cpu[i].workload
5269793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
5279793Sakash.bagdia@arm.com            switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain
5283480Shsul@eecs.umich.edu
5295361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
5305369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
5315361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5325361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
5335361Srstrong@cs.ucsd.edu            elif options.fast_forward:
5345369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
5355361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
5365361Srstrong@cs.ucsd.edu            elif options.simpoint:
5375378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5386654Snate@binkert.org                    fatal('simpoint not found')
5395361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
5405361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
5415361Srstrong@cs.ucsd.edu            # No distance specified, just switch
5425361Srstrong@cs.ucsd.edu            else:
5435361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
5445361Srstrong@cs.ucsd.edu
5455361Srstrong@cs.ucsd.edu            # warmup period
5465361Srstrong@cs.ucsd.edu            if options.warmup_insts:
5475361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
5485361Srstrong@cs.ucsd.edu
5495361Srstrong@cs.ucsd.edu            # simulation period
5508311Sksewell@umich.edu            if options.maxinsts:
5518311Sksewell@umich.edu                switch_cpus_1[i].max_insts_any_thread = options.maxinsts
5525353Svilas.sridharan@gmail.com
5538887Sgeoffrey.blake@arm.com            # attach the checker cpu if selected
5548887Sgeoffrey.blake@arm.com            if options.checker:
5558887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
5568887Sgeoffrey.blake@arm.com                switch_cpus_1[i].addCheckerCpu()
5578887Sgeoffrey.blake@arm.com
5588211Satgutier@umich.edu        testsys.switch_cpus = switch_cpus
5598211Satgutier@umich.edu        testsys.switch_cpus_1 = switch_cpus_1
5608211Satgutier@umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
5618211Satgutier@umich.edu        switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
5623395Shsul@eecs.umich.edu
5635361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
5645369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
5655361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
5665361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
5675361Srstrong@cs.ucsd.edu        # Set an instruction break point
5685361Srstrong@cs.ucsd.edu        if options.simpoint:
5695361Srstrong@cs.ucsd.edu            for i in xrange(np):
5705378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
5716654Snate@binkert.org                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
5725369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
5735361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
5745361Srstrong@cs.ucsd.edu                # used for output below
5755361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
5765361Srstrong@cs.ucsd.edu        else:
5775361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
5785361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
5795361Srstrong@cs.ucsd.edu            # for the upcoming simulation
5805361Srstrong@cs.ucsd.edu            for i in xrange(np):
5815361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
5825361Srstrong@cs.ucsd.edu
58310608Sdam.sunwoo@arm.com    if options.take_simpoint_checkpoints != None:
58410608Sdam.sunwoo@arm.com        simpoints, interval_length = parseSimpointAnalysisFile(options, testsys)
58510608Sdam.sunwoo@arm.com
5867531Ssteve.reinhardt@amd.com    checkpoint_dir = None
5879816Sjthestness@gmail.com    if options.checkpoint_restore:
5889816Sjthestness@gmail.com        cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys)
5897531Ssteve.reinhardt@amd.com    m5.instantiate(checkpoint_dir)
5903395Shsul@eecs.umich.edu
59110757SCurtis.Dunham@arm.com    # Initialization is complete.  If we're not in control of simulation
59210757SCurtis.Dunham@arm.com    # (that is, if we're a slave simulator acting as a component in another
59310757SCurtis.Dunham@arm.com    #  'master' simulator) then we're done here.  The other simulator will
59410757SCurtis.Dunham@arm.com    # call simulate() directly. --initialize-only is used to indicate this.
59510757SCurtis.Dunham@arm.com    if options.initialize_only:
59610757SCurtis.Dunham@arm.com        return
59710757SCurtis.Dunham@arm.com
5989816Sjthestness@gmail.com    # Handle the max tick settings now that tick frequency was resolved
5999816Sjthestness@gmail.com    # during system instantiation
6009816Sjthestness@gmail.com    # NOTE: the maxtick variable here is in absolute ticks, so it must
6019816Sjthestness@gmail.com    # include any simulated ticks before a checkpoint
6029816Sjthestness@gmail.com    explicit_maxticks = 0
6039816Sjthestness@gmail.com    maxtick_from_abs = m5.MaxTick
6049816Sjthestness@gmail.com    maxtick_from_rel = m5.MaxTick
6059816Sjthestness@gmail.com    maxtick_from_maxtime = m5.MaxTick
6069816Sjthestness@gmail.com    if options.abs_max_tick:
6079816Sjthestness@gmail.com        maxtick_from_abs = options.abs_max_tick
6089816Sjthestness@gmail.com        explicit_maxticks += 1
6099816Sjthestness@gmail.com    if options.rel_max_tick:
6109816Sjthestness@gmail.com        maxtick_from_rel = options.rel_max_tick
6119816Sjthestness@gmail.com        if options.checkpoint_restore:
6129816Sjthestness@gmail.com            # NOTE: this may need to be updated if checkpoints ever store
6139816Sjthestness@gmail.com            # the ticks per simulated second
6149816Sjthestness@gmail.com            maxtick_from_rel += cpt_starttick
6159867Sjthestness@gmail.com            if options.at_instruction or options.simpoint:
6169867Sjthestness@gmail.com                warn("Relative max tick specified with --at-instruction or" \
6179867Sjthestness@gmail.com                     " --simpoint\n      These options don't specify the " \
6189867Sjthestness@gmail.com                     "checkpoint start tick, so assuming\n      you mean " \
6199867Sjthestness@gmail.com                     "absolute max tick")
6209816Sjthestness@gmail.com        explicit_maxticks += 1
6219816Sjthestness@gmail.com    if options.maxtime:
6229816Sjthestness@gmail.com        maxtick_from_maxtime = m5.ticks.fromSeconds(options.maxtime)
6239816Sjthestness@gmail.com        explicit_maxticks += 1
6249816Sjthestness@gmail.com    if explicit_maxticks > 1:
6259816Sjthestness@gmail.com        warn("Specified multiple of --abs-max-tick, --rel-max-tick, --maxtime."\
6269816Sjthestness@gmail.com             " Using least")
6279816Sjthestness@gmail.com    maxtick = min([maxtick_from_abs, maxtick_from_rel, maxtick_from_maxtime])
6289816Sjthestness@gmail.com
6299816Sjthestness@gmail.com    if options.checkpoint_restore != None and maxtick < cpt_starttick:
6309816Sjthestness@gmail.com        fatal("Bad maxtick (%d) specified: " \
6319816Sjthestness@gmail.com              "Checkpoint starts starts from tick: %d", maxtick, cpt_starttick)
6329816Sjthestness@gmail.com
6333481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
6345361Srstrong@cs.ucsd.edu        if options.standard_switch:
6355361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
6365361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
6375361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6385361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
6395361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
6405361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
6415361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
6425361Srstrong@cs.ucsd.edu        else:
6435361Srstrong@cs.ucsd.edu            print "Switch at curTick count:%s" % str(10000)
6445361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
6457766Sgblack@eecs.umich.edu        print "Switched CPUS @ tick %s" % (m5.curTick())
6463395Shsul@eecs.umich.edu
6479521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, switch_cpu_list)
6483395Shsul@eecs.umich.edu
6493481Shsul@eecs.umich.edu        if options.standard_switch:
6505361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%d" % \
6515361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus[0].max_insts_any_thread)
6525361Srstrong@cs.ucsd.edu
6535361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
6545361Srstrong@cs.ucsd.edu            if options.warmup_insts:
6555361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
6565361Srstrong@cs.ucsd.edu            else:
6579151Satgutier@umich.edu                exit_event = m5.simulate(options.standard_switch)
6587766Sgblack@eecs.umich.edu            print "Switching CPUS @ tick %s" % (m5.curTick())
6595361Srstrong@cs.ucsd.edu            print "Simulation ends instruction count:%d" % \
6605361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus_1[0].max_insts_any_thread)
6619521SAndreas.Sandberg@ARM.com            m5.switchCpus(testsys, switch_cpu_list1)
6623395Shsul@eecs.umich.edu
6637489Ssteve.reinhardt@amd.com    # If we're taking and restoring checkpoints, use checkpoint_dir
6647489Ssteve.reinhardt@amd.com    # option only for finding the checkpoints to restore from.  This
6657489Ssteve.reinhardt@amd.com    # lets us test checkpointing by restoring from one set of
6667489Ssteve.reinhardt@amd.com    # checkpoints, generating a second set, and then comparing them.
66710608Sdam.sunwoo@arm.com    if (options.take_checkpoints or options.take_simpoint_checkpoints) \
66810608Sdam.sunwoo@arm.com        and options.checkpoint_restore:
66910608Sdam.sunwoo@arm.com
6707489Ssteve.reinhardt@amd.com        if m5.options.outdir:
6717489Ssteve.reinhardt@amd.com            cptdir = m5.options.outdir
6727489Ssteve.reinhardt@amd.com        else:
6737489Ssteve.reinhardt@amd.com            cptdir = getcwd()
6747489Ssteve.reinhardt@amd.com
6755369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
6769140Snilay@cs.wisc.edu        # Checkpoints being taken via the command line at <when> and at
6779140Snilay@cs.wisc.edu        # subsequent periods of <period>.  Checkpoint instructions
6789140Snilay@cs.wisc.edu        # received from the benchmark running are ignored and skipped in
6799140Snilay@cs.wisc.edu        # favor of command line checkpoint instructions.
6809606Snilay@cs.wisc.edu        exit_event = scriptCheckpoints(options, maxtick, cptdir)
68110608Sdam.sunwoo@arm.com
68210608Sdam.sunwoo@arm.com    # Take SimPoint checkpoints
68310608Sdam.sunwoo@arm.com    elif options.take_simpoint_checkpoints != None:
68410608Sdam.sunwoo@arm.com        takeSimpointCheckpoints(simpoints, interval_length, cptdir)
68510608Sdam.sunwoo@arm.com
68610608Sdam.sunwoo@arm.com    # Restore from SimPoint checkpoints
68710608Sdam.sunwoo@arm.com    elif options.restore_simpoint_checkpoint != None:
68810608Sdam.sunwoo@arm.com        restoreSimpointCheckpoint()
68910608Sdam.sunwoo@arm.com
6909140Snilay@cs.wisc.edu    else:
6919151Satgutier@umich.edu        if options.fast_forward:
6929151Satgutier@umich.edu            m5.stats.reset()
6939151Satgutier@umich.edu        print "**** REAL SIMULATION ****"
6949151Satgutier@umich.edu
6959140Snilay@cs.wisc.edu        # If checkpoints are being taken, then the checkpoint instruction
6969140Snilay@cs.wisc.edu        # will occur in the benchmark code it self.
6979151Satgutier@umich.edu        if options.repeat_switch and maxtick > options.repeat_switch:
6989460Ssaidi@eecs.umich.edu            exit_event = repeatSwitch(testsys, repeat_switch_cpu_list,
6999151Satgutier@umich.edu                                      maxtick, options.repeat_switch)
7009151Satgutier@umich.edu        else:
7019460Ssaidi@eecs.umich.edu            exit_event = benchCheckpoints(options, maxtick, cptdir)
7023395Shsul@eecs.umich.edu
7039460Ssaidi@eecs.umich.edu    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause())
7046776SBrad.Beckmann@amd.com    if options.checkpoint_at_end:
7057525Ssteve.reinhardt@amd.com        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
7069457Svilanova@ac.upc.edu
7079494Sandreas@sandberg.pp.se    if not m5.options.interactive:
7089494Sandreas@sandberg.pp.se        sys.exit(exit_event.getCode())
709