CpuConfig.py revision 12097:77a3d2890ba6 
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
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8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
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16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
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20# neither the name of the copyright holders nor the names of its
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22# this software without specific prior written permission.
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24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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35#
36# Authors: Andreas Sandberg
37
38from m5 import fatal
39import m5.objects
40import inspect
41import sys
42from textwrap import TextWrapper
43
44# Dictionary of mapping names of real CPU models to classes.
45_cpu_classes = {}
46
47
48def is_cpu_class(cls):
49    """Determine if a class is a CPU that can be instantiated"""
50
51    # We can't use the normal inspect.isclass because the ParamFactory
52    # and ProxyFactory classes have a tendency to confuse it.
53    try:
54        return issubclass(cls, m5.objects.BaseCPU) and \
55            not cls.abstract and \
56            not issubclass(cls, m5.objects.CheckerCPU)
57    except (TypeError, AttributeError):
58        return False
59
60def get(name):
61    """Get a CPU class from a user provided class name or alias."""
62
63    try:
64        cpu_class = _cpu_classes[name]
65        return cpu_class
66    except KeyError:
67        print "%s is not a valid CPU model." % (name,)
68        sys.exit(1)
69
70def print_cpu_list():
71    """Print a list of available CPU classes including their aliases."""
72
73    print "Available CPU classes:"
74    doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
75    for name, cls in _cpu_classes.items():
76        print "\t%s" % name
77
78        # Try to extract the class documentation from the class help
79        # string.
80        doc = inspect.getdoc(cls)
81        if doc:
82            for line in doc_wrapper.wrap(doc):
83                print line
84
85def cpu_names():
86    """Return a list of valid CPU names."""
87    return _cpu_classes.keys()
88
89def config_etrace(cpu_cls, cpu_list, options):
90    if issubclass(cpu_cls, m5.objects.DerivO3CPU):
91        # Assign the same file name to all cpus for now. This must be
92        # revisited when creating elastic traces for multi processor systems.
93        for cpu in cpu_list:
94            # Attach the elastic trace probe listener. Set the protobuf trace
95            # file names. Set the dependency window size equal to the cpu it
96            # is attached to.
97            cpu.traceListener = m5.objects.ElasticTrace(
98                                instFetchTraceFile = options.inst_trace_file,
99                                dataDepTraceFile = options.data_trace_file,
100                                depWindowSize = 3 * cpu.numROBEntries)
101            # Make the number of entries in the ROB, LQ and SQ very
102            # large so that there are no stalls due to resource
103            # limitation as such stalls will get captured in the trace
104            # as compute delay. For replay, ROB, LQ and SQ sizes are
105            # modelled in the Trace CPU.
106            cpu.numROBEntries = 512;
107            cpu.LQEntries = 128;
108            cpu.SQEntries = 128;
109    else:
110        fatal("%s does not support data dependency tracing. Use a CPU model of"
111              " type or inherited from DerivO3CPU.", cpu_cls)
112
113# The ARM detailed CPU is special in the sense that it doesn't exist
114# in the normal object hierarchy, so we have to add it manually.
115try:
116    from cores.arm.O3_ARM_v7a import O3_ARM_v7a_3
117    _cpu_classes["O3_ARM_v7a_3"] = O3_ARM_v7a_3
118except:
119    pass
120
121# The calibrated ex5-model cores
122try:
123    from cores.arm.ex5_LITTLE import ex5_LITTLE
124    _cpu_classes["ex5_LITTLE"] = ex5_LITTLE
125except:
126    pass
127
128try:
129    from cores.arm.ex5_big import ex5_big
130    _cpu_classes["ex5_big"] = ex5_big
131except:
132    pass
133
134
135# Add all CPUs in the object hierarchy.
136for name, cls in inspect.getmembers(m5.objects, is_cpu_class):
137    _cpu_classes[name] = cls
138