CpuConfig.py revision 12028
1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Sandberg 37 38import m5.objects 39import inspect 40import sys 41from textwrap import TextWrapper 42 43# Dictionary of mapping names of real CPU models to classes. 44_cpu_classes = {} 45 46 47def is_cpu_class(cls): 48 """Determine if a class is a CPU that can be instantiated""" 49 50 # We can't use the normal inspect.isclass because the ParamFactory 51 # and ProxyFactory classes have a tendency to confuse it. 52 try: 53 return issubclass(cls, m5.objects.BaseCPU) and \ 54 not cls.abstract and \ 55 not issubclass(cls, m5.objects.CheckerCPU) 56 except (TypeError, AttributeError): 57 return False 58 59def get(name): 60 """Get a CPU class from a user provided class name or alias.""" 61 62 try: 63 cpu_class = _cpu_classes[name] 64 return cpu_class 65 except KeyError: 66 print "%s is not a valid CPU model." % (name,) 67 sys.exit(1) 68 69def print_cpu_list(): 70 """Print a list of available CPU classes including their aliases.""" 71 72 print "Available CPU classes:" 73 doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t") 74 for name, cls in _cpu_classes.items(): 75 print "\t%s" % name 76 77 # Try to extract the class documentation from the class help 78 # string. 79 doc = inspect.getdoc(cls) 80 if doc: 81 for line in doc_wrapper.wrap(doc): 82 print line 83 84def cpu_names(): 85 """Return a list of valid CPU names.""" 86 return _cpu_classes.keys() 87 88def config_etrace(cpu_cls, cpu_list, options): 89 if issubclass(cpu_cls, m5.objects.DerivO3CPU): 90 # Assign the same file name to all cpus for now. This must be 91 # revisited when creating elastic traces for multi processor systems. 92 for cpu in cpu_list: 93 # Attach the elastic trace probe listener. Set the protobuf trace 94 # file names. Set the dependency window size equal to the cpu it 95 # is attached to. 96 cpu.traceListener = m5.objects.ElasticTrace( 97 instFetchTraceFile = options.inst_trace_file, 98 dataDepTraceFile = options.data_trace_file, 99 depWindowSize = 3 * cpu.numROBEntries) 100 # Make the number of entries in the ROB, LQ and SQ very 101 # large so that there are no stalls due to resource 102 # limitation as such stalls will get captured in the trace 103 # as compute delay. For replay, ROB, LQ and SQ sizes are 104 # modelled in the Trace CPU. 105 cpu.numROBEntries = 512; 106 cpu.LQEntries = 128; 107 cpu.SQEntries = 128; 108 else: 109 fatal("%s does not support data dependency tracing. Use a CPU model of" 110 " type or inherited from DerivO3CPU.", cpu_cls) 111 112# The ARM detailed CPU is special in the sense that it doesn't exist 113# in the normal object hierarchy, so we have to add it manually. 114try: 115 from O3_ARM_v7a import O3_ARM_v7a_3 116 _cpu_classes["O3_ARM_v7a_3"] = O3_ARM_v7a_3 117except: 118 pass 119 120# The calibrated ex5-model cores 121try: 122 from ex5_LITTLE import ex5_LITTLE 123 _cpu_classes["ex5_LITTLE"] = ex5_LITTLE 124except: 125 pass 126 127try: 128 from ex5_big import ex5_big 129 _cpu_classes["ex5_big"] = ex5_big 130except: 131 pass 132 133 134# Add all CPUs in the object hierarchy. 135for name, cls in inspect.getmembers(m5.objects, is_cpu_class): 136 _cpu_classes[name] = cls 137