CpuConfig.py revision 11688
19520SAndreas.Sandberg@ARM.com# Copyright (c) 2012 ARM Limited
29520SAndreas.Sandberg@ARM.com# All rights reserved.
39520SAndreas.Sandberg@ARM.com#
49520SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
59520SAndreas.Sandberg@ARM.com# not be construed as granting a license to any other intellectual
69520SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79520SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89520SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99520SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
109520SAndreas.Sandberg@ARM.com# unmodified and in its entirety in all distributions of the software,
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149520SAndreas.Sandberg@ARM.com# modification, are permitted provided that the following conditions are
159520SAndreas.Sandberg@ARM.com# met: redistributions of source code must retain the above copyright
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359520SAndreas.Sandberg@ARM.com#
369520SAndreas.Sandberg@ARM.com# Authors: Andreas Sandberg
379520SAndreas.Sandberg@ARM.com
389520SAndreas.Sandberg@ARM.comimport m5.objects
399520SAndreas.Sandberg@ARM.comimport inspect
409520SAndreas.Sandberg@ARM.comimport sys
419520SAndreas.Sandberg@ARM.comfrom textwrap import  TextWrapper
429520SAndreas.Sandberg@ARM.com
439520SAndreas.Sandberg@ARM.com# Dictionary of mapping names of real CPU models to classes.
449520SAndreas.Sandberg@ARM.com_cpu_classes = {}
459520SAndreas.Sandberg@ARM.com
469520SAndreas.Sandberg@ARM.com# CPU aliases. The CPUs listed here might not be compiled, we make
479520SAndreas.Sandberg@ARM.com# sure they exist before we add them to the CPU list. A target may be
489520SAndreas.Sandberg@ARM.com# specified as a tuple, in which case the first available CPU model in
499520SAndreas.Sandberg@ARM.com# the tuple will be used as the target.
509520SAndreas.Sandberg@ARM.com_cpu_aliases_all = [
519520SAndreas.Sandberg@ARM.com    ("timing", "TimingSimpleCPU"),
529520SAndreas.Sandberg@ARM.com    ("atomic", "AtomicSimpleCPU"),
5310259SAndrew.Bardsley@arm.com    ("minor", "MinorCPU"),
549520SAndreas.Sandberg@ARM.com    ("detailed", "DerivO3CPU"),
5510860Sandreas.sandberg@arm.com    ("kvm", ("ArmKvmCPU", "ArmV8KvmCPU", "X86KvmCPU")),
5611251Sradhika.jagtap@ARM.com    ("trace", "TraceCPU"),
579520SAndreas.Sandberg@ARM.com    ]
589520SAndreas.Sandberg@ARM.com
599520SAndreas.Sandberg@ARM.com# Filtered list of aliases. Only aliases for existing CPUs exist in
609520SAndreas.Sandberg@ARM.com# this list.
619520SAndreas.Sandberg@ARM.com_cpu_aliases = {}
629520SAndreas.Sandberg@ARM.com
639520SAndreas.Sandberg@ARM.com
649520SAndreas.Sandberg@ARM.comdef is_cpu_class(cls):
659520SAndreas.Sandberg@ARM.com    """Determine if a class is a CPU that can be instantiated"""
669520SAndreas.Sandberg@ARM.com
679520SAndreas.Sandberg@ARM.com    # We can't use the normal inspect.isclass because the ParamFactory
689520SAndreas.Sandberg@ARM.com    # and ProxyFactory classes have a tendency to confuse it.
699520SAndreas.Sandberg@ARM.com    try:
709520SAndreas.Sandberg@ARM.com        return issubclass(cls, m5.objects.BaseCPU) and \
719520SAndreas.Sandberg@ARM.com            not cls.abstract and \
729520SAndreas.Sandberg@ARM.com            not issubclass(cls, m5.objects.CheckerCPU)
7311688Sandreas.hansson@arm.com    except (TypeError, AttributeError):
749520SAndreas.Sandberg@ARM.com        return False
759520SAndreas.Sandberg@ARM.com
769520SAndreas.Sandberg@ARM.comdef get(name):
779520SAndreas.Sandberg@ARM.com    """Get a CPU class from a user provided class name or alias."""
789520SAndreas.Sandberg@ARM.com
799520SAndreas.Sandberg@ARM.com    real_name = _cpu_aliases.get(name, name)
809520SAndreas.Sandberg@ARM.com
819520SAndreas.Sandberg@ARM.com    try:
829520SAndreas.Sandberg@ARM.com        cpu_class = _cpu_classes[real_name]
839520SAndreas.Sandberg@ARM.com        return cpu_class
849520SAndreas.Sandberg@ARM.com    except KeyError:
859520SAndreas.Sandberg@ARM.com        print "%s is not a valid CPU model." % (name,)
869520SAndreas.Sandberg@ARM.com        sys.exit(1)
879520SAndreas.Sandberg@ARM.com
889520SAndreas.Sandberg@ARM.comdef print_cpu_list():
899520SAndreas.Sandberg@ARM.com    """Print a list of available CPU classes including their aliases."""
909520SAndreas.Sandberg@ARM.com
919520SAndreas.Sandberg@ARM.com    print "Available CPU classes:"
929520SAndreas.Sandberg@ARM.com    doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
939520SAndreas.Sandberg@ARM.com    for name, cls in _cpu_classes.items():
949520SAndreas.Sandberg@ARM.com        print "\t%s" % name
959520SAndreas.Sandberg@ARM.com
969520SAndreas.Sandberg@ARM.com        # Try to extract the class documentation from the class help
979520SAndreas.Sandberg@ARM.com        # string.
989520SAndreas.Sandberg@ARM.com        doc = inspect.getdoc(cls)
999520SAndreas.Sandberg@ARM.com        if doc:
1009520SAndreas.Sandberg@ARM.com            for line in doc_wrapper.wrap(doc):
1019520SAndreas.Sandberg@ARM.com                print line
1029520SAndreas.Sandberg@ARM.com
1039520SAndreas.Sandberg@ARM.com    if _cpu_aliases:
1049520SAndreas.Sandberg@ARM.com        print "\nCPU aliases:"
1059520SAndreas.Sandberg@ARM.com        for alias, target in _cpu_aliases.items():
1069520SAndreas.Sandberg@ARM.com            print "\t%s => %s" % (alias, target)
1079520SAndreas.Sandberg@ARM.com
1089520SAndreas.Sandberg@ARM.comdef cpu_names():
1099520SAndreas.Sandberg@ARM.com    """Return a list of valid CPU names."""
1109520SAndreas.Sandberg@ARM.com    return _cpu_classes.keys() + _cpu_aliases.keys()
1119520SAndreas.Sandberg@ARM.com
11211251Sradhika.jagtap@ARM.comdef config_etrace(cpu_cls, cpu_list, options):
11311251Sradhika.jagtap@ARM.com    if issubclass(cpu_cls, m5.objects.DerivO3CPU):
11411251Sradhika.jagtap@ARM.com        # Assign the same file name to all cpus for now. This must be
11511251Sradhika.jagtap@ARM.com        # revisited when creating elastic traces for multi processor systems.
11611251Sradhika.jagtap@ARM.com        for cpu in cpu_list:
11711251Sradhika.jagtap@ARM.com            # Attach the elastic trace probe listener. Set the protobuf trace
11811251Sradhika.jagtap@ARM.com            # file names. Set the dependency window size equal to the cpu it
11911251Sradhika.jagtap@ARM.com            # is attached to.
12011251Sradhika.jagtap@ARM.com            cpu.traceListener = m5.objects.ElasticTrace(
12111251Sradhika.jagtap@ARM.com                                instFetchTraceFile = options.inst_trace_file,
12211251Sradhika.jagtap@ARM.com                                dataDepTraceFile = options.data_trace_file,
12311251Sradhika.jagtap@ARM.com                                depWindowSize = 3 * cpu.numROBEntries)
12411251Sradhika.jagtap@ARM.com            # Make the number of entries in the ROB, LQ and SQ very
12511251Sradhika.jagtap@ARM.com            # large so that there are no stalls due to resource
12611251Sradhika.jagtap@ARM.com            # limitation as such stalls will get captured in the trace
12711251Sradhika.jagtap@ARM.com            # as compute delay. For replay, ROB, LQ and SQ sizes are
12811251Sradhika.jagtap@ARM.com            # modelled in the Trace CPU.
12911251Sradhika.jagtap@ARM.com            cpu.numROBEntries = 512;
13011251Sradhika.jagtap@ARM.com            cpu.LQEntries = 128;
13111251Sradhika.jagtap@ARM.com            cpu.SQEntries = 128;
13211251Sradhika.jagtap@ARM.com    else:
13311251Sradhika.jagtap@ARM.com        fatal("%s does not support data dependency tracing. Use a CPU model of"
13411251Sradhika.jagtap@ARM.com              " type or inherited from DerivO3CPU.", cpu_cls)
13511251Sradhika.jagtap@ARM.com
1369520SAndreas.Sandberg@ARM.com# The ARM detailed CPU is special in the sense that it doesn't exist
1379520SAndreas.Sandberg@ARM.com# in the normal object hierarchy, so we have to add it manually.
1389520SAndreas.Sandberg@ARM.comtry:
1399520SAndreas.Sandberg@ARM.com    from O3_ARM_v7a import O3_ARM_v7a_3
1409520SAndreas.Sandberg@ARM.com    _cpu_classes["arm_detailed"] = O3_ARM_v7a_3
1419520SAndreas.Sandberg@ARM.comexcept:
1429520SAndreas.Sandberg@ARM.com    pass
1439520SAndreas.Sandberg@ARM.com
1449520SAndreas.Sandberg@ARM.com# Add all CPUs in the object hierarchy.
1459520SAndreas.Sandberg@ARM.comfor name, cls in inspect.getmembers(m5.objects, is_cpu_class):
1469520SAndreas.Sandberg@ARM.com    _cpu_classes[name] = cls
1479520SAndreas.Sandberg@ARM.com
1489520SAndreas.Sandberg@ARM.comfor alias, target in _cpu_aliases_all:
1499520SAndreas.Sandberg@ARM.com    if isinstance(target, tuple):
1509520SAndreas.Sandberg@ARM.com        # Some aliases contain a list of CPU model sorted in priority
1519520SAndreas.Sandberg@ARM.com        # order. Use the first target that's available.
1529520SAndreas.Sandberg@ARM.com        for t in target:
1539520SAndreas.Sandberg@ARM.com            if t in _cpu_classes:
1549520SAndreas.Sandberg@ARM.com                _cpu_aliases[alias] = t
1559520SAndreas.Sandberg@ARM.com                break
1569520SAndreas.Sandberg@ARM.com    elif target in _cpu_classes:
1579520SAndreas.Sandberg@ARM.com        # Normal alias
1589520SAndreas.Sandberg@ARM.com        _cpu_aliases[alias] = target
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