Caches.py revision 9321:7f0464326b2b 
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
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23# neither the name of the copyright holders nor the names of its
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25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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38#
39# Authors: Lisa Hsu
40
41from m5.objects import *
42
43# Base implementations of L1, L2, IO and TLB-walker caches. There are
44# used in the regressions and also as base components in the
45# system-configuration scripts. The values are meant to serve as a
46# starting point, and specific parameters can be overridden in the
47# specific instantiations.
48
49class L1Cache(BaseCache):
50    assoc = 2
51    hit_latency = 2
52    response_latency = 2
53    block_size = 64
54    mshrs = 4
55    tgts_per_mshr = 20
56    is_top_level = True
57
58class L2Cache(BaseCache):
59    assoc = 8
60    block_size = 64
61    hit_latency = 20
62    response_latency = 20
63    mshrs = 20
64    tgts_per_mshr = 12
65    write_buffers = 8
66
67class IOCache(BaseCache):
68    assoc = 8
69    block_size = 64
70    hit_latency = 50
71    response_latency = 50
72    mshrs = 20
73    size = '1kB'
74    tgts_per_mshr = 12
75    forward_snoops = False
76    is_top_level = True
77
78class PageTableWalkerCache(BaseCache):
79    assoc = 2
80    block_size = 64
81    hit_latency = 2
82    response_latency = 2
83    mshrs = 10
84    size = '1kB'
85    tgts_per_mshr = 12
86    is_top_level = True
87