tracechild.cc revision 8113:5c7c804e0645 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006-2009 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 *          Gabe Black
42 */
43
44#include <iostream>
45#include <errno.h>
46#include <stdint.h>
47#include <cstring>
48#include <cstdio>
49
50#include "arch/arm/tracechild.hh"
51
52using namespace std;
53
54ARMTraceChild::ARMTraceChild()
55{
56    foundMvn = false;
57
58    for (int x = 0; x < numregs; x++) {
59        memset(&regs, 0, sizeof(regs));
60        memset(&oldregs, 0, sizeof(regs));
61        regDiffSinceUpdate[x] = false;
62    }
63}
64
65bool
66ARMTraceChild::sendState(int socket)
67{
68    uint32_t regVal = 0;
69    uint32_t message[numregs + 1];
70    int pos = 1;
71    message[0] = 0;
72    for (int x = 0; x < numregs; x++) {
73        if (regDiffSinceUpdate[x]) {
74            message[0] = message[0] | (1 << x);
75            message[pos++] = getRegVal(x);
76        }
77    }
78
79    size_t sent = 0;
80    size_t toSend = pos * sizeof(message[0]);
81    uint8_t *messagePtr = (uint8_t *)message;
82    while (toSend != 0) {
83        sent = write(socket, messagePtr, toSend);
84        if (sent == -1) {
85            cerr << "Write failed! " << strerror(errno) << endl;
86            tracing = false;
87            return false;
88        }
89        toSend -= sent;
90        messagePtr += sent;
91    }
92
93    return true;
94}
95
96uint32_t
97ARMTraceChild::getRegs(user_regs &myregs, int num)
98{
99    assert(num < numregs && num >= 0);
100    return myregs.uregs[num];
101}
102
103bool
104ARMTraceChild::update(int pid)
105{
106    oldregs = regs;
107    if (ptrace(PTRACE_GETREGS, pid, 0, &regs) != 0) {
108        cerr << "update: " << strerror(errno) << endl;
109        return false;
110    }
111
112    for (unsigned int x = 0; x < numregs; x++)
113        regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x));
114    return true;
115}
116
117int64_t
118ARMTraceChild::getRegVal(int num)
119{
120    return getRegs(regs, num);
121}
122
123int64_t
124ARMTraceChild::getOldRegVal(int num)
125{
126    return getRegs(oldregs,  num);
127}
128
129ostream &
130ARMTraceChild::outputStartState(ostream & os)
131{
132    uint32_t sp = getSP();
133    uint32_t pc = getPC();
134    uint32_t highestInfo = 0;
135    char obuf[1024];
136    sprintf(obuf, "Initial stack pointer = 0x%08x\n", sp);
137    os << obuf;
138    sprintf(obuf, "Initial program counter = 0x%08x\n", pc);
139    os << obuf;
140
141    //Output the argument count
142    int32_t cargc = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
143    sprintf(obuf, "0x%08x: Argc = 0x%08x\n", sp, cargc);
144    os << obuf;
145    sp += 4;
146
147    //Output argv pointers
148    int argCount = 0;
149    int32_t cargv;
150    do {
151        cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
152        sprintf(obuf, "0x%08x: argv[%d] = 0x%08x\n",
153                sp, argCount++, cargv);
154        if(cargv)
155            if(highestInfo < cargv)
156                highestInfo = cargv;
157        os << obuf;
158        sp += 4;
159    } while(cargv);
160
161    //Output the envp pointers
162    int envCount = 0;
163    uint32_t cenvp;
164    do {
165        cenvp = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
166        sprintf(obuf, "0x%08x: envp[%d] = 0x%08x\n",
167                sp, envCount++, cenvp);
168        os << obuf;
169        sp += 4;
170    } while(cenvp);
171    uint32_t auxType, auxVal;
172    do {
173        auxType = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
174        sp += 4;
175        auxVal = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
176        sp += 4;
177        sprintf(obuf, "0x%08x: Auxiliary vector = {0x%08x, 0x%08x}\n",
178                sp - 8, auxType, auxVal);
179        os << obuf;
180    } while(auxType != 0 || auxVal != 0);
181    //Print out the argument strings, environment strings, and file name.
182    string current;
183    uint32_t buf;
184    uint32_t currentStart = sp;
185    bool clearedInitialPadding = false;
186    do {
187        buf = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
188        char * cbuf = (char *)&buf;
189        for (int x = 0; x < sizeof(uint32_t); x++) {
190            if (cbuf[x])
191                current += cbuf[x];
192            else {
193                sprintf(obuf, "0x%08x: \"%s\"\n",
194                        currentStart, current.c_str());
195                os << obuf;
196                current = "";
197                currentStart = sp + x + 1;
198            }
199        }
200        sp += 4;
201        clearedInitialPadding = clearedInitialPadding || buf != 0;
202    } while(!clearedInitialPadding || buf != 0 || sp <= highestInfo);
203    return os;
204}
205
206bool
207ARMTraceChild::step()
208{
209    const uint32_t bkpt_inst = 0xe7f001f0;
210
211    uint32_t lr = getRegVal(14);
212    uint32_t pc = getPC();
213    uint32_t lrOp, subsOp;
214    char obuf[128];
215    bool patch = false;
216
217    // Since ARM uses software breakpoints behind the scenes, they don't work
218    // in read only areas like the page of routines provided by the kernel. The
219    // link register generally holds the address the process wants to the
220    // kernel to return to after it's done, so we'll install a software
221    // breakpoint there.
222    //
223    // Calls into the kernel user page always follow the form:
224    //  MVN ...
225    //  <possible MOV lr,...>
226    //  SUB PC, ...
227    //
228    //  So we look for this pattern and set a breakpoint on the LR at the SUB
229    //  instruction.
230
231
232    subsOp = ptrace(PTRACE_PEEKDATA, pid, pc, 0);
233    if ((subsOp & 0xFFFF0FFF) == 0xe3e00a0f)
234        foundMvn = true;
235
236    if (foundMvn && ((subsOp & 0xFFF0F000) == 0xe240f000)) {
237        foundMvn = false;
238        lrOp = ptrace(PTRACE_PEEKDATA, pid, lr, 0);
239        ptrace(PTRACE_POKEDATA, pid, lr, bkpt_inst);
240        patch = true;
241    }
242    ptraceSingleStep();
243
244    if (patch)
245        ptrace(PTRACE_POKEDATA, pid, lr, lrOp);
246}
247
248
249TraceChild *
250genTraceChild()
251{
252    return new ARMTraceChild;
253}
254
255