111077SCurtis.Dunham@arm.com# Add the ARM MISCREG TEEHBR
211077SCurtis.Dunham@arm.comdef upgrader(cpt):
311077SCurtis.Dunham@arm.com    if cpt.get('root','isa') == 'arm':
411077SCurtis.Dunham@arm.com        for sec in cpt.sections():
511077SCurtis.Dunham@arm.com            import re
611077SCurtis.Dunham@arm.com            # Search for all ISA sections
711077SCurtis.Dunham@arm.com            if re.search('.*sys.*\.cpu.*\.isa$', sec):
811077SCurtis.Dunham@arm.com                mr = cpt.get(sec, 'miscRegs').split()
911077SCurtis.Dunham@arm.com                if len(mr) == 161:
1011077SCurtis.Dunham@arm.com                    print "MISCREG_TEEHBR already seems to be inserted."
1111077SCurtis.Dunham@arm.com                else:
1211077SCurtis.Dunham@arm.com                    mr.insert(51,0); # Add dummy value for MISCREG_TEEHBR
1311077SCurtis.Dunham@arm.com                    cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
1411077SCurtis.Dunham@arm.com
1511077SCurtis.Dunham@arm.comlegacy_version = 8
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