arm-gem5-gic-ext.py revision 11257
111257Skarthik.sangaiah@arm.com# Copyright (c) 2015 ARM Limited 211257Skarthik.sangaiah@arm.com# All rights reserved 311257Skarthik.sangaiah@arm.com# 411257Skarthik.sangaiah@arm.com# The license below extends only to copyright in the software and shall 511257Skarthik.sangaiah@arm.com# not be construed as granting a license to any other intellectual 611257Skarthik.sangaiah@arm.com# property including but not limited to intellectual property relating 711257Skarthik.sangaiah@arm.com# to a hardware implementation of the functionality of the software 811257Skarthik.sangaiah@arm.com# licensed hereunder. You may use the software subject to the license 911257Skarthik.sangaiah@arm.com# terms below provided that you ensure that this notice is replicated 1011257Skarthik.sangaiah@arm.com# unmodified and in its entirety in all distributions of the software, 1111257Skarthik.sangaiah@arm.com# modified or unmodified, in source code or in binary form. 1211257Skarthik.sangaiah@arm.com# 1311257Skarthik.sangaiah@arm.com# Redistribution and use in source and binary forms, with or without 1411257Skarthik.sangaiah@arm.com# modification, are permitted provided that the following conditions are 1511257Skarthik.sangaiah@arm.com# met: redistributions of source code must retain the above copyright 1611257Skarthik.sangaiah@arm.com# notice, this list of conditions and the following disclaimer; 1711257Skarthik.sangaiah@arm.com# redistributions in binary form must reproduce the above copyright 1811257Skarthik.sangaiah@arm.com# notice, this list of conditions and the following disclaimer in the 1911257Skarthik.sangaiah@arm.com# documentation and/or other materials provided with the distribution; 2011257Skarthik.sangaiah@arm.com# neither the name of the copyright holders nor the names of its 2111257Skarthik.sangaiah@arm.com# contributors may be used to endorse or promote products derived from 2211257Skarthik.sangaiah@arm.com# this software without specific prior written permission. 2311257Skarthik.sangaiah@arm.com# 2411257Skarthik.sangaiah@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2511257Skarthik.sangaiah@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2611257Skarthik.sangaiah@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2711257Skarthik.sangaiah@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2811257Skarthik.sangaiah@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2911257Skarthik.sangaiah@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3011257Skarthik.sangaiah@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3111257Skarthik.sangaiah@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3211257Skarthik.sangaiah@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3311257Skarthik.sangaiah@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3411257Skarthik.sangaiah@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3511257Skarthik.sangaiah@arm.com# 3611257Skarthik.sangaiah@arm.com# Authors: Andreas Sandberg 3711257Skarthik.sangaiah@arm.com# 3811257Skarthik.sangaiah@arm.com 3911257Skarthik.sangaiah@arm.comdef upgrader(cpt): 4011257Skarthik.sangaiah@arm.com """The gem5 GIC extensions change the size of many GIC data 4111257Skarthik.sangaiah@arm.com structures. Resize them to match the new GIC.""" 4211257Skarthik.sangaiah@arm.com 4311257Skarthik.sangaiah@arm.com import re 4411257Skarthik.sangaiah@arm.com if cpt.get('root','isa') != 'arm': 4511257Skarthik.sangaiah@arm.com return 4611257Skarthik.sangaiah@arm.com 4711257Skarthik.sangaiah@arm.com old_cpu_max = 8 4811257Skarthik.sangaiah@arm.com new_cpu_max = 256 4911257Skarthik.sangaiah@arm.com sgi_max = 16 5011257Skarthik.sangaiah@arm.com ppi_max = 16 5111257Skarthik.sangaiah@arm.com per_cpu_regs = ( 5211257Skarthik.sangaiah@arm.com ("iccrpr", [ "0xff", ]), 5311257Skarthik.sangaiah@arm.com ("cpuEnabled", [ "false", ]), 5411257Skarthik.sangaiah@arm.com ("cpuPriority", [ "0xff", ]), 5511257Skarthik.sangaiah@arm.com ("cpuBpr", [ "0", ]), 5611257Skarthik.sangaiah@arm.com ("cpuHighestInt", [ "1023", ]), 5711257Skarthik.sangaiah@arm.com ("cpuPpiPending", [ "0", ]), 5811257Skarthik.sangaiah@arm.com ("cpuPpiActive", [ "0", ] ), 5911257Skarthik.sangaiah@arm.com ("interrupt_time", [ "0", ]), 6011257Skarthik.sangaiah@arm.com ("*bankedIntPriority", ["0", ] * (sgi_max + ppi_max)), 6111257Skarthik.sangaiah@arm.com ) 6211257Skarthik.sangaiah@arm.com new_per_cpu_regs = ( 6311257Skarthik.sangaiah@arm.com ("cpuSgiPendingExt", "0"), 6411257Skarthik.sangaiah@arm.com ("cpuSgiActiveExt", "0"), 6511257Skarthik.sangaiah@arm.com ) 6611257Skarthik.sangaiah@arm.com 6711257Skarthik.sangaiah@arm.com for sec in cpt.sections(): 6811257Skarthik.sangaiah@arm.com if re.search('.*\.gic$', sec): 6911257Skarthik.sangaiah@arm.com for reg, default in per_cpu_regs: 7011257Skarthik.sangaiah@arm.com value = cpt.get(sec, reg).split(" ") 7111257Skarthik.sangaiah@arm.com assert len(value) / len(default) == old_cpu_max, \ 7211257Skarthik.sangaiah@arm.com "GIC register size mismatch" 7311257Skarthik.sangaiah@arm.com value += [ " ".join(default), ] * (new_cpu_max - old_cpu_max) 7411257Skarthik.sangaiah@arm.com cpt.set(sec, reg, " ".join(value)) 7511257Skarthik.sangaiah@arm.com 7611257Skarthik.sangaiah@arm.com for reg, default in new_per_cpu_regs: 7711257Skarthik.sangaiah@arm.com cpt.set(sec, reg, " ".join([ default, ] * new_cpu_max)) 78