111077SCurtis.Dunham@arm.com# Use condition code registers for the ARM architecture. 211077SCurtis.Dunham@arm.com# Previously the integer register file was used for these registers. 311077SCurtis.Dunham@arm.comdef upgrader(cpt): 411077SCurtis.Dunham@arm.com if cpt.get('root','isa') == 'arm': 511077SCurtis.Dunham@arm.com for sec in cpt.sections(): 611077SCurtis.Dunham@arm.com import re 711077SCurtis.Dunham@arm.com 811077SCurtis.Dunham@arm.com re_cpu_match = re.match('^(.*sys.*\.cpu[^.]*)\.xc\.(.+)$', sec) 911077SCurtis.Dunham@arm.com # Search for all the execution contexts 1011077SCurtis.Dunham@arm.com if not re_cpu_match: 1111077SCurtis.Dunham@arm.com continue 1211077SCurtis.Dunham@arm.com 1311077SCurtis.Dunham@arm.com items = [] 1411077SCurtis.Dunham@arm.com for (item,value) in cpt.items(sec): 1511077SCurtis.Dunham@arm.com items.append(item) 1611077SCurtis.Dunham@arm.com if 'ccRegs' not in items: 1711077SCurtis.Dunham@arm.com intRegs = cpt.get(sec, 'intRegs').split() 1811077SCurtis.Dunham@arm.com 1911077SCurtis.Dunham@arm.com # Move those 5 integer registers to the ccRegs register file 2011077SCurtis.Dunham@arm.com ccRegs = intRegs[38:43] 2111077SCurtis.Dunham@arm.com del intRegs[38:43] 2211077SCurtis.Dunham@arm.com 2311077SCurtis.Dunham@arm.com ccRegs.append('0') # CCREG_ZERO 2411077SCurtis.Dunham@arm.com 2511077SCurtis.Dunham@arm.com cpt.set(sec, 'intRegs', ' '.join(intRegs)) 2611077SCurtis.Dunham@arm.com cpt.set(sec, 'ccRegs', ' '.join(ccRegs)) 2711077SCurtis.Dunham@arm.com 2811077SCurtis.Dunham@arm.comlegacy_version = 13 29