config.ini revision 11312
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.clk_domain] 42type=SrcClockDomain 43clock=1000 44domain_id=-1 45eventq_index=0 46init_perf_level=0 47voltage_domain=system.voltage_domain 48 49[system.cpu] 50type=TimingSimpleCPU 51children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 52branchPred=Null 53checker=Null 54clk_domain=system.cpu_clk_domain 55cpu_id=0 56do_checkpoint_insts=true 57do_quiesce=true 58do_statistics_insts=true 59dtb=system.cpu.dtb 60eventq_index=0 61function_trace=false 62function_trace_start=0 63interrupts=system.cpu.interrupts 64isa=system.cpu.isa 65itb=system.cpu.itb 66max_insts_all_threads=0 67max_insts_any_thread=0 68max_loads_all_threads=0 69max_loads_any_thread=0 70numThreads=1 71profile=0 72progress_interval=0 73simpoint_start_insts= 74socket_id=0 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78workload=system.cpu.workload 79dcache_port=system.cpu.dcache.cpu_side 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] 83type=Cache 84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain 88clusivity=mostly_incl 89demand_mshr_reserve=1 90eventq_index=0 91forward_snoops=true 92hit_latency=2 93is_read_only=false 94max_miss_count=0 95mshrs=4 96prefetch_on_access=false 97prefetcher=Null 98response_latency=2 99sequential_access=false 100size=262144 101system=system 102tags=system.cpu.dcache.tags 103tgts_per_mshr=20 104write_buffers=8 105writeback_clean=false 106cpu_side=system.cpu.dcache_port 107mem_side=system.cpu.toL2Bus.slave[1] 108 109[system.cpu.dcache.tags] 110type=LRU 111assoc=2 112block_size=64 113clk_domain=system.cpu_clk_domain 114eventq_index=0 115hit_latency=2 116sequential_access=false 117size=262144 118 119[system.cpu.dtb] 120type=SparcTLB 121eventq_index=0 122size=64 123 124[system.cpu.icache] 125type=Cache 126children=tags 127addr_ranges=0:18446744073709551615 128assoc=2 129clk_domain=system.cpu_clk_domain 130clusivity=mostly_incl 131demand_mshr_reserve=1 132eventq_index=0 133forward_snoops=true 134hit_latency=2 135is_read_only=true 136max_miss_count=0 137mshrs=4 138prefetch_on_access=false 139prefetcher=Null 140response_latency=2 141sequential_access=false 142size=131072 143system=system 144tags=system.cpu.icache.tags 145tgts_per_mshr=20 146write_buffers=8 147writeback_clean=true 148cpu_side=system.cpu.icache_port 149mem_side=system.cpu.toL2Bus.slave[0] 150 151[system.cpu.icache.tags] 152type=LRU 153assoc=2 154block_size=64 155clk_domain=system.cpu_clk_domain 156eventq_index=0 157hit_latency=2 158sequential_access=false 159size=131072 160 161[system.cpu.interrupts] 162type=SparcInterrupts 163eventq_index=0 164 165[system.cpu.isa] 166type=SparcISA 167eventq_index=0 168 169[system.cpu.itb] 170type=SparcTLB 171eventq_index=0 172size=64 173 174[system.cpu.l2cache] 175type=Cache 176children=tags 177addr_ranges=0:18446744073709551615 178assoc=8 179clk_domain=system.cpu_clk_domain 180clusivity=mostly_incl 181demand_mshr_reserve=1 182eventq_index=0 183forward_snoops=true 184hit_latency=20 185is_read_only=false 186max_miss_count=0 187mshrs=20 188prefetch_on_access=false 189prefetcher=Null 190response_latency=20 191sequential_access=false 192size=2097152 193system=system 194tags=system.cpu.l2cache.tags 195tgts_per_mshr=12 196write_buffers=8 197writeback_clean=false 198cpu_side=system.cpu.toL2Bus.master[0] 199mem_side=system.membus.slave[1] 200 201[system.cpu.l2cache.tags] 202type=LRU 203assoc=8 204block_size=64 205clk_domain=system.cpu_clk_domain 206eventq_index=0 207hit_latency=20 208sequential_access=false 209size=2097152 210 211[system.cpu.toL2Bus] 212type=CoherentXBar 213children=snoop_filter 214clk_domain=system.cpu_clk_domain 215eventq_index=0 216forward_latency=0 217frontend_latency=1 218response_latency=1 219snoop_filter=system.cpu.toL2Bus.snoop_filter 220snoop_response_latency=1 221system=system 222use_default_range=false 223width=32 224master=system.cpu.l2cache.cpu_side 225slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 226 227[system.cpu.toL2Bus.snoop_filter] 228type=SnoopFilter 229eventq_index=0 230lookup_latency=0 231max_capacity=8388608 232system=system 233 234[system.cpu.tracer] 235type=ExeTracer 236eventq_index=0 237 238[system.cpu.workload] 239type=LiveProcess 240cmd=twolf smred 241cwd=build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing 242drivers= 243egid=100 244env= 245errout=cerr 246euid=100 247eventq_index=0 248executable=/dist/m5/cpu2000/binaries/sparc/linux/twolf 249gid=100 250input=cin 251kvmInSE=false 252max_stack_size=67108864 253output=cout 254pid=100 255ppid=99 256simpoint=0 257system=system 258uid=100 259useArchPT=false 260 261[system.cpu_clk_domain] 262type=SrcClockDomain 263clock=500 264domain_id=-1 265eventq_index=0 266init_perf_level=0 267voltage_domain=system.voltage_domain 268 269[system.dvfs_handler] 270type=DVFSHandler 271domains= 272enable=false 273eventq_index=0 274sys_clk_domain=system.clk_domain 275transition_latency=100000000 276 277[system.membus] 278type=CoherentXBar 279clk_domain=system.clk_domain 280eventq_index=0 281forward_latency=4 282frontend_latency=3 283response_latency=2 284snoop_filter=Null 285snoop_response_latency=4 286system=system 287use_default_range=false 288width=16 289master=system.physmem.port 290slave=system.system_port system.cpu.l2cache.mem_side 291 292[system.physmem] 293type=SimpleMemory 294bandwidth=73.000000 295clk_domain=system.clk_domain 296conf_table_reported=true 297eventq_index=0 298in_addr_map=true 299latency=30000 300latency_var=0 301null=false 302range=0:134217727 303port=system.membus.master[0] 304 305[system.voltage_domain] 306type=VoltageDomain 307eventq_index=0 308voltage=1.000000 309 310