config.ini revision 6024
12810Srdreslin@umich.edu[root] 29529Sandreas.hansson@arm.comtype=Root 38702Sandreas.hansson@arm.comchildren=system 48702Sandreas.hansson@arm.comdummy=0 58702Sandreas.hansson@arm.com 68702Sandreas.hansson@arm.com[system] 78702Sandreas.hansson@arm.comtype=System 88702Sandreas.hansson@arm.comchildren=cpu membus physmem 98702Sandreas.hansson@arm.commem_mode=atomic 108702Sandreas.hansson@arm.comphysmem=system.physmem 118702Sandreas.hansson@arm.com 128702Sandreas.hansson@arm.com[system.cpu] 138702Sandreas.hansson@arm.comtype=AtomicSimpleCPU 142810Srdreslin@umich.educhildren=dtb itb tracer workload 152810Srdreslin@umich.educhecker=Null 162810Srdreslin@umich.educlock=500 172810Srdreslin@umich.educpu_id=0 182810Srdreslin@umich.edudefer_registration=false 192810Srdreslin@umich.edudo_checkpoint_insts=true 202810Srdreslin@umich.edudo_statistics_insts=true 212810Srdreslin@umich.edudtb=system.cpu.dtb 222810Srdreslin@umich.edufunction_trace=false 232810Srdreslin@umich.edufunction_trace_start=0 242810Srdreslin@umich.eduitb=system.cpu.itb 252810Srdreslin@umich.edumax_insts_all_threads=0 262810Srdreslin@umich.edumax_insts_any_thread=0 272810Srdreslin@umich.edumax_loads_all_threads=0 282810Srdreslin@umich.edumax_loads_any_thread=0 292810Srdreslin@umich.edunumThreads=1 302810Srdreslin@umich.eduphase=0 312810Srdreslin@umich.eduprogress_interval=0 322810Srdreslin@umich.edusimulate_data_stalls=false 332810Srdreslin@umich.edusimulate_inst_stalls=false 342810Srdreslin@umich.edusystem=system 352810Srdreslin@umich.edutracer=system.cpu.tracer 362810Srdreslin@umich.eduwidth=1 372810Srdreslin@umich.eduworkload=system.cpu.workload 382810Srdreslin@umich.edudcache_port=system.membus.port[2] 392810Srdreslin@umich.eduicache_port=system.membus.port[1] 402810Srdreslin@umich.edu 412810Srdreslin@umich.edu[system.cpu.dtb] 422810Srdreslin@umich.edutype=SparcTLB 434458Sstever@eecs.umich.edusize=64 448856Sandreas.hansson@arm.com 452810Srdreslin@umich.edu[system.cpu.itb] 462810Srdreslin@umich.edutype=SparcTLB 472810Srdreslin@umich.edusize=64 482810Srdreslin@umich.edu 492810Srdreslin@umich.edu[system.cpu.tracer] 502810Srdreslin@umich.edutype=ExeTracer 512810Srdreslin@umich.edu 522810Srdreslin@umich.edu[system.cpu.workload] 532810Srdreslin@umich.edutype=LiveProcess 542810Srdreslin@umich.educmd=twolf smred 552810Srdreslin@umich.educwd=build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic 565338Sstever@gmail.comegid=100 575338Sstever@gmail.comenv= 585338Sstever@gmail.comerrout=cerr 594458Sstever@eecs.umich.edueuid=100 604458Sstever@eecs.umich.eduexecutable=/dist/m5/cpu2000/binaries/sparc/linux/twolf 612813Srdreslin@umich.edugid=100 623861Sstever@eecs.umich.eduinput=cin 632810Srdreslin@umich.edumax_stack_size=67108864 642810Srdreslin@umich.eduoutput=cout 652810Srdreslin@umich.edupid=100 662810Srdreslin@umich.eduppid=99 679264Sdjordje.kovacevic@arm.comsimpoint=0 682810Srdreslin@umich.edusystem=system 694672Sstever@eecs.umich.eduuid=100 702810Srdreslin@umich.edu 712810Srdreslin@umich.edu[system.membus] 722810Srdreslin@umich.edutype=Bus 732810Srdreslin@umich.edublock_size=64 742810Srdreslin@umich.edubus_id=0 753860Sstever@eecs.umich.educlock=1000 763860Sstever@eecs.umich.eduheader_cycles=1 772810Srdreslin@umich.eduresponder_set=false 782810Srdreslin@umich.eduwidth=64 799347SAndreas.Sandberg@arm.comport=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port 802810Srdreslin@umich.edu 818856Sandreas.hansson@arm.com[system.physmem] 828856Sandreas.hansson@arm.comtype=PhysicalMemory 838856Sandreas.hansson@arm.comfile= 848856Sandreas.hansson@arm.comlatency=30000 858856Sandreas.hansson@arm.comlatency_var=0 863738Sstever@eecs.umich.edunull=false 878856Sandreas.hansson@arm.comrange=0:134217727 883738Sstever@eecs.umich.eduzero=false 898856Sandreas.hansson@arm.comport=system.membus.port[0] 908856Sandreas.hansson@arm.com 913738Sstever@eecs.umich.edu