config.ini revision 9481
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1000 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=timing 18mem_ranges= 19memories=system.physmem 20num_work_ids=16 21readfile= 22symbolfile= 23work_begin_ckpt_count=0 24work_begin_cpu_id_exit=-1 25work_begin_exit_count=0 26work_cpus_ckpt_count=0 27work_end_ckpt_count=0 28work_end_exit_count=0 29work_item_id=-1 30system_port=system.membus.slave[0] 31 32[system.cpu] 33type=TimingSimpleCPU 34children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 35branchPred=Null 36checker=Null 37clock=500 38cpu_id=0 39do_checkpoint_insts=true 40do_quiesce=true 41do_statistics_insts=true 42dtb=system.cpu.dtb 43function_trace=false 44function_trace_start=0 45interrupts=system.cpu.interrupts 46isa=system.cpu.isa 47itb=system.cpu.itb 48max_insts_all_threads=0 49max_insts_any_thread=0 50max_loads_all_threads=0 51max_loads_any_thread=0 52numThreads=1 53profile=0 54progress_interval=0 55switched_out=false 56system=system 57tracer=system.cpu.tracer 58workload=system.cpu.workload 59dcache_port=system.cpu.dcache.cpu_side 60icache_port=system.cpu.icache.cpu_side 61 62[system.cpu.dcache] 63type=BaseCache 64addr_ranges=0:18446744073709551615 65assoc=2 66block_size=64 67clock=500 68forward_snoops=true 69hit_latency=2 70is_top_level=true 71max_miss_count=0 72mshrs=4 73prefetch_on_access=false 74prefetcher=Null 75response_latency=2 76size=262144 77system=system 78tgts_per_mshr=20 79two_queue=false 80write_buffers=8 81cpu_side=system.cpu.dcache_port 82mem_side=system.cpu.toL2Bus.slave[1] 83 84[system.cpu.dtb] 85type=ArmTLB 86children=walker 87size=64 88walker=system.cpu.dtb.walker 89 90[system.cpu.dtb.walker] 91type=ArmTableWalker 92clock=500 93num_squash_per_cycle=2 94sys=system 95port=system.cpu.toL2Bus.slave[3] 96 97[system.cpu.icache] 98type=BaseCache 99addr_ranges=0:18446744073709551615 100assoc=2 101block_size=64 102clock=500 103forward_snoops=true 104hit_latency=2 105is_top_level=true 106max_miss_count=0 107mshrs=4 108prefetch_on_access=false 109prefetcher=Null 110response_latency=2 111size=131072 112system=system 113tgts_per_mshr=20 114two_queue=false 115write_buffers=8 116cpu_side=system.cpu.icache_port 117mem_side=system.cpu.toL2Bus.slave[0] 118 119[system.cpu.interrupts] 120type=ArmInterrupts 121 122[system.cpu.isa] 123type=ArmISA 124fpsid=1090793632 125id_isar0=34607377 126id_isar1=34677009 127id_isar2=555950401 128id_isar3=17899825 129id_isar4=268501314 130id_isar5=0 131id_mmfr0=3 132id_mmfr1=0 133id_mmfr2=19070976 134id_mmfr3=4027589137 135id_pfr0=49 136id_pfr1=1 137midr=890224640 138 139[system.cpu.itb] 140type=ArmTLB 141children=walker 142size=64 143walker=system.cpu.itb.walker 144 145[system.cpu.itb.walker] 146type=ArmTableWalker 147clock=500 148num_squash_per_cycle=2 149sys=system 150port=system.cpu.toL2Bus.slave[2] 151 152[system.cpu.l2cache] 153type=BaseCache 154addr_ranges=0:18446744073709551615 155assoc=8 156block_size=64 157clock=500 158forward_snoops=true 159hit_latency=20 160is_top_level=false 161max_miss_count=0 162mshrs=20 163prefetch_on_access=false 164prefetcher=Null 165response_latency=20 166size=2097152 167system=system 168tgts_per_mshr=12 169two_queue=false 170write_buffers=8 171cpu_side=system.cpu.toL2Bus.master[0] 172mem_side=system.membus.slave[1] 173 174[system.cpu.toL2Bus] 175type=CoherentBus 176block_size=64 177clock=500 178header_cycles=1 179use_default_range=false 180width=32 181master=system.cpu.l2cache.cpu_side 182slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 183 184[system.cpu.tracer] 185type=ExeTracer 186 187[system.cpu.workload] 188type=LiveProcess 189cmd=twolf smred 190cwd=build/ARM/tests/opt/long/se/70.twolf/arm/linux/simple-timing 191egid=100 192env= 193errout=cerr 194euid=100 195executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf 196gid=100 197input=cin 198max_stack_size=67108864 199output=cout 200pid=100 201ppid=99 202simpoint=0 203system=system 204uid=100 205 206[system.membus] 207type=CoherentBus 208block_size=64 209clock=1000 210header_cycles=1 211use_default_range=false 212width=8 213master=system.physmem.port 214slave=system.system_port system.cpu.l2cache.mem_side 215 216[system.physmem] 217type=SimpleMemory 218bandwidth=73.000000 219clock=1000 220conf_table_reported=false 221in_addr_map=true 222latency=30000 223latency_var=0 224null=false 225range=0:134217727 226zero=false 227port=system.membus.master[0] 228 229