config.ini revision 7761
1[root] 2type=Root 3children=system 4dummy=0 5 6[system] 7type=System 8children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus 9mem_mode=timing 10physmem=system.physmem 11 12[system.cpu0] 13type=DerivO3CPU 14children=dcache dtb fuPool icache itb tracer workload 15BTBEntries=4096 16BTBTagSize=16 17LFSTSize=1024 18LQEntries=32 19RASSize=16 20SQEntries=32 21SSITSize=1024 22activity=0 23backComSize=5 24cachePorts=200 25checker=Null 26choiceCtrBits=2 27choicePredictorSize=8192 28clock=500 29commitToDecodeDelay=1 30commitToFetchDelay=1 31commitToIEWDelay=1 32commitToRenameDelay=1 33commitWidth=8 34cpu_id=0 35decodeToFetchDelay=1 36decodeToRenameDelay=1 37decodeWidth=8 38defer_registration=false 39dispatchWidth=8 40do_checkpoint_insts=true 41do_statistics_insts=true 42dtb=system.cpu0.dtb 43fetchToDecodeDelay=1 44fetchTrapLatency=1 45fetchWidth=8 46forwardComSize=5 47fuPool=system.cpu0.fuPool 48function_trace=false 49function_trace_start=0 50globalCtrBits=2 51globalHistoryBits=13 52globalPredictorSize=8192 53iewToCommitDelay=1 54iewToDecodeDelay=1 55iewToFetchDelay=1 56iewToRenameDelay=1 57instShiftAmt=2 58issueToExecuteDelay=1 59issueWidth=8 60itb=system.cpu0.itb 61localCtrBits=2 62localHistoryBits=11 63localHistoryTableSize=2048 64localPredictorSize=2048 65max_insts_all_threads=0 66max_insts_any_thread=0 67max_loads_all_threads=0 68max_loads_any_thread=0 69numIQEntries=64 70numPhysFloatRegs=256 71numPhysIntRegs=256 72numROBEntries=192 73numRobs=1 74numThreads=1 75phase=0 76predType=tournament 77progress_interval=0 78renameToDecodeDelay=1 79renameToFetchDelay=1 80renameToIEWDelay=2 81renameToROBDelay=1 82renameWidth=8 83smtCommitPolicy=RoundRobin 84smtFetchPolicy=SingleThread 85smtIQPolicy=Partitioned 86smtIQThreshold=100 87smtLSQPolicy=Partitioned 88smtLSQThreshold=100 89smtNumFetchingThreads=1 90smtROBPolicy=Partitioned 91smtROBThreshold=100 92squashWidth=8 93system=system 94tracer=system.cpu0.tracer 95trapLatency=13 96wbDepth=1 97wbWidth=8 98workload=system.cpu0.workload 99dcache_port=system.cpu0.dcache.cpu_side 100icache_port=system.cpu0.icache.cpu_side 101 102[system.cpu0.dcache] 103type=BaseCache 104addr_range=0:18446744073709551615 105assoc=4 106block_size=64 107forward_snoops=true 108hash_delay=1 109latency=1000 110max_miss_count=0 111mshrs=4 112num_cpus=1 113prefetch_data_accesses_only=false 114prefetch_degree=1 115prefetch_latency=10000 116prefetch_on_access=false 117prefetch_past_page=false 118prefetch_policy=none 119prefetch_serial_squash=false 120prefetch_use_cpu_id=true 121prefetcher_size=100 122prioritizeRequests=false 123repl=Null 124size=32768 125subblock_size=0 126tgts_per_mshr=20 127trace_addr=0 128two_queue=false 129write_buffers=8 130cpu_side=system.cpu0.dcache_port 131mem_side=system.toL2Bus.port[2] 132 133[system.cpu0.dtb] 134type=SparcTLB 135size=64 136 137[system.cpu0.fuPool] 138type=FUPool 139children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 140FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 141 142[system.cpu0.fuPool.FUList0] 143type=FUDesc 144children=opList 145count=6 146opList=system.cpu0.fuPool.FUList0.opList 147 148[system.cpu0.fuPool.FUList0.opList] 149type=OpDesc 150issueLat=1 151opClass=IntAlu 152opLat=1 153 154[system.cpu0.fuPool.FUList1] 155type=FUDesc 156children=opList0 opList1 157count=2 158opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 159 160[system.cpu0.fuPool.FUList1.opList0] 161type=OpDesc 162issueLat=1 163opClass=IntMult 164opLat=3 165 166[system.cpu0.fuPool.FUList1.opList1] 167type=OpDesc 168issueLat=19 169opClass=IntDiv 170opLat=20 171 172[system.cpu0.fuPool.FUList2] 173type=FUDesc 174children=opList0 opList1 opList2 175count=4 176opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 177 178[system.cpu0.fuPool.FUList2.opList0] 179type=OpDesc 180issueLat=1 181opClass=FloatAdd 182opLat=2 183 184[system.cpu0.fuPool.FUList2.opList1] 185type=OpDesc 186issueLat=1 187opClass=FloatCmp 188opLat=2 189 190[system.cpu0.fuPool.FUList2.opList2] 191type=OpDesc 192issueLat=1 193opClass=FloatCvt 194opLat=2 195 196[system.cpu0.fuPool.FUList3] 197type=FUDesc 198children=opList0 opList1 opList2 199count=2 200opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 201 202[system.cpu0.fuPool.FUList3.opList0] 203type=OpDesc 204issueLat=1 205opClass=FloatMult 206opLat=4 207 208[system.cpu0.fuPool.FUList3.opList1] 209type=OpDesc 210issueLat=12 211opClass=FloatDiv 212opLat=12 213 214[system.cpu0.fuPool.FUList3.opList2] 215type=OpDesc 216issueLat=24 217opClass=FloatSqrt 218opLat=24 219 220[system.cpu0.fuPool.FUList4] 221type=FUDesc 222children=opList 223count=0 224opList=system.cpu0.fuPool.FUList4.opList 225 226[system.cpu0.fuPool.FUList4.opList] 227type=OpDesc 228issueLat=1 229opClass=MemRead 230opLat=1 231 232[system.cpu0.fuPool.FUList5] 233type=FUDesc 234children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 235count=4 236opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 237 238[system.cpu0.fuPool.FUList5.opList00] 239type=OpDesc 240issueLat=1 241opClass=SimdAdd 242opLat=1 243 244[system.cpu0.fuPool.FUList5.opList01] 245type=OpDesc 246issueLat=1 247opClass=SimdAddAcc 248opLat=1 249 250[system.cpu0.fuPool.FUList5.opList02] 251type=OpDesc 252issueLat=1 253opClass=SimdAlu 254opLat=1 255 256[system.cpu0.fuPool.FUList5.opList03] 257type=OpDesc 258issueLat=1 259opClass=SimdCmp 260opLat=1 261 262[system.cpu0.fuPool.FUList5.opList04] 263type=OpDesc 264issueLat=1 265opClass=SimdCvt 266opLat=1 267 268[system.cpu0.fuPool.FUList5.opList05] 269type=OpDesc 270issueLat=1 271opClass=SimdMisc 272opLat=1 273 274[system.cpu0.fuPool.FUList5.opList06] 275type=OpDesc 276issueLat=1 277opClass=SimdMult 278opLat=1 279 280[system.cpu0.fuPool.FUList5.opList07] 281type=OpDesc 282issueLat=1 283opClass=SimdMultAcc 284opLat=1 285 286[system.cpu0.fuPool.FUList5.opList08] 287type=OpDesc 288issueLat=1 289opClass=SimdShift 290opLat=1 291 292[system.cpu0.fuPool.FUList5.opList09] 293type=OpDesc 294issueLat=1 295opClass=SimdShiftAcc 296opLat=1 297 298[system.cpu0.fuPool.FUList5.opList10] 299type=OpDesc 300issueLat=1 301opClass=SimdSqrt 302opLat=1 303 304[system.cpu0.fuPool.FUList5.opList11] 305type=OpDesc 306issueLat=1 307opClass=SimdFloatAdd 308opLat=1 309 310[system.cpu0.fuPool.FUList5.opList12] 311type=OpDesc 312issueLat=1 313opClass=SimdFloatAlu 314opLat=1 315 316[system.cpu0.fuPool.FUList5.opList13] 317type=OpDesc 318issueLat=1 319opClass=SimdFloatCmp 320opLat=1 321 322[system.cpu0.fuPool.FUList5.opList14] 323type=OpDesc 324issueLat=1 325opClass=SimdFloatCvt 326opLat=1 327 328[system.cpu0.fuPool.FUList5.opList15] 329type=OpDesc 330issueLat=1 331opClass=SimdFloatDiv 332opLat=1 333 334[system.cpu0.fuPool.FUList5.opList16] 335type=OpDesc 336issueLat=1 337opClass=SimdFloatMisc 338opLat=1 339 340[system.cpu0.fuPool.FUList5.opList17] 341type=OpDesc 342issueLat=1 343opClass=SimdFloatMult 344opLat=1 345 346[system.cpu0.fuPool.FUList5.opList18] 347type=OpDesc 348issueLat=1 349opClass=SimdFloatMultAcc 350opLat=1 351 352[system.cpu0.fuPool.FUList5.opList19] 353type=OpDesc 354issueLat=1 355opClass=SimdFloatSqrt 356opLat=1 357 358[system.cpu0.fuPool.FUList6] 359type=FUDesc 360children=opList 361count=0 362opList=system.cpu0.fuPool.FUList6.opList 363 364[system.cpu0.fuPool.FUList6.opList] 365type=OpDesc 366issueLat=1 367opClass=MemWrite 368opLat=1 369 370[system.cpu0.fuPool.FUList7] 371type=FUDesc 372children=opList0 opList1 373count=4 374opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 375 376[system.cpu0.fuPool.FUList7.opList0] 377type=OpDesc 378issueLat=1 379opClass=MemRead 380opLat=1 381 382[system.cpu0.fuPool.FUList7.opList1] 383type=OpDesc 384issueLat=1 385opClass=MemWrite 386opLat=1 387 388[system.cpu0.fuPool.FUList8] 389type=FUDesc 390children=opList 391count=1 392opList=system.cpu0.fuPool.FUList8.opList 393 394[system.cpu0.fuPool.FUList8.opList] 395type=OpDesc 396issueLat=3 397opClass=IprAccess 398opLat=3 399 400[system.cpu0.icache] 401type=BaseCache 402addr_range=0:18446744073709551615 403assoc=1 404block_size=64 405forward_snoops=true 406hash_delay=1 407latency=1000 408max_miss_count=0 409mshrs=4 410num_cpus=1 411prefetch_data_accesses_only=false 412prefetch_degree=1 413prefetch_latency=10000 414prefetch_on_access=false 415prefetch_past_page=false 416prefetch_policy=none 417prefetch_serial_squash=false 418prefetch_use_cpu_id=true 419prefetcher_size=100 420prioritizeRequests=false 421repl=Null 422size=32768 423subblock_size=0 424tgts_per_mshr=20 425trace_addr=0 426two_queue=false 427write_buffers=8 428cpu_side=system.cpu0.icache_port 429mem_side=system.toL2Bus.port[1] 430 431[system.cpu0.itb] 432type=SparcTLB 433size=64 434 435[system.cpu0.tracer] 436type=ExeTracer 437 438[system.cpu0.workload] 439type=LiveProcess 440cmd=test_atomic 4 441cwd= 442egid=100 443env= 444errout=cerr 445euid=100 446executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic 447gid=100 448input=cin 449max_stack_size=67108864 450output=cout 451pid=100 452ppid=99 453simpoint=0 454system=system 455uid=100 456 457[system.cpu1] 458type=DerivO3CPU 459children=dcache dtb fuPool icache itb tracer 460BTBEntries=4096 461BTBTagSize=16 462LFSTSize=1024 463LQEntries=32 464RASSize=16 465SQEntries=32 466SSITSize=1024 467activity=0 468backComSize=5 469cachePorts=200 470checker=Null 471choiceCtrBits=2 472choicePredictorSize=8192 473clock=500 474commitToDecodeDelay=1 475commitToFetchDelay=1 476commitToIEWDelay=1 477commitToRenameDelay=1 478commitWidth=8 479cpu_id=1 480decodeToFetchDelay=1 481decodeToRenameDelay=1 482decodeWidth=8 483defer_registration=false 484dispatchWidth=8 485do_checkpoint_insts=true 486do_statistics_insts=true 487dtb=system.cpu1.dtb 488fetchToDecodeDelay=1 489fetchTrapLatency=1 490fetchWidth=8 491forwardComSize=5 492fuPool=system.cpu1.fuPool 493function_trace=false 494function_trace_start=0 495globalCtrBits=2 496globalHistoryBits=13 497globalPredictorSize=8192 498iewToCommitDelay=1 499iewToDecodeDelay=1 500iewToFetchDelay=1 501iewToRenameDelay=1 502instShiftAmt=2 503issueToExecuteDelay=1 504issueWidth=8 505itb=system.cpu1.itb 506localCtrBits=2 507localHistoryBits=11 508localHistoryTableSize=2048 509localPredictorSize=2048 510max_insts_all_threads=0 511max_insts_any_thread=0 512max_loads_all_threads=0 513max_loads_any_thread=0 514numIQEntries=64 515numPhysFloatRegs=256 516numPhysIntRegs=256 517numROBEntries=192 518numRobs=1 519numThreads=1 520phase=0 521predType=tournament 522progress_interval=0 523renameToDecodeDelay=1 524renameToFetchDelay=1 525renameToIEWDelay=2 526renameToROBDelay=1 527renameWidth=8 528smtCommitPolicy=RoundRobin 529smtFetchPolicy=SingleThread 530smtIQPolicy=Partitioned 531smtIQThreshold=100 532smtLSQPolicy=Partitioned 533smtLSQThreshold=100 534smtNumFetchingThreads=1 535smtROBPolicy=Partitioned 536smtROBThreshold=100 537squashWidth=8 538system=system 539tracer=system.cpu1.tracer 540trapLatency=13 541wbDepth=1 542wbWidth=8 543workload=system.cpu0.workload 544dcache_port=system.cpu1.dcache.cpu_side 545icache_port=system.cpu1.icache.cpu_side 546 547[system.cpu1.dcache] 548type=BaseCache 549addr_range=0:18446744073709551615 550assoc=4 551block_size=64 552forward_snoops=true 553hash_delay=1 554latency=1000 555max_miss_count=0 556mshrs=4 557num_cpus=1 558prefetch_data_accesses_only=false 559prefetch_degree=1 560prefetch_latency=10000 561prefetch_on_access=false 562prefetch_past_page=false 563prefetch_policy=none 564prefetch_serial_squash=false 565prefetch_use_cpu_id=true 566prefetcher_size=100 567prioritizeRequests=false 568repl=Null 569size=32768 570subblock_size=0 571tgts_per_mshr=20 572trace_addr=0 573two_queue=false 574write_buffers=8 575cpu_side=system.cpu1.dcache_port 576mem_side=system.toL2Bus.port[4] 577 578[system.cpu1.dtb] 579type=SparcTLB 580size=64 581 582[system.cpu1.fuPool] 583type=FUPool 584children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 585FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 586 587[system.cpu1.fuPool.FUList0] 588type=FUDesc 589children=opList 590count=6 591opList=system.cpu1.fuPool.FUList0.opList 592 593[system.cpu1.fuPool.FUList0.opList] 594type=OpDesc 595issueLat=1 596opClass=IntAlu 597opLat=1 598 599[system.cpu1.fuPool.FUList1] 600type=FUDesc 601children=opList0 opList1 602count=2 603opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 604 605[system.cpu1.fuPool.FUList1.opList0] 606type=OpDesc 607issueLat=1 608opClass=IntMult 609opLat=3 610 611[system.cpu1.fuPool.FUList1.opList1] 612type=OpDesc 613issueLat=19 614opClass=IntDiv 615opLat=20 616 617[system.cpu1.fuPool.FUList2] 618type=FUDesc 619children=opList0 opList1 opList2 620count=4 621opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 622 623[system.cpu1.fuPool.FUList2.opList0] 624type=OpDesc 625issueLat=1 626opClass=FloatAdd 627opLat=2 628 629[system.cpu1.fuPool.FUList2.opList1] 630type=OpDesc 631issueLat=1 632opClass=FloatCmp 633opLat=2 634 635[system.cpu1.fuPool.FUList2.opList2] 636type=OpDesc 637issueLat=1 638opClass=FloatCvt 639opLat=2 640 641[system.cpu1.fuPool.FUList3] 642type=FUDesc 643children=opList0 opList1 opList2 644count=2 645opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 646 647[system.cpu1.fuPool.FUList3.opList0] 648type=OpDesc 649issueLat=1 650opClass=FloatMult 651opLat=4 652 653[system.cpu1.fuPool.FUList3.opList1] 654type=OpDesc 655issueLat=12 656opClass=FloatDiv 657opLat=12 658 659[system.cpu1.fuPool.FUList3.opList2] 660type=OpDesc 661issueLat=24 662opClass=FloatSqrt 663opLat=24 664 665[system.cpu1.fuPool.FUList4] 666type=FUDesc 667children=opList 668count=0 669opList=system.cpu1.fuPool.FUList4.opList 670 671[system.cpu1.fuPool.FUList4.opList] 672type=OpDesc 673issueLat=1 674opClass=MemRead 675opLat=1 676 677[system.cpu1.fuPool.FUList5] 678type=FUDesc 679children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 680count=4 681opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 682 683[system.cpu1.fuPool.FUList5.opList00] 684type=OpDesc 685issueLat=1 686opClass=SimdAdd 687opLat=1 688 689[system.cpu1.fuPool.FUList5.opList01] 690type=OpDesc 691issueLat=1 692opClass=SimdAddAcc 693opLat=1 694 695[system.cpu1.fuPool.FUList5.opList02] 696type=OpDesc 697issueLat=1 698opClass=SimdAlu 699opLat=1 700 701[system.cpu1.fuPool.FUList5.opList03] 702type=OpDesc 703issueLat=1 704opClass=SimdCmp 705opLat=1 706 707[system.cpu1.fuPool.FUList5.opList04] 708type=OpDesc 709issueLat=1 710opClass=SimdCvt 711opLat=1 712 713[system.cpu1.fuPool.FUList5.opList05] 714type=OpDesc 715issueLat=1 716opClass=SimdMisc 717opLat=1 718 719[system.cpu1.fuPool.FUList5.opList06] 720type=OpDesc 721issueLat=1 722opClass=SimdMult 723opLat=1 724 725[system.cpu1.fuPool.FUList5.opList07] 726type=OpDesc 727issueLat=1 728opClass=SimdMultAcc 729opLat=1 730 731[system.cpu1.fuPool.FUList5.opList08] 732type=OpDesc 733issueLat=1 734opClass=SimdShift 735opLat=1 736 737[system.cpu1.fuPool.FUList5.opList09] 738type=OpDesc 739issueLat=1 740opClass=SimdShiftAcc 741opLat=1 742 743[system.cpu1.fuPool.FUList5.opList10] 744type=OpDesc 745issueLat=1 746opClass=SimdSqrt 747opLat=1 748 749[system.cpu1.fuPool.FUList5.opList11] 750type=OpDesc 751issueLat=1 752opClass=SimdFloatAdd 753opLat=1 754 755[system.cpu1.fuPool.FUList5.opList12] 756type=OpDesc 757issueLat=1 758opClass=SimdFloatAlu 759opLat=1 760 761[system.cpu1.fuPool.FUList5.opList13] 762type=OpDesc 763issueLat=1 764opClass=SimdFloatCmp 765opLat=1 766 767[system.cpu1.fuPool.FUList5.opList14] 768type=OpDesc 769issueLat=1 770opClass=SimdFloatCvt 771opLat=1 772 773[system.cpu1.fuPool.FUList5.opList15] 774type=OpDesc 775issueLat=1 776opClass=SimdFloatDiv 777opLat=1 778 779[system.cpu1.fuPool.FUList5.opList16] 780type=OpDesc 781issueLat=1 782opClass=SimdFloatMisc 783opLat=1 784 785[system.cpu1.fuPool.FUList5.opList17] 786type=OpDesc 787issueLat=1 788opClass=SimdFloatMult 789opLat=1 790 791[system.cpu1.fuPool.FUList5.opList18] 792type=OpDesc 793issueLat=1 794opClass=SimdFloatMultAcc 795opLat=1 796 797[system.cpu1.fuPool.FUList5.opList19] 798type=OpDesc 799issueLat=1 800opClass=SimdFloatSqrt 801opLat=1 802 803[system.cpu1.fuPool.FUList6] 804type=FUDesc 805children=opList 806count=0 807opList=system.cpu1.fuPool.FUList6.opList 808 809[system.cpu1.fuPool.FUList6.opList] 810type=OpDesc 811issueLat=1 812opClass=MemWrite 813opLat=1 814 815[system.cpu1.fuPool.FUList7] 816type=FUDesc 817children=opList0 opList1 818count=4 819opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 820 821[system.cpu1.fuPool.FUList7.opList0] 822type=OpDesc 823issueLat=1 824opClass=MemRead 825opLat=1 826 827[system.cpu1.fuPool.FUList7.opList1] 828type=OpDesc 829issueLat=1 830opClass=MemWrite 831opLat=1 832 833[system.cpu1.fuPool.FUList8] 834type=FUDesc 835children=opList 836count=1 837opList=system.cpu1.fuPool.FUList8.opList 838 839[system.cpu1.fuPool.FUList8.opList] 840type=OpDesc 841issueLat=3 842opClass=IprAccess 843opLat=3 844 845[system.cpu1.icache] 846type=BaseCache 847addr_range=0:18446744073709551615 848assoc=1 849block_size=64 850forward_snoops=true 851hash_delay=1 852latency=1000 853max_miss_count=0 854mshrs=4 855num_cpus=1 856prefetch_data_accesses_only=false 857prefetch_degree=1 858prefetch_latency=10000 859prefetch_on_access=false 860prefetch_past_page=false 861prefetch_policy=none 862prefetch_serial_squash=false 863prefetch_use_cpu_id=true 864prefetcher_size=100 865prioritizeRequests=false 866repl=Null 867size=32768 868subblock_size=0 869tgts_per_mshr=20 870trace_addr=0 871two_queue=false 872write_buffers=8 873cpu_side=system.cpu1.icache_port 874mem_side=system.toL2Bus.port[3] 875 876[system.cpu1.itb] 877type=SparcTLB 878size=64 879 880[system.cpu1.tracer] 881type=ExeTracer 882 883[system.cpu2] 884type=DerivO3CPU 885children=dcache dtb fuPool icache itb tracer 886BTBEntries=4096 887BTBTagSize=16 888LFSTSize=1024 889LQEntries=32 890RASSize=16 891SQEntries=32 892SSITSize=1024 893activity=0 894backComSize=5 895cachePorts=200 896checker=Null 897choiceCtrBits=2 898choicePredictorSize=8192 899clock=500 900commitToDecodeDelay=1 901commitToFetchDelay=1 902commitToIEWDelay=1 903commitToRenameDelay=1 904commitWidth=8 905cpu_id=2 906decodeToFetchDelay=1 907decodeToRenameDelay=1 908decodeWidth=8 909defer_registration=false 910dispatchWidth=8 911do_checkpoint_insts=true 912do_statistics_insts=true 913dtb=system.cpu2.dtb 914fetchToDecodeDelay=1 915fetchTrapLatency=1 916fetchWidth=8 917forwardComSize=5 918fuPool=system.cpu2.fuPool 919function_trace=false 920function_trace_start=0 921globalCtrBits=2 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1554type=OpDesc 1555issueLat=1 1556opClass=SimdCmp 1557opLat=1 1558 1559[system.cpu3.fuPool.FUList5.opList04] 1560type=OpDesc 1561issueLat=1 1562opClass=SimdCvt 1563opLat=1 1564 1565[system.cpu3.fuPool.FUList5.opList05] 1566type=OpDesc 1567issueLat=1 1568opClass=SimdMisc 1569opLat=1 1570 1571[system.cpu3.fuPool.FUList5.opList06] 1572type=OpDesc 1573issueLat=1 1574opClass=SimdMult 1575opLat=1 1576 1577[system.cpu3.fuPool.FUList5.opList07] 1578type=OpDesc 1579issueLat=1 1580opClass=SimdMultAcc 1581opLat=1 1582 1583[system.cpu3.fuPool.FUList5.opList08] 1584type=OpDesc 1585issueLat=1 1586opClass=SimdShift 1587opLat=1 1588 1589[system.cpu3.fuPool.FUList5.opList09] 1590type=OpDesc 1591issueLat=1 1592opClass=SimdShiftAcc 1593opLat=1 1594 1595[system.cpu3.fuPool.FUList5.opList10] 1596type=OpDesc 1597issueLat=1 1598opClass=SimdSqrt 1599opLat=1 1600 1601[system.cpu3.fuPool.FUList5.opList11] 1602type=OpDesc 1603issueLat=1 1604opClass=SimdFloatAdd 1605opLat=1 1606 1607[system.cpu3.fuPool.FUList5.opList12] 1608type=OpDesc 1609issueLat=1 1610opClass=SimdFloatAlu 1611opLat=1 1612 1613[system.cpu3.fuPool.FUList5.opList13] 1614type=OpDesc 1615issueLat=1 1616opClass=SimdFloatCmp 1617opLat=1 1618 1619[system.cpu3.fuPool.FUList5.opList14] 1620type=OpDesc 1621issueLat=1 1622opClass=SimdFloatCvt 1623opLat=1 1624 1625[system.cpu3.fuPool.FUList5.opList15] 1626type=OpDesc 1627issueLat=1 1628opClass=SimdFloatDiv 1629opLat=1 1630 1631[system.cpu3.fuPool.FUList5.opList16] 1632type=OpDesc 1633issueLat=1 1634opClass=SimdFloatMisc 1635opLat=1 1636 1637[system.cpu3.fuPool.FUList5.opList17] 1638type=OpDesc 1639issueLat=1 1640opClass=SimdFloatMult 1641opLat=1 1642 1643[system.cpu3.fuPool.FUList5.opList18] 1644type=OpDesc 1645issueLat=1 1646opClass=SimdFloatMultAcc 1647opLat=1 1648 1649[system.cpu3.fuPool.FUList5.opList19] 1650type=OpDesc 1651issueLat=1 1652opClass=SimdFloatSqrt 1653opLat=1 1654 1655[system.cpu3.fuPool.FUList6] 1656type=FUDesc 1657children=opList 1658count=0 1659opList=system.cpu3.fuPool.FUList6.opList 1660 1661[system.cpu3.fuPool.FUList6.opList] 1662type=OpDesc 1663issueLat=1 1664opClass=MemWrite 1665opLat=1 1666 1667[system.cpu3.fuPool.FUList7] 1668type=FUDesc 1669children=opList0 opList1 1670count=4 1671opList=system.cpu3.fuPool.FUList7.opList0 system.cpu3.fuPool.FUList7.opList1 1672 1673[system.cpu3.fuPool.FUList7.opList0] 1674type=OpDesc 1675issueLat=1 1676opClass=MemRead 1677opLat=1 1678 1679[system.cpu3.fuPool.FUList7.opList1] 1680type=OpDesc 1681issueLat=1 1682opClass=MemWrite 1683opLat=1 1684 1685[system.cpu3.fuPool.FUList8] 1686type=FUDesc 1687children=opList 1688count=1 1689opList=system.cpu3.fuPool.FUList8.opList 1690 1691[system.cpu3.fuPool.FUList8.opList] 1692type=OpDesc 1693issueLat=3 1694opClass=IprAccess 1695opLat=3 1696 1697[system.cpu3.icache] 1698type=BaseCache 1699addr_range=0:18446744073709551615 1700assoc=1 1701block_size=64 1702forward_snoops=true 1703hash_delay=1 1704latency=1000 1705max_miss_count=0 1706mshrs=4 1707num_cpus=1 1708prefetch_data_accesses_only=false 1709prefetch_degree=1 1710prefetch_latency=10000 1711prefetch_on_access=false 1712prefetch_past_page=false 1713prefetch_policy=none 1714prefetch_serial_squash=false 1715prefetch_use_cpu_id=true 1716prefetcher_size=100 1717prioritizeRequests=false 1718repl=Null 1719size=32768 1720subblock_size=0 1721tgts_per_mshr=20 1722trace_addr=0 1723two_queue=false 1724write_buffers=8 1725cpu_side=system.cpu3.icache_port 1726mem_side=system.toL2Bus.port[7] 1727 1728[system.cpu3.itb] 1729type=SparcTLB 1730size=64 1731 1732[system.cpu3.tracer] 1733type=ExeTracer 1734 1735[system.l2c] 1736type=BaseCache 1737addr_range=0:18446744073709551615 1738assoc=8 1739block_size=64 1740forward_snoops=true 1741hash_delay=1 1742latency=10000 1743max_miss_count=0 1744mshrs=92 1745num_cpus=4 1746prefetch_data_accesses_only=false 1747prefetch_degree=1 1748prefetch_latency=100000 1749prefetch_on_access=false 1750prefetch_past_page=false 1751prefetch_policy=none 1752prefetch_serial_squash=false 1753prefetch_use_cpu_id=true 1754prefetcher_size=100 1755prioritizeRequests=false 1756repl=Null 1757size=4194304 1758subblock_size=0 1759tgts_per_mshr=16 1760trace_addr=0 1761two_queue=false 1762write_buffers=8 1763cpu_side=system.toL2Bus.port[0] 1764mem_side=system.membus.port[0] 1765 1766[system.membus] 1767type=Bus 1768block_size=64 1769bus_id=0 1770clock=1000 1771header_cycles=1 1772use_default_range=false 1773width=64 1774port=system.l2c.mem_side system.physmem.port[0] 1775 1776[system.physmem] 1777type=PhysicalMemory 1778file= 1779latency=30000 1780latency_var=0 1781null=false 1782range=0:134217727 1783zero=false 1784port=system.membus.port[1] 1785 1786[system.toL2Bus] 1787type=Bus 1788block_size=64 1789bus_id=0 1790clock=1000 1791header_cycles=1 1792use_default_range=false 1793width=64 1794port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side 1795 1796