config.ini revision 9988
17513SN/A[root] 27513SN/Atype=Root 37513SN/Achildren=system 410036SN/Aeventq_index=0 58835SN/Afull_system=false 610036SN/Asim_quantum=0 77935SN/Atime_sync_enable=false 87935SN/Atime_sync_period=100000000000 97935SN/Atime_sync_spin_threshold=100000000 107513SN/A 117513SN/A[system] 127513SN/Atype=System 1310315SN/Achildren=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain l2c membus physmem toL2Bus voltage_domain 148835SN/Aboot_osflags=a 159885SN/Acache_line_size=64 169885SN/Aclk_domain=system.clk_domain 1711570SCurtis.Dunham@arm.comeventq_index=0 1810036SN/Ainit_param=0 1911312Santhony.gutierrez@amd.comkernel= 208835SN/Aload_addr_mask=1099511627775 218835SN/Amem_mode=timing 2210315SN/Amem_ranges= 238835SN/Amemories=system.physmem 2410038SN/Anum_work_ids=16 259481SN/Areadfile= 269481SN/Asymbolfile= 278721SN/Awork_begin_ckpt_count=0 2811066Snilay@cs.wisc.eduwork_begin_cpu_id_exit=-1 2911219Snilay@cs.wisc.eduwork_begin_exit_count=0 308721SN/Awork_cpus_ckpt_count=0 3111570SCurtis.Dunham@arm.comwork_end_ckpt_count=0 3211570SCurtis.Dunham@arm.comwork_end_exit_count=0 3311570SCurtis.Dunham@arm.comwork_item_id=-1 3411570SCurtis.Dunham@arm.comsystem_port=system.membus.slave[0] 358835SN/A 368835SN/A[system.clk_domain] 3711440SCurtis.Dunham@arm.comtype=SrcClockDomain 3811440SCurtis.Dunham@arm.comclock=1000 397935SN/Aeventq_index=0 407935SN/Avoltage_domain=system.voltage_domain 417935SN/A 427935SN/A[system.cpu0] 437935SN/Atype=DerivO3CPU 447935SN/Achildren=branchPred dcache dtb fuPool icache interrupts isa itb tracer workload 457935SN/ALFSTSize=1024 468893SN/ALQEntries=32 477513SN/ALSQCheckLoads=true 489885SN/ALSQDepCheckShift=4 499885SN/ASQEntries=32 509885SN/ASSITSize=1024 5110315SN/Aactivity=0 5210036SN/AbackComSize=5 5310315SN/AbranchPred=system.cpu0.branchPred 549885SN/AcachePorts=200 559885SN/Achecker=Null 567513SN/Aclk_domain=system.cpu_clk_domain 577513SN/AcommitToDecodeDelay=1 5810038SN/AcommitToFetchDelay=1 5910315SN/AcommitToIEWDelay=1 607513SN/AcommitToRenameDelay=1 619885SN/AcommitWidth=8 627513SN/Acpu_id=0 6311570SCurtis.Dunham@arm.comdecodeToFetchDelay=1 647513SN/AdecodeToRenameDelay=1 658835SN/AdecodeWidth=8 667513SN/AdispatchWidth=8 6710038SN/Ado_checkpoint_insts=true 687513SN/Ado_quiesce=true 6910036SN/Ado_statistics_insts=true 707513SN/Adtb=system.cpu0.dtb 717513SN/Aeventq_index=0 728835SN/AfetchBufferSize=64 739481SN/AfetchToDecodeDelay=1 7410038SN/AfetchTrapLatency=1 757513SN/AfetchWidth=8 767513SN/AforwardComSize=5 777513SN/AfuPool=system.cpu0.fuPool 787513SN/Afunction_trace=false 797513SN/Afunction_trace_start=0 807513SN/AiewToCommitDelay=1 8111570SCurtis.Dunham@arm.comiewToDecodeDelay=1 8211570SCurtis.Dunham@arm.comiewToFetchDelay=1 8311570SCurtis.Dunham@arm.comiewToRenameDelay=1 8411570SCurtis.Dunham@arm.cominterrupts=system.cpu0.interrupts 858835SN/Aisa=system.cpu0.isa 867513SN/AissueToExecuteDelay=1 879885SN/AissueWidth=8 8810315SN/Aitb=system.cpu0.itb 899481SN/Amax_insts_all_threads=0 907513SN/Amax_insts_any_thread=0 917513SN/Amax_loads_all_threads=0 927513SN/Amax_loads_any_thread=0 937513SN/AneedsTSO=false 947513SN/AnumIQEntries=64 957513SN/AnumPhysCCRegs=0 967513SN/AnumPhysFloatRegs=256 9711066Snilay@cs.wisc.edunumPhysIntRegs=256 989885SN/AnumROBEntries=192 998893SN/AnumRobs=1 1007513SN/AnumThreads=1 1019885SN/Aprofile=0 10211219Snilay@cs.wisc.eduprogress_interval=0 10311570SCurtis.Dunham@arm.comrenameToDecodeDelay=1 10411066Snilay@cs.wisc.edurenameToFetchDelay=1 10510036SN/ArenameToIEWDelay=2 1069481SN/ArenameToROBDelay=1 10711066Snilay@cs.wisc.edurenameWidth=8 1087513SN/Asimpoint_start_insts= 1099481SN/AsmtCommitPolicy=RoundRobin 11011570SCurtis.Dunham@arm.comsmtFetchPolicy=SingleThread 11111570SCurtis.Dunham@arm.comsmtIQPolicy=Partitioned 11211570SCurtis.Dunham@arm.comsmtIQThreshold=100 11311570SCurtis.Dunham@arm.comsmtLSQPolicy=Partitioned 1147513SN/AsmtLSQThreshold=100 1158835SN/AsmtNumFetchingThreads=1 1169481SN/AsmtROBPolicy=Partitioned 11710036SN/AsmtROBThreshold=100 1187513SN/AsquashWidth=8 1198835SN/Astore_set_clear_period=250000 1209885SN/Aswitched_out=false 1219481SN/Asystem=system 1227513SN/Atracer=system.cpu0.tracer 12311219Snilay@cs.wisc.edutrapLatency=13 1247513SN/AwbDepth=1 1258893SN/AwbWidth=8 1267513SN/Aworkload=system.cpu0.workload 1279885SN/Adcache_port=system.cpu0.dcache.cpu_side 1289885SN/Aicache_port=system.cpu0.icache.cpu_side 1299885SN/A 1309885SN/A[system.cpu0.branchPred] 1319885SN/Atype=BranchPredictor 13211570SCurtis.Dunham@arm.comBTBEntries=4096 13310036SN/ABTBTagSize=16 1349885SN/ARASSize=16 13511570SCurtis.Dunham@arm.comchoiceCtrBits=2 13611570SCurtis.Dunham@arm.comchoicePredictorSize=8192 13711570SCurtis.Dunham@arm.comeventq_index=0 13811570SCurtis.Dunham@arm.comglobalCtrBits=2 13910036SN/AglobalPredictorSize=8192 1409885SN/AinstShiftAmt=2 1419885SN/AlocalCtrBits=2 14210038SN/AlocalHistoryTableSize=2048 14310038SN/AlocalPredictorSize=2048 14410038SN/AnumThreads=1 14510038SN/ApredType=tournament 14610038SN/A 14711066Snilay@cs.wisc.edu[system.cpu0.dcache] 14810038SN/Atype=BaseCache 14910038SN/Achildren=tags 15010038SN/Aaddr_ranges=0:18446744073709551615 15110038SN/Aassoc=4 15210038SN/Aclk_domain=system.cpu_clk_domain 15310038SN/Aeventq_index=0 15410038SN/Aforward_snoops=true 15510038SN/Ahit_latency=2 15610038SN/Ais_top_level=true 15710038SN/Amax_miss_count=0 15810038SN/Amshrs=4 15910038SN/Aprefetch_on_access=false 16010038SN/Aprefetcher=Null 16111570SCurtis.Dunham@arm.comresponse_latency=2 16210038SN/Asize=32768 16310038SN/Asystem=system 16410038SN/Atags=system.cpu0.dcache.tags 16511570SCurtis.Dunham@arm.comtgts_per_mshr=20 16611570SCurtis.Dunham@arm.comtwo_queue=false 16711570SCurtis.Dunham@arm.comwrite_buffers=8 16811570SCurtis.Dunham@arm.comcpu_side=system.cpu0.dcache_port 16910038SN/Amem_side=system.toL2Bus.slave[1] 17010038SN/A 1717513SN/A[system.cpu0.dcache.tags] 1727513SN/Atype=LRU 1738835SN/Aassoc=4 17410036SN/Ablock_size=64 17510038SN/Aclk_domain=system.cpu_clk_domain 1767513SN/Aeventq_index=0 1778835SN/Ahit_latency=2 1788835SN/Asize=32768 1798835SN/A 1808835SN/A[system.cpu0.dtb] 1819885SN/Atype=SparcTLB 18211570SCurtis.Dunham@arm.comeventq_index=0 18310036SN/Asize=64 18410038SN/A 1859265SN/A[system.cpu0.fuPool] 18611570SCurtis.Dunham@arm.comtype=FUPool 18711570SCurtis.Dunham@arm.comchildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 18811570SCurtis.Dunham@arm.comFUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 18911570SCurtis.Dunham@arm.comeventq_index=0 1908835SN/A 1918893SN/A[system.cpu0.fuPool.FUList0] 1927513SN/Atype=FUDesc 1937513SN/Achildren=opList 19411066Snilay@cs.wisc.educount=6 1959885SN/Aeventq_index=0 1968893SN/AopList=system.cpu0.fuPool.FUList0.opList 1977513SN/A 1989885SN/A[system.cpu0.fuPool.FUList0.opList] 19911219Snilay@cs.wisc.edutype=OpDesc 20011570SCurtis.Dunham@arm.comeventq_index=0 20111066Snilay@cs.wisc.eduissueLat=1 20210036SN/AopClass=IntAlu 2039481SN/AopLat=1 20411066Snilay@cs.wisc.edu 2057513SN/A[system.cpu0.fuPool.FUList1] 2069481SN/Atype=FUDesc 20711570SCurtis.Dunham@arm.comchildren=opList0 opList1 20811570SCurtis.Dunham@arm.comcount=2 20911570SCurtis.Dunham@arm.comeventq_index=0 21011570SCurtis.Dunham@arm.comopList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 2117513SN/A 2128835SN/A[system.cpu0.fuPool.FUList1.opList0] 2139481SN/Atype=OpDesc 21410036SN/Aeventq_index=0 2157513SN/AissueLat=1 2168835SN/AopClass=IntMult 2179885SN/AopLat=3 2189481SN/A 2197513SN/A[system.cpu0.fuPool.FUList1.opList1] 22011219Snilay@cs.wisc.edutype=OpDesc 2217513SN/Aeventq_index=0 2228893SN/AissueLat=19 2237513SN/AopClass=IntDiv 2249885SN/AopLat=20 2259885SN/A 2269885SN/A[system.cpu0.fuPool.FUList2] 2279885SN/Atype=FUDesc 2289885SN/Achildren=opList0 opList1 opList2 22911570SCurtis.Dunham@arm.comcount=4 23010036SN/Aeventq_index=0 2319885SN/AopList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 23211570SCurtis.Dunham@arm.com 23311570SCurtis.Dunham@arm.com[system.cpu0.fuPool.FUList2.opList0] 23411570SCurtis.Dunham@arm.comtype=OpDesc 23511570SCurtis.Dunham@arm.comeventq_index=0 23610036SN/AissueLat=1 2379885SN/AopClass=FloatAdd 2389885SN/AopLat=2 2398835SN/A 2408835SN/A[system.cpu0.fuPool.FUList2.opList1] 24110036SN/Atype=OpDesc 2428835SN/Aeventq_index=0 2439481SN/AissueLat=1 2449481SN/AopClass=FloatCmp 24511219Snilay@cs.wisc.eduopLat=2 24610036SN/A 2479481SN/A[system.cpu0.fuPool.FUList2.opList2] 24810038SN/Atype=OpDesc 24910038SN/Aeventq_index=0 25010038SN/AissueLat=1 25110038SN/AopClass=FloatCvt 25210038SN/AopLat=2 25310038SN/A 25410038SN/A[system.cpu0.fuPool.FUList3] 25510038SN/Atype=FUDesc 25610038SN/Achildren=opList0 opList1 opList2 25710038SN/Acount=2 2589481SN/Aeventq_index=0 2599481SN/AopList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 2609481SN/A 2619481SN/A[system.cpu0.fuPool.FUList3.opList0] 2629481SN/Atype=OpDesc 2639481SN/Aeventq_index=0 26410038SN/AissueLat=1 2659481SN/AopClass=FloatMult 2669481SN/AopLat=4 26710038SN/A 2689481SN/A[system.cpu0.fuPool.FUList3.opList1] 26910038SN/Atype=OpDesc 27010038SN/Aeventq_index=0 27111066Snilay@cs.wisc.eduissueLat=12 27210038SN/AopClass=FloatDiv 27310038SN/AopLat=12 27410038SN/A 27510038SN/A[system.cpu0.fuPool.FUList3.opList2] 27610038SN/Atype=OpDesc 27710038SN/Aeventq_index=0 27810038SN/AissueLat=24 27911066Snilay@cs.wisc.eduopClass=FloatSqrt 28010038SN/AopLat=24 28110038SN/A 28210038SN/A[system.cpu0.fuPool.FUList4] 28310038SN/Atype=FUDesc 28410038SN/Achildren=opList 28510038SN/Acount=0 28610038SN/Aeventq_index=0 28710038SN/AopList=system.cpu0.fuPool.FUList4.opList 28810038SN/A 28910038SN/A[system.cpu0.fuPool.FUList4.opList] 29010038SN/Atype=OpDesc 29110038SN/Aeventq_index=0 29210038SN/AissueLat=1 29311570SCurtis.Dunham@arm.comopClass=MemRead 29410038SN/AopLat=1 29510038SN/A 29610038SN/A[system.cpu0.fuPool.FUList5] 29711570SCurtis.Dunham@arm.comtype=FUDesc 29811570SCurtis.Dunham@arm.comchildren=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 29911570SCurtis.Dunham@arm.comcount=4 30011570SCurtis.Dunham@arm.comeventq_index=0 30110038SN/AopList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 3029481SN/A 3037513SN/A[system.cpu0.fuPool.FUList5.opList00] 3047513SN/Atype=OpDesc 3058835SN/Aeventq_index=0 30610036SN/AissueLat=1 30710038SN/AopClass=SimdAdd 3087513SN/AopLat=1 3098835SN/A 3108835SN/A[system.cpu0.fuPool.FUList5.opList01] 3118835SN/Atype=OpDesc 3128835SN/Aeventq_index=0 3139885SN/AissueLat=1 31411570SCurtis.Dunham@arm.comopClass=SimdAddAcc 31510036SN/AopLat=1 31610038SN/A 3179265SN/A[system.cpu0.fuPool.FUList5.opList02] 31811570SCurtis.Dunham@arm.comtype=OpDesc 31911570SCurtis.Dunham@arm.comeventq_index=0 32011570SCurtis.Dunham@arm.comissueLat=1 32111570SCurtis.Dunham@arm.comopClass=SimdAlu 3228835SN/AopLat=1 3238893SN/A 3247513SN/A[system.cpu0.fuPool.FUList5.opList03] 3257513SN/Atype=OpDesc 32611066Snilay@cs.wisc.edueventq_index=0 3279885SN/AissueLat=1 3288893SN/AopClass=SimdCmp 3299481SN/AopLat=1 3309885SN/A 33111219Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList5.opList04] 33211570SCurtis.Dunham@arm.comtype=OpDesc 33311066Snilay@cs.wisc.edueventq_index=0 33410036SN/AissueLat=1 3359481SN/AopClass=SimdCvt 33611066Snilay@cs.wisc.eduopLat=1 3377513SN/A 3389481SN/A[system.cpu0.fuPool.FUList5.opList05] 33911570SCurtis.Dunham@arm.comtype=OpDesc 34011570SCurtis.Dunham@arm.comeventq_index=0 34111570SCurtis.Dunham@arm.comissueLat=1 34211570SCurtis.Dunham@arm.comopClass=SimdMisc 3437513SN/AopLat=1 3448835SN/A 3459481SN/A[system.cpu0.fuPool.FUList5.opList06] 34610036SN/Atype=OpDesc 3477513SN/Aeventq_index=0 3488835SN/AissueLat=1 3499885SN/AopClass=SimdMult 3509481SN/AopLat=1 3517513SN/A 35211219Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList5.opList07] 3538893SN/Atype=OpDesc 3548893SN/Aeventq_index=0 3557513SN/AissueLat=1 3569885SN/AopClass=SimdMultAcc 3579885SN/AopLat=1 3589885SN/A 3599885SN/A[system.cpu0.fuPool.FUList5.opList08] 3609885SN/Atype=OpDesc 36111570SCurtis.Dunham@arm.comeventq_index=0 36210036SN/AissueLat=1 3639885SN/AopClass=SimdShift 36411570SCurtis.Dunham@arm.comopLat=1 36511570SCurtis.Dunham@arm.com 36611570SCurtis.Dunham@arm.com[system.cpu0.fuPool.FUList5.opList09] 36711570SCurtis.Dunham@arm.comtype=OpDesc 36810036SN/Aeventq_index=0 3699885SN/AissueLat=1 3709885SN/AopClass=SimdShiftAcc 3717513SN/AopLat=1 37210451SN/A 37311219Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList5.opList10] 3749885SN/Atype=OpDesc 37511570SCurtis.Dunham@arm.comeventq_index=0 37610036SN/AissueLat=1 37711066Snilay@cs.wisc.eduopClass=SimdSqrt 37811066Snilay@cs.wisc.eduopLat=1 37911570SCurtis.Dunham@arm.com 38011570SCurtis.Dunham@arm.com[system.cpu0.fuPool.FUList5.opList11] 38111570SCurtis.Dunham@arm.comtype=OpDesc 38211388Ssteve.reinhardt@amd.comeventq_index=0 38311570SCurtis.Dunham@arm.comissueLat=1 38411066Snilay@cs.wisc.eduopClass=SimdFloatAdd 38511219Snilay@cs.wisc.eduopLat=1 38611066Snilay@cs.wisc.edu 3879885SN/A[system.cpu0.fuPool.FUList5.opList12] 3887524SN/Atype=OpDesc 3899481SN/Aeventq_index=0 3908893SN/AissueLat=1 39111066Snilay@cs.wisc.eduopClass=SimdFloatAlu 3927513SN/AopLat=1 39311219Snilay@cs.wisc.edu 39411219Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList5.opList13] 39511219Snilay@cs.wisc.edutype=OpDesc 39611219Snilay@cs.wisc.edueventq_index=0 39711219Snilay@cs.wisc.eduissueLat=1 39811219Snilay@cs.wisc.eduopClass=SimdFloatCmp 39911219Snilay@cs.wisc.eduopLat=1 4007513SN/A 4017513SN/A[system.cpu0.fuPool.FUList5.opList14] 40210036SN/Atype=OpDesc 4037513SN/Aeventq_index=0 4047513SN/AissueLat=1 4057513SN/AopClass=SimdFloatCvt 4067513SN/AopLat=1 40711066Snilay@cs.wisc.edu 40811066Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList5.opList15] 4097513SN/Atype=OpDesc 4107513SN/Aeventq_index=0 4117513SN/AissueLat=1 4127513SN/AopClass=SimdFloatDiv 41310036SN/AopLat=1 41411570SCurtis.Dunham@arm.com 4157513SN/A[system.cpu0.fuPool.FUList5.opList16] 4167513SN/Atype=OpDesc 41711066Snilay@cs.wisc.edueventq_index=0 4187513SN/AissueLat=1 4197513SN/AopClass=SimdFloatMisc 4207513SN/AopLat=1 4217513SN/A 4227513SN/A[system.cpu0.fuPool.FUList5.opList17] 4237513SN/Atype=OpDesc 4247513SN/Aeventq_index=0 42510451SN/AissueLat=1 4267513SN/AopClass=SimdFloatMult 4279885SN/AopLat=1 4289885SN/A 4299885SN/A[system.cpu0.fuPool.FUList5.opList18] 43010315SN/Atype=OpDesc 43110036SN/Aeventq_index=0 43210315SN/AissueLat=1 4339885SN/AopClass=SimdFloatMultAcc 4349885SN/AopLat=1 43510315SN/A 43610315SN/A[system.cpu0.fuPool.FUList5.opList19] 43710315SN/Atype=OpDesc 43810315SN/Aeventq_index=0 43910315SN/AissueLat=1 44010315SN/AopClass=SimdFloatSqrt 44110315SN/AopLat=1 44210315SN/A 4437513SN/A[system.cpu0.fuPool.FUList6] 44410451SN/Atype=FUDesc 4459885SN/Achildren=opList 44611570SCurtis.Dunham@arm.comcount=0 44710036SN/Aeventq_index=0 44811066Snilay@cs.wisc.eduopList=system.cpu0.fuPool.FUList6.opList 44911066Snilay@cs.wisc.edu 45011570SCurtis.Dunham@arm.com[system.cpu0.fuPool.FUList6.opList] 45111570SCurtis.Dunham@arm.comtype=OpDesc 45211570SCurtis.Dunham@arm.comeventq_index=0 45311388Ssteve.reinhardt@amd.comissueLat=1 45411570SCurtis.Dunham@arm.comopClass=MemWrite 45511066Snilay@cs.wisc.eduopLat=1 45610451SN/A 45711066Snilay@cs.wisc.edu[system.cpu0.fuPool.FUList7] 4589885SN/Atype=FUDesc 4597524SN/Achildren=opList0 opList1 46011066Snilay@cs.wisc.educount=4 4619265SN/Aeventq_index=0 4628893SN/AopList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 4637513SN/A 4647513SN/A[system.cpu0.fuPool.FUList7.opList0] 4658983SN/Atype=OpDesc 4669265SN/Aeventq_index=0 4679885SN/AissueLat=1 4689885SN/AopClass=MemRead 46911570SCurtis.Dunham@arm.comopLat=1 47010036SN/A 4718983SN/A[system.cpu0.fuPool.FUList7.opList1] 4727513SN/Atype=OpDesc 4737513SN/Aeventq_index=0 4747513SN/AissueLat=1 47511570SCurtis.Dunham@arm.comopClass=MemWrite 47611570SCurtis.Dunham@arm.comopLat=1 47711570SCurtis.Dunham@arm.com 47811570SCurtis.Dunham@arm.com[system.cpu0.fuPool.FUList8] 4797513SN/Atype=FUDesc 4808893SN/Achildren=opList 4817513SN/Acount=1 4829885SN/Aeventq_index=0 4839885SN/AopList=system.cpu0.fuPool.FUList8.opList 48410036SN/A 4859885SN/A[system.cpu0.fuPool.FUList8.opList] 4869885SN/Atype=OpDesc 487eventq_index=0 488issueLat=3 489opClass=IprAccess 490opLat=3 491 492[system.cpu0.icache] 493type=BaseCache 494children=tags 495addr_ranges=0:18446744073709551615 496assoc=1 497clk_domain=system.cpu_clk_domain 498eventq_index=0 499forward_snoops=true 500hit_latency=2 501is_top_level=true 502max_miss_count=0 503mshrs=4 504prefetch_on_access=false 505prefetcher=Null 506response_latency=2 507size=32768 508system=system 509tags=system.cpu0.icache.tags 510tgts_per_mshr=20 511two_queue=false 512write_buffers=8 513cpu_side=system.cpu0.icache_port 514mem_side=system.toL2Bus.slave[0] 515 516[system.cpu0.icache.tags] 517type=LRU 518assoc=1 519block_size=64 520clk_domain=system.cpu_clk_domain 521eventq_index=0 522hit_latency=2 523size=32768 524 525[system.cpu0.interrupts] 526type=SparcInterrupts 527eventq_index=0 528 529[system.cpu0.isa] 530type=SparcISA 531eventq_index=0 532 533[system.cpu0.itb] 534type=SparcTLB 535eventq_index=0 536size=64 537 538[system.cpu0.tracer] 539type=ExeTracer 540eventq_index=0 541 542[system.cpu0.workload] 543type=LiveProcess 544cmd=test_atomic 4 545cwd= 546egid=100 547env= 548errout=cerr 549euid=100 550eventq_index=0 551executable=tests/test-progs/m5threads/bin/sparc/linux/test_atomic 552gid=100 553input=cin 554max_stack_size=67108864 555output=cout 556pid=100 557ppid=99 558simpoint=0 559system=system 560uid=100 561 562[system.cpu1] 563type=DerivO3CPU 564children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 565LFSTSize=1024 566LQEntries=32 567LSQCheckLoads=true 568LSQDepCheckShift=4 569SQEntries=32 570SSITSize=1024 571activity=0 572backComSize=5 573branchPred=system.cpu1.branchPred 574cachePorts=200 575checker=Null 576clk_domain=system.cpu_clk_domain 577commitToDecodeDelay=1 578commitToFetchDelay=1 579commitToIEWDelay=1 580commitToRenameDelay=1 581commitWidth=8 582cpu_id=1 583decodeToFetchDelay=1 584decodeToRenameDelay=1 585decodeWidth=8 586dispatchWidth=8 587do_checkpoint_insts=true 588do_quiesce=true 589do_statistics_insts=true 590dtb=system.cpu1.dtb 591eventq_index=0 592fetchBufferSize=64 593fetchToDecodeDelay=1 594fetchTrapLatency=1 595fetchWidth=8 596forwardComSize=5 597fuPool=system.cpu1.fuPool 598function_trace=false 599function_trace_start=0 600iewToCommitDelay=1 601iewToDecodeDelay=1 602iewToFetchDelay=1 603iewToRenameDelay=1 604interrupts=system.cpu1.interrupts 605isa=system.cpu1.isa 606issueToExecuteDelay=1 607issueWidth=8 608itb=system.cpu1.itb 609max_insts_all_threads=0 610max_insts_any_thread=0 611max_loads_all_threads=0 612max_loads_any_thread=0 613needsTSO=false 614numIQEntries=64 615numPhysCCRegs=0 616numPhysFloatRegs=256 617numPhysIntRegs=256 618numROBEntries=192 619numRobs=1 620numThreads=1 621profile=0 622progress_interval=0 623renameToDecodeDelay=1 624renameToFetchDelay=1 625renameToIEWDelay=2 626renameToROBDelay=1 627renameWidth=8 628simpoint_start_insts= 629smtCommitPolicy=RoundRobin 630smtFetchPolicy=SingleThread 631smtIQPolicy=Partitioned 632smtIQThreshold=100 633smtLSQPolicy=Partitioned 634smtLSQThreshold=100 635smtNumFetchingThreads=1 636smtROBPolicy=Partitioned 637smtROBThreshold=100 638squashWidth=8 639store_set_clear_period=250000 640switched_out=false 641system=system 642tracer=system.cpu1.tracer 643trapLatency=13 644wbDepth=1 645wbWidth=8 646workload=system.cpu0.workload 647dcache_port=system.cpu1.dcache.cpu_side 648icache_port=system.cpu1.icache.cpu_side 649 650[system.cpu1.branchPred] 651type=BranchPredictor 652BTBEntries=4096 653BTBTagSize=16 654RASSize=16 655choiceCtrBits=2 656choicePredictorSize=8192 657eventq_index=0 658globalCtrBits=2 659globalPredictorSize=8192 660instShiftAmt=2 661localCtrBits=2 662localHistoryTableSize=2048 663localPredictorSize=2048 664numThreads=1 665predType=tournament 666 667[system.cpu1.dcache] 668type=BaseCache 669children=tags 670addr_ranges=0:18446744073709551615 671assoc=4 672clk_domain=system.cpu_clk_domain 673eventq_index=0 674forward_snoops=true 675hit_latency=2 676is_top_level=true 677max_miss_count=0 678mshrs=4 679prefetch_on_access=false 680prefetcher=Null 681response_latency=2 682size=32768 683system=system 684tags=system.cpu1.dcache.tags 685tgts_per_mshr=20 686two_queue=false 687write_buffers=8 688cpu_side=system.cpu1.dcache_port 689mem_side=system.toL2Bus.slave[3] 690 691[system.cpu1.dcache.tags] 692type=LRU 693assoc=4 694block_size=64 695clk_domain=system.cpu_clk_domain 696eventq_index=0 697hit_latency=2 698size=32768 699 700[system.cpu1.dtb] 701type=SparcTLB 702eventq_index=0 703size=64 704 705[system.cpu1.fuPool] 706type=FUPool 707children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 708FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 709eventq_index=0 710 711[system.cpu1.fuPool.FUList0] 712type=FUDesc 713children=opList 714count=6 715eventq_index=0 716opList=system.cpu1.fuPool.FUList0.opList 717 718[system.cpu1.fuPool.FUList0.opList] 719type=OpDesc 720eventq_index=0 721issueLat=1 722opClass=IntAlu 723opLat=1 724 725[system.cpu1.fuPool.FUList1] 726type=FUDesc 727children=opList0 opList1 728count=2 729eventq_index=0 730opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 731 732[system.cpu1.fuPool.FUList1.opList0] 733type=OpDesc 734eventq_index=0 735issueLat=1 736opClass=IntMult 737opLat=3 738 739[system.cpu1.fuPool.FUList1.opList1] 740type=OpDesc 741eventq_index=0 742issueLat=19 743opClass=IntDiv 744opLat=20 745 746[system.cpu1.fuPool.FUList2] 747type=FUDesc 748children=opList0 opList1 opList2 749count=4 750eventq_index=0 751opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 752 753[system.cpu1.fuPool.FUList2.opList0] 754type=OpDesc 755eventq_index=0 756issueLat=1 757opClass=FloatAdd 758opLat=2 759 760[system.cpu1.fuPool.FUList2.opList1] 761type=OpDesc 762eventq_index=0 763issueLat=1 764opClass=FloatCmp 765opLat=2 766 767[system.cpu1.fuPool.FUList2.opList2] 768type=OpDesc 769eventq_index=0 770issueLat=1 771opClass=FloatCvt 772opLat=2 773 774[system.cpu1.fuPool.FUList3] 775type=FUDesc 776children=opList0 opList1 opList2 777count=2 778eventq_index=0 779opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 780 781[system.cpu1.fuPool.FUList3.opList0] 782type=OpDesc 783eventq_index=0 784issueLat=1 785opClass=FloatMult 786opLat=4 787 788[system.cpu1.fuPool.FUList3.opList1] 789type=OpDesc 790eventq_index=0 791issueLat=12 792opClass=FloatDiv 793opLat=12 794 795[system.cpu1.fuPool.FUList3.opList2] 796type=OpDesc 797eventq_index=0 798issueLat=24 799opClass=FloatSqrt 800opLat=24 801 802[system.cpu1.fuPool.FUList4] 803type=FUDesc 804children=opList 805count=0 806eventq_index=0 807opList=system.cpu1.fuPool.FUList4.opList 808 809[system.cpu1.fuPool.FUList4.opList] 810type=OpDesc 811eventq_index=0 812issueLat=1 813opClass=MemRead 814opLat=1 815 816[system.cpu1.fuPool.FUList5] 817type=FUDesc 818children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 819count=4 820eventq_index=0 821opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 822 823[system.cpu1.fuPool.FUList5.opList00] 824type=OpDesc 825eventq_index=0 826issueLat=1 827opClass=SimdAdd 828opLat=1 829 830[system.cpu1.fuPool.FUList5.opList01] 831type=OpDesc 832eventq_index=0 833issueLat=1 834opClass=SimdAddAcc 835opLat=1 836 837[system.cpu1.fuPool.FUList5.opList02] 838type=OpDesc 839eventq_index=0 840issueLat=1 841opClass=SimdAlu 842opLat=1 843 844[system.cpu1.fuPool.FUList5.opList03] 845type=OpDesc 846eventq_index=0 847issueLat=1 848opClass=SimdCmp 849opLat=1 850 851[system.cpu1.fuPool.FUList5.opList04] 852type=OpDesc 853eventq_index=0 854issueLat=1 855opClass=SimdCvt 856opLat=1 857 858[system.cpu1.fuPool.FUList5.opList05] 859type=OpDesc 860eventq_index=0 861issueLat=1 862opClass=SimdMisc 863opLat=1 864 865[system.cpu1.fuPool.FUList5.opList06] 866type=OpDesc 867eventq_index=0 868issueLat=1 869opClass=SimdMult 870opLat=1 871 872[system.cpu1.fuPool.FUList5.opList07] 873type=OpDesc 874eventq_index=0 875issueLat=1 876opClass=SimdMultAcc 877opLat=1 878 879[system.cpu1.fuPool.FUList5.opList08] 880type=OpDesc 881eventq_index=0 882issueLat=1 883opClass=SimdShift 884opLat=1 885 886[system.cpu1.fuPool.FUList5.opList09] 887type=OpDesc 888eventq_index=0 889issueLat=1 890opClass=SimdShiftAcc 891opLat=1 892 893[system.cpu1.fuPool.FUList5.opList10] 894type=OpDesc 895eventq_index=0 896issueLat=1 897opClass=SimdSqrt 898opLat=1 899 900[system.cpu1.fuPool.FUList5.opList11] 901type=OpDesc 902eventq_index=0 903issueLat=1 904opClass=SimdFloatAdd 905opLat=1 906 907[system.cpu1.fuPool.FUList5.opList12] 908type=OpDesc 909eventq_index=0 910issueLat=1 911opClass=SimdFloatAlu 912opLat=1 913 914[system.cpu1.fuPool.FUList5.opList13] 915type=OpDesc 916eventq_index=0 917issueLat=1 918opClass=SimdFloatCmp 919opLat=1 920 921[system.cpu1.fuPool.FUList5.opList14] 922type=OpDesc 923eventq_index=0 924issueLat=1 925opClass=SimdFloatCvt 926opLat=1 927 928[system.cpu1.fuPool.FUList5.opList15] 929type=OpDesc 930eventq_index=0 931issueLat=1 932opClass=SimdFloatDiv 933opLat=1 934 935[system.cpu1.fuPool.FUList5.opList16] 936type=OpDesc 937eventq_index=0 938issueLat=1 939opClass=SimdFloatMisc 940opLat=1 941 942[system.cpu1.fuPool.FUList5.opList17] 943type=OpDesc 944eventq_index=0 945issueLat=1 946opClass=SimdFloatMult 947opLat=1 948 949[system.cpu1.fuPool.FUList5.opList18] 950type=OpDesc 951eventq_index=0 952issueLat=1 953opClass=SimdFloatMultAcc 954opLat=1 955 956[system.cpu1.fuPool.FUList5.opList19] 957type=OpDesc 958eventq_index=0 959issueLat=1 960opClass=SimdFloatSqrt 961opLat=1 962 963[system.cpu1.fuPool.FUList6] 964type=FUDesc 965children=opList 966count=0 967eventq_index=0 968opList=system.cpu1.fuPool.FUList6.opList 969 970[system.cpu1.fuPool.FUList6.opList] 971type=OpDesc 972eventq_index=0 973issueLat=1 974opClass=MemWrite 975opLat=1 976 977[system.cpu1.fuPool.FUList7] 978type=FUDesc 979children=opList0 opList1 980count=4 981eventq_index=0 982opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 983 984[system.cpu1.fuPool.FUList7.opList0] 985type=OpDesc 986eventq_index=0 987issueLat=1 988opClass=MemRead 989opLat=1 990 991[system.cpu1.fuPool.FUList7.opList1] 992type=OpDesc 993eventq_index=0 994issueLat=1 995opClass=MemWrite 996opLat=1 997 998[system.cpu1.fuPool.FUList8] 999type=FUDesc 1000children=opList 1001count=1 1002eventq_index=0 1003opList=system.cpu1.fuPool.FUList8.opList 1004 1005[system.cpu1.fuPool.FUList8.opList] 1006type=OpDesc 1007eventq_index=0 1008issueLat=3 1009opClass=IprAccess 1010opLat=3 1011 1012[system.cpu1.icache] 1013type=BaseCache 1014children=tags 1015addr_ranges=0:18446744073709551615 1016assoc=1 1017clk_domain=system.cpu_clk_domain 1018eventq_index=0 1019forward_snoops=true 1020hit_latency=2 1021is_top_level=true 1022max_miss_count=0 1023mshrs=4 1024prefetch_on_access=false 1025prefetcher=Null 1026response_latency=2 1027size=32768 1028system=system 1029tags=system.cpu1.icache.tags 1030tgts_per_mshr=20 1031two_queue=false 1032write_buffers=8 1033cpu_side=system.cpu1.icache_port 1034mem_side=system.toL2Bus.slave[2] 1035 1036[system.cpu1.icache.tags] 1037type=LRU 1038assoc=1 1039block_size=64 1040clk_domain=system.cpu_clk_domain 1041eventq_index=0 1042hit_latency=2 1043size=32768 1044 1045[system.cpu1.interrupts] 1046type=SparcInterrupts 1047eventq_index=0 1048 1049[system.cpu1.isa] 1050type=SparcISA 1051eventq_index=0 1052 1053[system.cpu1.itb] 1054type=SparcTLB 1055eventq_index=0 1056size=64 1057 1058[system.cpu1.tracer] 1059type=ExeTracer 1060eventq_index=0 1061 1062[system.cpu2] 1063type=DerivO3CPU 1064children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 1065LFSTSize=1024 1066LQEntries=32 1067LSQCheckLoads=true 1068LSQDepCheckShift=4 1069SQEntries=32 1070SSITSize=1024 1071activity=0 1072backComSize=5 1073branchPred=system.cpu2.branchPred 1074cachePorts=200 1075checker=Null 1076clk_domain=system.cpu_clk_domain 1077commitToDecodeDelay=1 1078commitToFetchDelay=1 1079commitToIEWDelay=1 1080commitToRenameDelay=1 1081commitWidth=8 1082cpu_id=2 1083decodeToFetchDelay=1 1084decodeToRenameDelay=1 1085decodeWidth=8 1086dispatchWidth=8 1087do_checkpoint_insts=true 1088do_quiesce=true 1089do_statistics_insts=true 1090dtb=system.cpu2.dtb 1091eventq_index=0 1092fetchBufferSize=64 1093fetchToDecodeDelay=1 1094fetchTrapLatency=1 1095fetchWidth=8 1096forwardComSize=5 1097fuPool=system.cpu2.fuPool 1098function_trace=false 1099function_trace_start=0 1100iewToCommitDelay=1 1101iewToDecodeDelay=1 1102iewToFetchDelay=1 1103iewToRenameDelay=1 1104interrupts=system.cpu2.interrupts 1105isa=system.cpu2.isa 1106issueToExecuteDelay=1 1107issueWidth=8 1108itb=system.cpu2.itb 1109max_insts_all_threads=0 1110max_insts_any_thread=0 1111max_loads_all_threads=0 1112max_loads_any_thread=0 1113needsTSO=false 1114numIQEntries=64 1115numPhysCCRegs=0 1116numPhysFloatRegs=256 1117numPhysIntRegs=256 1118numROBEntries=192 1119numRobs=1 1120numThreads=1 1121profile=0 1122progress_interval=0 1123renameToDecodeDelay=1 1124renameToFetchDelay=1 1125renameToIEWDelay=2 1126renameToROBDelay=1 1127renameWidth=8 1128simpoint_start_insts= 1129smtCommitPolicy=RoundRobin 1130smtFetchPolicy=SingleThread 1131smtIQPolicy=Partitioned 1132smtIQThreshold=100 1133smtLSQPolicy=Partitioned 1134smtLSQThreshold=100 1135smtNumFetchingThreads=1 1136smtROBPolicy=Partitioned 1137smtROBThreshold=100 1138squashWidth=8 1139store_set_clear_period=250000 1140switched_out=false 1141system=system 1142tracer=system.cpu2.tracer 1143trapLatency=13 1144wbDepth=1 1145wbWidth=8 1146workload=system.cpu0.workload 1147dcache_port=system.cpu2.dcache.cpu_side 1148icache_port=system.cpu2.icache.cpu_side 1149 1150[system.cpu2.branchPred] 1151type=BranchPredictor 1152BTBEntries=4096 1153BTBTagSize=16 1154RASSize=16 1155choiceCtrBits=2 1156choicePredictorSize=8192 1157eventq_index=0 1158globalCtrBits=2 1159globalPredictorSize=8192 1160instShiftAmt=2 1161localCtrBits=2 1162localHistoryTableSize=2048 1163localPredictorSize=2048 1164numThreads=1 1165predType=tournament 1166 1167[system.cpu2.dcache] 1168type=BaseCache 1169children=tags 1170addr_ranges=0:18446744073709551615 1171assoc=4 1172clk_domain=system.cpu_clk_domain 1173eventq_index=0 1174forward_snoops=true 1175hit_latency=2 1176is_top_level=true 1177max_miss_count=0 1178mshrs=4 1179prefetch_on_access=false 1180prefetcher=Null 1181response_latency=2 1182size=32768 1183system=system 1184tags=system.cpu2.dcache.tags 1185tgts_per_mshr=20 1186two_queue=false 1187write_buffers=8 1188cpu_side=system.cpu2.dcache_port 1189mem_side=system.toL2Bus.slave[5] 1190 1191[system.cpu2.dcache.tags] 1192type=LRU 1193assoc=4 1194block_size=64 1195clk_domain=system.cpu_clk_domain 1196eventq_index=0 1197hit_latency=2 1198size=32768 1199 1200[system.cpu2.dtb] 1201type=SparcTLB 1202eventq_index=0 1203size=64 1204 1205[system.cpu2.fuPool] 1206type=FUPool 1207children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 1208FUList=system.cpu2.fuPool.FUList0 system.cpu2.fuPool.FUList1 system.cpu2.fuPool.FUList2 system.cpu2.fuPool.FUList3 system.cpu2.fuPool.FUList4 system.cpu2.fuPool.FUList5 system.cpu2.fuPool.FUList6 system.cpu2.fuPool.FUList7 system.cpu2.fuPool.FUList8 1209eventq_index=0 1210 1211[system.cpu2.fuPool.FUList0] 1212type=FUDesc 1213children=opList 1214count=6 1215eventq_index=0 1216opList=system.cpu2.fuPool.FUList0.opList 1217 1218[system.cpu2.fuPool.FUList0.opList] 1219type=OpDesc 1220eventq_index=0 1221issueLat=1 1222opClass=IntAlu 1223opLat=1 1224 1225[system.cpu2.fuPool.FUList1] 1226type=FUDesc 1227children=opList0 opList1 1228count=2 1229eventq_index=0 1230opList=system.cpu2.fuPool.FUList1.opList0 system.cpu2.fuPool.FUList1.opList1 1231 1232[system.cpu2.fuPool.FUList1.opList0] 1233type=OpDesc 1234eventq_index=0 1235issueLat=1 1236opClass=IntMult 1237opLat=3 1238 1239[system.cpu2.fuPool.FUList1.opList1] 1240type=OpDesc 1241eventq_index=0 1242issueLat=19 1243opClass=IntDiv 1244opLat=20 1245 1246[system.cpu2.fuPool.FUList2] 1247type=FUDesc 1248children=opList0 opList1 opList2 1249count=4 1250eventq_index=0 1251opList=system.cpu2.fuPool.FUList2.opList0 system.cpu2.fuPool.FUList2.opList1 system.cpu2.fuPool.FUList2.opList2 1252 1253[system.cpu2.fuPool.FUList2.opList0] 1254type=OpDesc 1255eventq_index=0 1256issueLat=1 1257opClass=FloatAdd 1258opLat=2 1259 1260[system.cpu2.fuPool.FUList2.opList1] 1261type=OpDesc 1262eventq_index=0 1263issueLat=1 1264opClass=FloatCmp 1265opLat=2 1266 1267[system.cpu2.fuPool.FUList2.opList2] 1268type=OpDesc 1269eventq_index=0 1270issueLat=1 1271opClass=FloatCvt 1272opLat=2 1273 1274[system.cpu2.fuPool.FUList3] 1275type=FUDesc 1276children=opList0 opList1 opList2 1277count=2 1278eventq_index=0 1279opList=system.cpu2.fuPool.FUList3.opList0 system.cpu2.fuPool.FUList3.opList1 system.cpu2.fuPool.FUList3.opList2 1280 1281[system.cpu2.fuPool.FUList3.opList0] 1282type=OpDesc 1283eventq_index=0 1284issueLat=1 1285opClass=FloatMult 1286opLat=4 1287 1288[system.cpu2.fuPool.FUList3.opList1] 1289type=OpDesc 1290eventq_index=0 1291issueLat=12 1292opClass=FloatDiv 1293opLat=12 1294 1295[system.cpu2.fuPool.FUList3.opList2] 1296type=OpDesc 1297eventq_index=0 1298issueLat=24 1299opClass=FloatSqrt 1300opLat=24 1301 1302[system.cpu2.fuPool.FUList4] 1303type=FUDesc 1304children=opList 1305count=0 1306eventq_index=0 1307opList=system.cpu2.fuPool.FUList4.opList 1308 1309[system.cpu2.fuPool.FUList4.opList] 1310type=OpDesc 1311eventq_index=0 1312issueLat=1 1313opClass=MemRead 1314opLat=1 1315 1316[system.cpu2.fuPool.FUList5] 1317type=FUDesc 1318children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 1319count=4 1320eventq_index=0 1321opList=system.cpu2.fuPool.FUList5.opList00 system.cpu2.fuPool.FUList5.opList01 system.cpu2.fuPool.FUList5.opList02 system.cpu2.fuPool.FUList5.opList03 system.cpu2.fuPool.FUList5.opList04 system.cpu2.fuPool.FUList5.opList05 system.cpu2.fuPool.FUList5.opList06 system.cpu2.fuPool.FUList5.opList07 system.cpu2.fuPool.FUList5.opList08 system.cpu2.fuPool.FUList5.opList09 system.cpu2.fuPool.FUList5.opList10 system.cpu2.fuPool.FUList5.opList11 system.cpu2.fuPool.FUList5.opList12 system.cpu2.fuPool.FUList5.opList13 system.cpu2.fuPool.FUList5.opList14 system.cpu2.fuPool.FUList5.opList15 system.cpu2.fuPool.FUList5.opList16 system.cpu2.fuPool.FUList5.opList17 system.cpu2.fuPool.FUList5.opList18 system.cpu2.fuPool.FUList5.opList19 1322 1323[system.cpu2.fuPool.FUList5.opList00] 1324type=OpDesc 1325eventq_index=0 1326issueLat=1 1327opClass=SimdAdd 1328opLat=1 1329 1330[system.cpu2.fuPool.FUList5.opList01] 1331type=OpDesc 1332eventq_index=0 1333issueLat=1 1334opClass=SimdAddAcc 1335opLat=1 1336 1337[system.cpu2.fuPool.FUList5.opList02] 1338type=OpDesc 1339eventq_index=0 1340issueLat=1 1341opClass=SimdAlu 1342opLat=1 1343 1344[system.cpu2.fuPool.FUList5.opList03] 1345type=OpDesc 1346eventq_index=0 1347issueLat=1 1348opClass=SimdCmp 1349opLat=1 1350 1351[system.cpu2.fuPool.FUList5.opList04] 1352type=OpDesc 1353eventq_index=0 1354issueLat=1 1355opClass=SimdCvt 1356opLat=1 1357 1358[system.cpu2.fuPool.FUList5.opList05] 1359type=OpDesc 1360eventq_index=0 1361issueLat=1 1362opClass=SimdMisc 1363opLat=1 1364 1365[system.cpu2.fuPool.FUList5.opList06] 1366type=OpDesc 1367eventq_index=0 1368issueLat=1 1369opClass=SimdMult 1370opLat=1 1371 1372[system.cpu2.fuPool.FUList5.opList07] 1373type=OpDesc 1374eventq_index=0 1375issueLat=1 1376opClass=SimdMultAcc 1377opLat=1 1378 1379[system.cpu2.fuPool.FUList5.opList08] 1380type=OpDesc 1381eventq_index=0 1382issueLat=1 1383opClass=SimdShift 1384opLat=1 1385 1386[system.cpu2.fuPool.FUList5.opList09] 1387type=OpDesc 1388eventq_index=0 1389issueLat=1 1390opClass=SimdShiftAcc 1391opLat=1 1392 1393[system.cpu2.fuPool.FUList5.opList10] 1394type=OpDesc 1395eventq_index=0 1396issueLat=1 1397opClass=SimdSqrt 1398opLat=1 1399 1400[system.cpu2.fuPool.FUList5.opList11] 1401type=OpDesc 1402eventq_index=0 1403issueLat=1 1404opClass=SimdFloatAdd 1405opLat=1 1406 1407[system.cpu2.fuPool.FUList5.opList12] 1408type=OpDesc 1409eventq_index=0 1410issueLat=1 1411opClass=SimdFloatAlu 1412opLat=1 1413 1414[system.cpu2.fuPool.FUList5.opList13] 1415type=OpDesc 1416eventq_index=0 1417issueLat=1 1418opClass=SimdFloatCmp 1419opLat=1 1420 1421[system.cpu2.fuPool.FUList5.opList14] 1422type=OpDesc 1423eventq_index=0 1424issueLat=1 1425opClass=SimdFloatCvt 1426opLat=1 1427 1428[system.cpu2.fuPool.FUList5.opList15] 1429type=OpDesc 1430eventq_index=0 1431issueLat=1 1432opClass=SimdFloatDiv 1433opLat=1 1434 1435[system.cpu2.fuPool.FUList5.opList16] 1436type=OpDesc 1437eventq_index=0 1438issueLat=1 1439opClass=SimdFloatMisc 1440opLat=1 1441 1442[system.cpu2.fuPool.FUList5.opList17] 1443type=OpDesc 1444eventq_index=0 1445issueLat=1 1446opClass=SimdFloatMult 1447opLat=1 1448 1449[system.cpu2.fuPool.FUList5.opList18] 1450type=OpDesc 1451eventq_index=0 1452issueLat=1 1453opClass=SimdFloatMultAcc 1454opLat=1 1455 1456[system.cpu2.fuPool.FUList5.opList19] 1457type=OpDesc 1458eventq_index=0 1459issueLat=1 1460opClass=SimdFloatSqrt 1461opLat=1 1462 1463[system.cpu2.fuPool.FUList6] 1464type=FUDesc 1465children=opList 1466count=0 1467eventq_index=0 1468opList=system.cpu2.fuPool.FUList6.opList 1469 1470[system.cpu2.fuPool.FUList6.opList] 1471type=OpDesc 1472eventq_index=0 1473issueLat=1 1474opClass=MemWrite 1475opLat=1 1476 1477[system.cpu2.fuPool.FUList7] 1478type=FUDesc 1479children=opList0 opList1 1480count=4 1481eventq_index=0 1482opList=system.cpu2.fuPool.FUList7.opList0 system.cpu2.fuPool.FUList7.opList1 1483 1484[system.cpu2.fuPool.FUList7.opList0] 1485type=OpDesc 1486eventq_index=0 1487issueLat=1 1488opClass=MemRead 1489opLat=1 1490 1491[system.cpu2.fuPool.FUList7.opList1] 1492type=OpDesc 1493eventq_index=0 1494issueLat=1 1495opClass=MemWrite 1496opLat=1 1497 1498[system.cpu2.fuPool.FUList8] 1499type=FUDesc 1500children=opList 1501count=1 1502eventq_index=0 1503opList=system.cpu2.fuPool.FUList8.opList 1504 1505[system.cpu2.fuPool.FUList8.opList] 1506type=OpDesc 1507eventq_index=0 1508issueLat=3 1509opClass=IprAccess 1510opLat=3 1511 1512[system.cpu2.icache] 1513type=BaseCache 1514children=tags 1515addr_ranges=0:18446744073709551615 1516assoc=1 1517clk_domain=system.cpu_clk_domain 1518eventq_index=0 1519forward_snoops=true 1520hit_latency=2 1521is_top_level=true 1522max_miss_count=0 1523mshrs=4 1524prefetch_on_access=false 1525prefetcher=Null 1526response_latency=2 1527size=32768 1528system=system 1529tags=system.cpu2.icache.tags 1530tgts_per_mshr=20 1531two_queue=false 1532write_buffers=8 1533cpu_side=system.cpu2.icache_port 1534mem_side=system.toL2Bus.slave[4] 1535 1536[system.cpu2.icache.tags] 1537type=LRU 1538assoc=1 1539block_size=64 1540clk_domain=system.cpu_clk_domain 1541eventq_index=0 1542hit_latency=2 1543size=32768 1544 1545[system.cpu2.interrupts] 1546type=SparcInterrupts 1547eventq_index=0 1548 1549[system.cpu2.isa] 1550type=SparcISA 1551eventq_index=0 1552 1553[system.cpu2.itb] 1554type=SparcTLB 1555eventq_index=0 1556size=64 1557 1558[system.cpu2.tracer] 1559type=ExeTracer 1560eventq_index=0 1561 1562[system.cpu3] 1563type=DerivO3CPU 1564children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 1565LFSTSize=1024 1566LQEntries=32 1567LSQCheckLoads=true 1568LSQDepCheckShift=4 1569SQEntries=32 1570SSITSize=1024 1571activity=0 1572backComSize=5 1573branchPred=system.cpu3.branchPred 1574cachePorts=200 1575checker=Null 1576clk_domain=system.cpu_clk_domain 1577commitToDecodeDelay=1 1578commitToFetchDelay=1 1579commitToIEWDelay=1 1580commitToRenameDelay=1 1581commitWidth=8 1582cpu_id=3 1583decodeToFetchDelay=1 1584decodeToRenameDelay=1 1585decodeWidth=8 1586dispatchWidth=8 1587do_checkpoint_insts=true 1588do_quiesce=true 1589do_statistics_insts=true 1590dtb=system.cpu3.dtb 1591eventq_index=0 1592fetchBufferSize=64 1593fetchToDecodeDelay=1 1594fetchTrapLatency=1 1595fetchWidth=8 1596forwardComSize=5 1597fuPool=system.cpu3.fuPool 1598function_trace=false 1599function_trace_start=0 1600iewToCommitDelay=1 1601iewToDecodeDelay=1 1602iewToFetchDelay=1 1603iewToRenameDelay=1 1604interrupts=system.cpu3.interrupts 1605isa=system.cpu3.isa 1606issueToExecuteDelay=1 1607issueWidth=8 1608itb=system.cpu3.itb 1609max_insts_all_threads=0 1610max_insts_any_thread=0 1611max_loads_all_threads=0 1612max_loads_any_thread=0 1613needsTSO=false 1614numIQEntries=64 1615numPhysCCRegs=0 1616numPhysFloatRegs=256 1617numPhysIntRegs=256 1618numROBEntries=192 1619numRobs=1 1620numThreads=1 1621profile=0 1622progress_interval=0 1623renameToDecodeDelay=1 1624renameToFetchDelay=1 1625renameToIEWDelay=2 1626renameToROBDelay=1 1627renameWidth=8 1628simpoint_start_insts= 1629smtCommitPolicy=RoundRobin 1630smtFetchPolicy=SingleThread 1631smtIQPolicy=Partitioned 1632smtIQThreshold=100 1633smtLSQPolicy=Partitioned 1634smtLSQThreshold=100 1635smtNumFetchingThreads=1 1636smtROBPolicy=Partitioned 1637smtROBThreshold=100 1638squashWidth=8 1639store_set_clear_period=250000 1640switched_out=false 1641system=system 1642tracer=system.cpu3.tracer 1643trapLatency=13 1644wbDepth=1 1645wbWidth=8 1646workload=system.cpu0.workload 1647dcache_port=system.cpu3.dcache.cpu_side 1648icache_port=system.cpu3.icache.cpu_side 1649 1650[system.cpu3.branchPred] 1651type=BranchPredictor 1652BTBEntries=4096 1653BTBTagSize=16 1654RASSize=16 1655choiceCtrBits=2 1656choicePredictorSize=8192 1657eventq_index=0 1658globalCtrBits=2 1659globalPredictorSize=8192 1660instShiftAmt=2 1661localCtrBits=2 1662localHistoryTableSize=2048 1663localPredictorSize=2048 1664numThreads=1 1665predType=tournament 1666 1667[system.cpu3.dcache] 1668type=BaseCache 1669children=tags 1670addr_ranges=0:18446744073709551615 1671assoc=4 1672clk_domain=system.cpu_clk_domain 1673eventq_index=0 1674forward_snoops=true 1675hit_latency=2 1676is_top_level=true 1677max_miss_count=0 1678mshrs=4 1679prefetch_on_access=false 1680prefetcher=Null 1681response_latency=2 1682size=32768 1683system=system 1684tags=system.cpu3.dcache.tags 1685tgts_per_mshr=20 1686two_queue=false 1687write_buffers=8 1688cpu_side=system.cpu3.dcache_port 1689mem_side=system.toL2Bus.slave[7] 1690 1691[system.cpu3.dcache.tags] 1692type=LRU 1693assoc=4 1694block_size=64 1695clk_domain=system.cpu_clk_domain 1696eventq_index=0 1697hit_latency=2 1698size=32768 1699 1700[system.cpu3.dtb] 1701type=SparcTLB 1702eventq_index=0 1703size=64 1704 1705[system.cpu3.fuPool] 1706type=FUPool 1707children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 1708FUList=system.cpu3.fuPool.FUList0 system.cpu3.fuPool.FUList1 system.cpu3.fuPool.FUList2 system.cpu3.fuPool.FUList3 system.cpu3.fuPool.FUList4 system.cpu3.fuPool.FUList5 system.cpu3.fuPool.FUList6 system.cpu3.fuPool.FUList7 system.cpu3.fuPool.FUList8 1709eventq_index=0 1710 1711[system.cpu3.fuPool.FUList0] 1712type=FUDesc 1713children=opList 1714count=6 1715eventq_index=0 1716opList=system.cpu3.fuPool.FUList0.opList 1717 1718[system.cpu3.fuPool.FUList0.opList] 1719type=OpDesc 1720eventq_index=0 1721issueLat=1 1722opClass=IntAlu 1723opLat=1 1724 1725[system.cpu3.fuPool.FUList1] 1726type=FUDesc 1727children=opList0 opList1 1728count=2 1729eventq_index=0 1730opList=system.cpu3.fuPool.FUList1.opList0 system.cpu3.fuPool.FUList1.opList1 1731 1732[system.cpu3.fuPool.FUList1.opList0] 1733type=OpDesc 1734eventq_index=0 1735issueLat=1 1736opClass=IntMult 1737opLat=3 1738 1739[system.cpu3.fuPool.FUList1.opList1] 1740type=OpDesc 1741eventq_index=0 1742issueLat=19 1743opClass=IntDiv 1744opLat=20 1745 1746[system.cpu3.fuPool.FUList2] 1747type=FUDesc 1748children=opList0 opList1 opList2 1749count=4 1750eventq_index=0 1751opList=system.cpu3.fuPool.FUList2.opList0 system.cpu3.fuPool.FUList2.opList1 system.cpu3.fuPool.FUList2.opList2 1752 1753[system.cpu3.fuPool.FUList2.opList0] 1754type=OpDesc 1755eventq_index=0 1756issueLat=1 1757opClass=FloatAdd 1758opLat=2 1759 1760[system.cpu3.fuPool.FUList2.opList1] 1761type=OpDesc 1762eventq_index=0 1763issueLat=1 1764opClass=FloatCmp 1765opLat=2 1766 1767[system.cpu3.fuPool.FUList2.opList2] 1768type=OpDesc 1769eventq_index=0 1770issueLat=1 1771opClass=FloatCvt 1772opLat=2 1773 1774[system.cpu3.fuPool.FUList3] 1775type=FUDesc 1776children=opList0 opList1 opList2 1777count=2 1778eventq_index=0 1779opList=system.cpu3.fuPool.FUList3.opList0 system.cpu3.fuPool.FUList3.opList1 system.cpu3.fuPool.FUList3.opList2 1780 1781[system.cpu3.fuPool.FUList3.opList0] 1782type=OpDesc 1783eventq_index=0 1784issueLat=1 1785opClass=FloatMult 1786opLat=4 1787 1788[system.cpu3.fuPool.FUList3.opList1] 1789type=OpDesc 1790eventq_index=0 1791issueLat=12 1792opClass=FloatDiv 1793opLat=12 1794 1795[system.cpu3.fuPool.FUList3.opList2] 1796type=OpDesc 1797eventq_index=0 1798issueLat=24 1799opClass=FloatSqrt 1800opLat=24 1801 1802[system.cpu3.fuPool.FUList4] 1803type=FUDesc 1804children=opList 1805count=0 1806eventq_index=0 1807opList=system.cpu3.fuPool.FUList4.opList 1808 1809[system.cpu3.fuPool.FUList4.opList] 1810type=OpDesc 1811eventq_index=0 1812issueLat=1 1813opClass=MemRead 1814opLat=1 1815 1816[system.cpu3.fuPool.FUList5] 1817type=FUDesc 1818children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 1819count=4 1820eventq_index=0 1821opList=system.cpu3.fuPool.FUList5.opList00 system.cpu3.fuPool.FUList5.opList01 system.cpu3.fuPool.FUList5.opList02 system.cpu3.fuPool.FUList5.opList03 system.cpu3.fuPool.FUList5.opList04 system.cpu3.fuPool.FUList5.opList05 system.cpu3.fuPool.FUList5.opList06 system.cpu3.fuPool.FUList5.opList07 system.cpu3.fuPool.FUList5.opList08 system.cpu3.fuPool.FUList5.opList09 system.cpu3.fuPool.FUList5.opList10 system.cpu3.fuPool.FUList5.opList11 system.cpu3.fuPool.FUList5.opList12 system.cpu3.fuPool.FUList5.opList13 system.cpu3.fuPool.FUList5.opList14 system.cpu3.fuPool.FUList5.opList15 system.cpu3.fuPool.FUList5.opList16 system.cpu3.fuPool.FUList5.opList17 system.cpu3.fuPool.FUList5.opList18 system.cpu3.fuPool.FUList5.opList19 1822 1823[system.cpu3.fuPool.FUList5.opList00] 1824type=OpDesc 1825eventq_index=0 1826issueLat=1 1827opClass=SimdAdd 1828opLat=1 1829 1830[system.cpu3.fuPool.FUList5.opList01] 1831type=OpDesc 1832eventq_index=0 1833issueLat=1 1834opClass=SimdAddAcc 1835opLat=1 1836 1837[system.cpu3.fuPool.FUList5.opList02] 1838type=OpDesc 1839eventq_index=0 1840issueLat=1 1841opClass=SimdAlu 1842opLat=1 1843 1844[system.cpu3.fuPool.FUList5.opList03] 1845type=OpDesc 1846eventq_index=0 1847issueLat=1 1848opClass=SimdCmp 1849opLat=1 1850 1851[system.cpu3.fuPool.FUList5.opList04] 1852type=OpDesc 1853eventq_index=0 1854issueLat=1 1855opClass=SimdCvt 1856opLat=1 1857 1858[system.cpu3.fuPool.FUList5.opList05] 1859type=OpDesc 1860eventq_index=0 1861issueLat=1 1862opClass=SimdMisc 1863opLat=1 1864 1865[system.cpu3.fuPool.FUList5.opList06] 1866type=OpDesc 1867eventq_index=0 1868issueLat=1 1869opClass=SimdMult 1870opLat=1 1871 1872[system.cpu3.fuPool.FUList5.opList07] 1873type=OpDesc 1874eventq_index=0 1875issueLat=1 1876opClass=SimdMultAcc 1877opLat=1 1878 1879[system.cpu3.fuPool.FUList5.opList08] 1880type=OpDesc 1881eventq_index=0 1882issueLat=1 1883opClass=SimdShift 1884opLat=1 1885 1886[system.cpu3.fuPool.FUList5.opList09] 1887type=OpDesc 1888eventq_index=0 1889issueLat=1 1890opClass=SimdShiftAcc 1891opLat=1 1892 1893[system.cpu3.fuPool.FUList5.opList10] 1894type=OpDesc 1895eventq_index=0 1896issueLat=1 1897opClass=SimdSqrt 1898opLat=1 1899 1900[system.cpu3.fuPool.FUList5.opList11] 1901type=OpDesc 1902eventq_index=0 1903issueLat=1 1904opClass=SimdFloatAdd 1905opLat=1 1906 1907[system.cpu3.fuPool.FUList5.opList12] 1908type=OpDesc 1909eventq_index=0 1910issueLat=1 1911opClass=SimdFloatAlu 1912opLat=1 1913 1914[system.cpu3.fuPool.FUList5.opList13] 1915type=OpDesc 1916eventq_index=0 1917issueLat=1 1918opClass=SimdFloatCmp 1919opLat=1 1920 1921[system.cpu3.fuPool.FUList5.opList14] 1922type=OpDesc 1923eventq_index=0 1924issueLat=1 1925opClass=SimdFloatCvt 1926opLat=1 1927 1928[system.cpu3.fuPool.FUList5.opList15] 1929type=OpDesc 1930eventq_index=0 1931issueLat=1 1932opClass=SimdFloatDiv 1933opLat=1 1934 1935[system.cpu3.fuPool.FUList5.opList16] 1936type=OpDesc 1937eventq_index=0 1938issueLat=1 1939opClass=SimdFloatMisc 1940opLat=1 1941 1942[system.cpu3.fuPool.FUList5.opList17] 1943type=OpDesc 1944eventq_index=0 1945issueLat=1 1946opClass=SimdFloatMult 1947opLat=1 1948 1949[system.cpu3.fuPool.FUList5.opList18] 1950type=OpDesc 1951eventq_index=0 1952issueLat=1 1953opClass=SimdFloatMultAcc 1954opLat=1 1955 1956[system.cpu3.fuPool.FUList5.opList19] 1957type=OpDesc 1958eventq_index=0 1959issueLat=1 1960opClass=SimdFloatSqrt 1961opLat=1 1962 1963[system.cpu3.fuPool.FUList6] 1964type=FUDesc 1965children=opList 1966count=0 1967eventq_index=0 1968opList=system.cpu3.fuPool.FUList6.opList 1969 1970[system.cpu3.fuPool.FUList6.opList] 1971type=OpDesc 1972eventq_index=0 1973issueLat=1 1974opClass=MemWrite 1975opLat=1 1976 1977[system.cpu3.fuPool.FUList7] 1978type=FUDesc 1979children=opList0 opList1 1980count=4 1981eventq_index=0 1982opList=system.cpu3.fuPool.FUList7.opList0 system.cpu3.fuPool.FUList7.opList1 1983 1984[system.cpu3.fuPool.FUList7.opList0] 1985type=OpDesc 1986eventq_index=0 1987issueLat=1 1988opClass=MemRead 1989opLat=1 1990 1991[system.cpu3.fuPool.FUList7.opList1] 1992type=OpDesc 1993eventq_index=0 1994issueLat=1 1995opClass=MemWrite 1996opLat=1 1997 1998[system.cpu3.fuPool.FUList8] 1999type=FUDesc 2000children=opList 2001count=1 2002eventq_index=0 2003opList=system.cpu3.fuPool.FUList8.opList 2004 2005[system.cpu3.fuPool.FUList8.opList] 2006type=OpDesc 2007eventq_index=0 2008issueLat=3 2009opClass=IprAccess 2010opLat=3 2011 2012[system.cpu3.icache] 2013type=BaseCache 2014children=tags 2015addr_ranges=0:18446744073709551615 2016assoc=1 2017clk_domain=system.cpu_clk_domain 2018eventq_index=0 2019forward_snoops=true 2020hit_latency=2 2021is_top_level=true 2022max_miss_count=0 2023mshrs=4 2024prefetch_on_access=false 2025prefetcher=Null 2026response_latency=2 2027size=32768 2028system=system 2029tags=system.cpu3.icache.tags 2030tgts_per_mshr=20 2031two_queue=false 2032write_buffers=8 2033cpu_side=system.cpu3.icache_port 2034mem_side=system.toL2Bus.slave[6] 2035 2036[system.cpu3.icache.tags] 2037type=LRU 2038assoc=1 2039block_size=64 2040clk_domain=system.cpu_clk_domain 2041eventq_index=0 2042hit_latency=2 2043size=32768 2044 2045[system.cpu3.interrupts] 2046type=SparcInterrupts 2047eventq_index=0 2048 2049[system.cpu3.isa] 2050type=SparcISA 2051eventq_index=0 2052 2053[system.cpu3.itb] 2054type=SparcTLB 2055eventq_index=0 2056size=64 2057 2058[system.cpu3.tracer] 2059type=ExeTracer 2060eventq_index=0 2061 2062[system.cpu_clk_domain] 2063type=SrcClockDomain 2064clock=500 2065eventq_index=0 2066voltage_domain=system.voltage_domain 2067 2068[system.l2c] 2069type=BaseCache 2070children=tags 2071addr_ranges=0:18446744073709551615 2072assoc=8 2073clk_domain=system.cpu_clk_domain 2074eventq_index=0 2075forward_snoops=true 2076hit_latency=20 2077is_top_level=false 2078max_miss_count=0 2079mshrs=20 2080prefetch_on_access=false 2081prefetcher=Null 2082response_latency=20 2083size=4194304 2084system=system 2085tags=system.l2c.tags 2086tgts_per_mshr=12 2087two_queue=false 2088write_buffers=8 2089cpu_side=system.toL2Bus.master[0] 2090mem_side=system.membus.slave[1] 2091 2092[system.l2c.tags] 2093type=LRU 2094assoc=8 2095block_size=64 2096clk_domain=system.cpu_clk_domain 2097eventq_index=0 2098hit_latency=20 2099size=4194304 2100 2101[system.membus] 2102type=CoherentBus 2103clk_domain=system.clk_domain 2104eventq_index=0 2105header_cycles=1 2106system=system 2107use_default_range=false 2108width=8 2109master=system.physmem.port 2110slave=system.system_port system.l2c.mem_side 2111 2112[system.physmem] 2113type=SimpleDRAM 2114activation_limit=4 2115addr_mapping=RaBaChCo 2116banks_per_rank=8 2117burst_length=8 2118channels=1 2119clk_domain=system.clk_domain 2120conf_table_reported=true 2121device_bus_width=8 2122device_rowbuffer_size=1024 2123devices_per_rank=8 2124eventq_index=0 2125in_addr_map=true 2126mem_sched_policy=frfcfs 2127null=false 2128page_policy=open 2129range=0:134217727 2130ranks_per_channel=2 2131read_buffer_size=32 2132static_backend_latency=10000 2133static_frontend_latency=10000 2134tBURST=5000 2135tCL=13750 2136tRAS=35000 2137tRCD=13750 2138tREFI=7800000 2139tRFC=300000 2140tRP=13750 2141tRRD=6250 2142tWTR=7500 2143tXAW=40000 2144write_buffer_size=32 2145write_high_thresh_perc=70 2146write_low_thresh_perc=0 2147port=system.membus.master[0] 2148 2149[system.toL2Bus] 2150type=CoherentBus 2151clk_domain=system.cpu_clk_domain 2152eventq_index=0 2153header_cycles=1 2154system=system 2155use_default_range=false 2156width=8 2157master=system.l2c.cpu_side 2158slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side 2159 2160[system.voltage_domain] 2161type=VoltageDomain 2162eventq_index=0 2163voltage=1.000000 2164 2165