config.ini revision 11312:3d7a85d71bd1
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[2] 40 41[system.clk_domain] 42type=SrcClockDomain 43children=voltage_domain 44clock=1000 45domain_id=-1 46eventq_index=0 47init_perf_level=0 48voltage_domain=system.clk_domain.voltage_domain 49 50[system.clk_domain.voltage_domain] 51type=VoltageDomain 52eventq_index=0 53voltage=1.000000 54 55[system.cpu] 56type=TimingSimpleCPU 57children=apic_clk_domain dcache dtb icache interrupts isa itb tracer workload 58branchPred=Null 59checker=Null 60clk_domain=system.clk_domain 61cpu_id=-1 62do_checkpoint_insts=true 63do_quiesce=true 64do_statistics_insts=true 65dtb=system.cpu.dtb 66eventq_index=0 67function_trace=false 68function_trace_start=0 69interrupts=system.cpu.interrupts 70isa=system.cpu.isa 71itb=system.cpu.itb 72max_insts_all_threads=0 73max_insts_any_thread=0 74max_loads_all_threads=0 75max_loads_any_thread=0 76numThreads=1 77profile=0 78progress_interval=0 79simpoint_start_insts= 80socket_id=0 81switched_out=false 82system=system 83tracer=system.cpu.tracer 84workload=system.cpu.workload 85dcache_port=system.cpu.dcache.cpu_side 86icache_port=system.cpu.icache.cpu_side 87 88[system.cpu.apic_clk_domain] 89type=DerivedClockDomain 90clk_divider=16 91clk_domain=system.clk_domain 92eventq_index=0 93 94[system.cpu.dcache] 95type=Cache 96children=tags 97addr_ranges=0:18446744073709551615 98assoc=2 99clk_domain=system.clk_domain 100clusivity=mostly_incl 101demand_mshr_reserve=1 102eventq_index=0 103forward_snoops=true 104hit_latency=2 105is_read_only=false 106max_miss_count=0 107mshrs=4 108prefetch_on_access=false 109prefetcher=Null 110response_latency=2 111sequential_access=false 112size=65536 113system=system 114tags=system.cpu.dcache.tags 115tgts_per_mshr=20 116write_buffers=8 117writeback_clean=false 118cpu_side=system.cpu.dcache_port 119mem_side=system.l2bus.slave[1] 120 121[system.cpu.dcache.tags] 122type=LRU 123assoc=2 124block_size=64 125clk_domain=system.clk_domain 126eventq_index=0 127hit_latency=2 128sequential_access=false 129size=65536 130 131[system.cpu.dtb] 132type=X86TLB 133children=walker 134eventq_index=0 135size=64 136walker=system.cpu.dtb.walker 137 138[system.cpu.dtb.walker] 139type=X86PagetableWalker 140clk_domain=system.clk_domain 141eventq_index=0 142num_squash_per_cycle=4 143system=system 144 145[system.cpu.icache] 146type=Cache 147children=tags 148addr_ranges=0:18446744073709551615 149assoc=2 150clk_domain=system.clk_domain 151clusivity=mostly_incl 152demand_mshr_reserve=1 153eventq_index=0 154forward_snoops=true 155hit_latency=2 156is_read_only=false 157max_miss_count=0 158mshrs=4 159prefetch_on_access=false 160prefetcher=Null 161response_latency=2 162sequential_access=false 163size=16384 164system=system 165tags=system.cpu.icache.tags 166tgts_per_mshr=20 167write_buffers=8 168writeback_clean=false 169cpu_side=system.cpu.icache_port 170mem_side=system.l2bus.slave[0] 171 172[system.cpu.icache.tags] 173type=LRU 174assoc=2 175block_size=64 176clk_domain=system.clk_domain 177eventq_index=0 178hit_latency=2 179sequential_access=false 180size=16384 181 182[system.cpu.interrupts] 183type=X86LocalApic 184clk_domain=system.cpu.apic_clk_domain 185eventq_index=0 186int_latency=1000 187pio_addr=2305843009213693952 188pio_latency=100000 189system=system 190int_master=system.membus.slave[1] 191int_slave=system.membus.master[1] 192pio=system.membus.master[0] 193 194[system.cpu.isa] 195type=X86ISA 196eventq_index=0 197 198[system.cpu.itb] 199type=X86TLB 200children=walker 201eventq_index=0 202size=64 203walker=system.cpu.itb.walker 204 205[system.cpu.itb.walker] 206type=X86PagetableWalker 207clk_domain=system.clk_domain 208eventq_index=0 209num_squash_per_cycle=4 210system=system 211 212[system.cpu.tracer] 213type=ExeTracer 214eventq_index=0 215 216[system.cpu.workload] 217type=LiveProcess 218cmd=tests/test-progs/hello/bin/x86/linux/hello 219cwd= 220drivers= 221egid=100 222env= 223errout=cerr 224euid=100 225eventq_index=0 226executable= 227gid=100 228input=cin 229kvmInSE=false 230max_stack_size=67108864 231output=cout 232pid=100 233ppid=99 234simpoint=0 235system=system 236uid=100 237useArchPT=false 238 239[system.dvfs_handler] 240type=DVFSHandler 241domains= 242enable=false 243eventq_index=0 244sys_clk_domain=system.clk_domain 245transition_latency=100000000 246 247[system.l2bus] 248type=CoherentXBar 249children=snoop_filter 250clk_domain=system.clk_domain 251eventq_index=0 252forward_latency=0 253frontend_latency=1 254response_latency=1 255snoop_filter=system.l2bus.snoop_filter 256snoop_response_latency=1 257system=system 258use_default_range=false 259width=32 260master=system.l2cache.cpu_side 261slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 262 263[system.l2bus.snoop_filter] 264type=SnoopFilter 265eventq_index=0 266lookup_latency=0 267max_capacity=8388608 268system=system 269 270[system.l2cache] 271type=Cache 272children=tags 273addr_ranges=0:18446744073709551615 274assoc=8 275clk_domain=system.clk_domain 276clusivity=mostly_incl 277demand_mshr_reserve=1 278eventq_index=0 279forward_snoops=true 280hit_latency=20 281is_read_only=false 282max_miss_count=0 283mshrs=20 284prefetch_on_access=false 285prefetcher=Null 286response_latency=20 287sequential_access=false 288size=262144 289system=system 290tags=system.l2cache.tags 291tgts_per_mshr=12 292write_buffers=8 293writeback_clean=false 294cpu_side=system.l2bus.master[0] 295mem_side=system.membus.slave[0] 296 297[system.l2cache.tags] 298type=LRU 299assoc=8 300block_size=64 301clk_domain=system.clk_domain 302eventq_index=0 303hit_latency=20 304sequential_access=false 305size=262144 306 307[system.mem_ctrl] 308type=DRAMCtrl 309IDD0=0.075000 310IDD02=0.000000 311IDD2N=0.050000 312IDD2N2=0.000000 313IDD2P0=0.000000 314IDD2P02=0.000000 315IDD2P1=0.000000 316IDD2P12=0.000000 317IDD3N=0.057000 318IDD3N2=0.000000 319IDD3P0=0.000000 320IDD3P02=0.000000 321IDD3P1=0.000000 322IDD3P12=0.000000 323IDD4R=0.187000 324IDD4R2=0.000000 325IDD4W=0.165000 326IDD4W2=0.000000 327IDD5=0.220000 328IDD52=0.000000 329IDD6=0.000000 330IDD62=0.000000 331VDD=1.500000 332VDD2=0.000000 333activation_limit=4 334addr_mapping=RoRaBaCoCh 335bank_groups_per_rank=0 336banks_per_rank=8 337burst_length=8 338channels=1 339clk_domain=system.clk_domain 340conf_table_reported=true 341device_bus_width=8 342device_rowbuffer_size=1024 343device_size=536870912 344devices_per_rank=8 345dll=true 346eventq_index=0 347in_addr_map=true 348max_accesses_per_row=16 349mem_sched_policy=frfcfs 350min_writes_per_switch=16 351null=false 352page_policy=open_adaptive 353range=0:536870911 354ranks_per_channel=2 355read_buffer_size=32 356static_backend_latency=10000 357static_frontend_latency=10000 358tBURST=5000 359tCCD_L=0 360tCK=1250 361tCL=13750 362tCS=2500 363tRAS=35000 364tRCD=13750 365tREFI=7800000 366tRFC=260000 367tRP=13750 368tRRD=6000 369tRRD_L=0 370tRTP=7500 371tRTW=2500 372tWR=15000 373tWTR=7500 374tXAW=30000 375tXP=0 376tXPDLL=0 377tXS=0 378tXSDLL=0 379write_buffer_size=64 380write_high_thresh_perc=85 381write_low_thresh_perc=50 382port=system.membus.master[2] 383 384[system.membus] 385type=CoherentXBar 386clk_domain=system.clk_domain 387eventq_index=0 388forward_latency=4 389frontend_latency=3 390response_latency=2 391snoop_filter=Null 392snoop_response_latency=4 393system=system 394use_default_range=false 395width=16 396master=system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.mem_ctrl.port 397slave=system.l2cache.mem_side system.cpu.interrupts.int_master system.system_port 398 399