config.ini revision 11680
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17default_p_state=UNDEFINED 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:536870911:0:0:0:0 27memories=system.mem_ctrl 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[1] 47 48[system.clk_domain] 49type=SrcClockDomain 50children=voltage_domain 51clock=1000 52domain_id=-1 53eventq_index=0 54init_perf_level=0 55voltage_domain=system.clk_domain.voltage_domain 56 57[system.clk_domain.voltage_domain] 58type=VoltageDomain 59eventq_index=0 60voltage=1.000000 61 62[system.cpu] 63type=TimingSimpleCPU 64children=dcache dtb icache interrupts isa itb tracer workload 65branchPred=Null 66checker=Null 67clk_domain=system.clk_domain 68cpu_id=-1 69default_p_state=UNDEFINED 70do_checkpoint_insts=true 71do_quiesce=true 72do_statistics_insts=true 73dtb=system.cpu.dtb 74eventq_index=0 75function_trace=false 76function_trace_start=0 77interrupts=system.cpu.interrupts 78isa=system.cpu.isa 79itb=system.cpu.itb 80max_insts_all_threads=0 81max_insts_any_thread=0 82max_loads_all_threads=0 83max_loads_any_thread=0 84numThreads=1 85p_state_clk_gate_bins=20 86p_state_clk_gate_max=1000000000000 87p_state_clk_gate_min=1000 88power_model=Null 89profile=0 90progress_interval=0 91simpoint_start_insts= 92socket_id=0 93switched_out=false 94system=system 95tracer=system.cpu.tracer 96workload=system.cpu.workload 97dcache_port=system.cpu.dcache.cpu_side 98icache_port=system.cpu.icache.cpu_side 99 100[system.cpu.dcache] 101type=Cache 102children=tags 103addr_ranges=0:18446744073709551615:0:0:0:0 104assoc=2 105clk_domain=system.clk_domain 106clusivity=mostly_incl 107default_p_state=UNDEFINED 108demand_mshr_reserve=1 109eventq_index=0 110hit_latency=2 111is_read_only=false 112max_miss_count=0 113mshrs=4 114p_state_clk_gate_bins=20 115p_state_clk_gate_max=1000000000000 116p_state_clk_gate_min=1000 117power_model=Null 118prefetch_on_access=false 119prefetcher=Null 120response_latency=2 121sequential_access=false 122size=65536 123system=system 124tags=system.cpu.dcache.tags 125tgts_per_mshr=20 126write_buffers=8 127writeback_clean=false 128cpu_side=system.cpu.dcache_port 129mem_side=system.l2bus.slave[1] 130 131[system.cpu.dcache.tags] 132type=LRU 133assoc=2 134block_size=64 135clk_domain=system.clk_domain 136default_p_state=UNDEFINED 137eventq_index=0 138hit_latency=2 139p_state_clk_gate_bins=20 140p_state_clk_gate_max=1000000000000 141p_state_clk_gate_min=1000 142power_model=Null 143sequential_access=false 144size=65536 145 146[system.cpu.dtb] 147type=SparcTLB 148eventq_index=0 149size=64 150 151[system.cpu.icache] 152type=Cache 153children=tags 154addr_ranges=0:18446744073709551615:0:0:0:0 155assoc=2 156clk_domain=system.clk_domain 157clusivity=mostly_incl 158default_p_state=UNDEFINED 159demand_mshr_reserve=1 160eventq_index=0 161hit_latency=2 162is_read_only=false 163max_miss_count=0 164mshrs=4 165p_state_clk_gate_bins=20 166p_state_clk_gate_max=1000000000000 167p_state_clk_gate_min=1000 168power_model=Null 169prefetch_on_access=false 170prefetcher=Null 171response_latency=2 172sequential_access=false 173size=16384 174system=system 175tags=system.cpu.icache.tags 176tgts_per_mshr=20 177write_buffers=8 178writeback_clean=false 179cpu_side=system.cpu.icache_port 180mem_side=system.l2bus.slave[0] 181 182[system.cpu.icache.tags] 183type=LRU 184assoc=2 185block_size=64 186clk_domain=system.clk_domain 187default_p_state=UNDEFINED 188eventq_index=0 189hit_latency=2 190p_state_clk_gate_bins=20 191p_state_clk_gate_max=1000000000000 192p_state_clk_gate_min=1000 193power_model=Null 194sequential_access=false 195size=16384 196 197[system.cpu.interrupts] 198type=SparcInterrupts 199eventq_index=0 200 201[system.cpu.isa] 202type=SparcISA 203eventq_index=0 204 205[system.cpu.itb] 206type=SparcTLB 207eventq_index=0 208size=64 209 210[system.cpu.tracer] 211type=ExeTracer 212eventq_index=0 213 214[system.cpu.workload] 215type=LiveProcess 216cmd=tests/test-progs/hello/bin/sparc/linux/hello 217cwd= 218drivers= 219egid=100 220env= 221errout=cerr 222euid=100 223eventq_index=0 224executable= 225gid=100 226input=cin 227kvmInSE=false 228max_stack_size=67108864 229output=cout 230pid=100 231ppid=99 232simpoint=0 233system=system 234uid=100 235useArchPT=false 236 237[system.dvfs_handler] 238type=DVFSHandler 239domains= 240enable=false 241eventq_index=0 242sys_clk_domain=system.clk_domain 243transition_latency=100000000 244 245[system.l2bus] 246type=CoherentXBar 247children=snoop_filter 248clk_domain=system.clk_domain 249default_p_state=UNDEFINED 250eventq_index=0 251forward_latency=0 252frontend_latency=1 253p_state_clk_gate_bins=20 254p_state_clk_gate_max=1000000000000 255p_state_clk_gate_min=1000 256point_of_coherency=false 257power_model=Null 258response_latency=1 259snoop_filter=system.l2bus.snoop_filter 260snoop_response_latency=1 261system=system 262use_default_range=false 263width=32 264master=system.l2cache.cpu_side 265slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 266 267[system.l2bus.snoop_filter] 268type=SnoopFilter 269eventq_index=0 270lookup_latency=0 271max_capacity=8388608 272system=system 273 274[system.l2cache] 275type=Cache 276children=tags 277addr_ranges=0:18446744073709551615:0:0:0:0 278assoc=8 279clk_domain=system.clk_domain 280clusivity=mostly_incl 281default_p_state=UNDEFINED 282demand_mshr_reserve=1 283eventq_index=0 284hit_latency=20 285is_read_only=false 286max_miss_count=0 287mshrs=20 288p_state_clk_gate_bins=20 289p_state_clk_gate_max=1000000000000 290p_state_clk_gate_min=1000 291power_model=Null 292prefetch_on_access=false 293prefetcher=Null 294response_latency=20 295sequential_access=false 296size=262144 297system=system 298tags=system.l2cache.tags 299tgts_per_mshr=12 300write_buffers=8 301writeback_clean=false 302cpu_side=system.l2bus.master[0] 303mem_side=system.membus.slave[0] 304 305[system.l2cache.tags] 306type=LRU 307assoc=8 308block_size=64 309clk_domain=system.clk_domain 310default_p_state=UNDEFINED 311eventq_index=0 312hit_latency=20 313p_state_clk_gate_bins=20 314p_state_clk_gate_max=1000000000000 315p_state_clk_gate_min=1000 316power_model=Null 317sequential_access=false 318size=262144 319 320[system.mem_ctrl] 321type=DRAMCtrl 322IDD0=0.055000 323IDD02=0.000000 324IDD2N=0.032000 325IDD2N2=0.000000 326IDD2P0=0.000000 327IDD2P02=0.000000 328IDD2P1=0.032000 329IDD2P12=0.000000 330IDD3N=0.038000 331IDD3N2=0.000000 332IDD3P0=0.000000 333IDD3P02=0.000000 334IDD3P1=0.038000 335IDD3P12=0.000000 336IDD4R=0.157000 337IDD4R2=0.000000 338IDD4W=0.125000 339IDD4W2=0.000000 340IDD5=0.235000 341IDD52=0.000000 342IDD6=0.020000 343IDD62=0.000000 344VDD=1.500000 345VDD2=0.000000 346activation_limit=4 347addr_mapping=RoRaBaCoCh 348bank_groups_per_rank=0 349banks_per_rank=8 350burst_length=8 351channels=1 352clk_domain=system.clk_domain 353conf_table_reported=true 354default_p_state=UNDEFINED 355device_bus_width=8 356device_rowbuffer_size=1024 357device_size=536870912 358devices_per_rank=8 359dll=true 360eventq_index=0 361in_addr_map=true 362kvm_map=true 363max_accesses_per_row=16 364mem_sched_policy=frfcfs 365min_writes_per_switch=16 366null=false 367p_state_clk_gate_bins=20 368p_state_clk_gate_max=1000000000000 369p_state_clk_gate_min=1000 370page_policy=open_adaptive 371power_model=Null 372range=0:536870911:0:0:0:0 373ranks_per_channel=2 374read_buffer_size=32 375static_backend_latency=10000 376static_frontend_latency=10000 377tBURST=5000 378tCCD_L=0 379tCK=1250 380tCL=13750 381tCS=2500 382tRAS=35000 383tRCD=13750 384tREFI=7800000 385tRFC=260000 386tRP=13750 387tRRD=6000 388tRRD_L=0 389tRTP=7500 390tRTW=2500 391tWR=15000 392tWTR=7500 393tXAW=30000 394tXP=6000 395tXPDLL=0 396tXS=270000 397tXSDLL=0 398write_buffer_size=64 399write_high_thresh_perc=85 400write_low_thresh_perc=50 401port=system.membus.master[0] 402 403[system.membus] 404type=CoherentXBar 405children=snoop_filter 406clk_domain=system.clk_domain 407default_p_state=UNDEFINED 408eventq_index=0 409forward_latency=4 410frontend_latency=3 411p_state_clk_gate_bins=20 412p_state_clk_gate_max=1000000000000 413p_state_clk_gate_min=1000 414point_of_coherency=true 415power_model=Null 416response_latency=2 417snoop_filter=system.membus.snoop_filter 418snoop_response_latency=4 419system=system 420use_default_range=false 421width=16 422master=system.mem_ctrl.port 423slave=system.l2cache.mem_side system.system_port 424 425[system.membus.snoop_filter] 426type=SnoopFilter 427eventq_index=0 428lookup_latency=1 429max_capacity=8388608 430system=system 431 432