config.ini revision 7935
12632Sstever@eecs.umich.edu[root] 22632Sstever@eecs.umich.edutype=Root 32632Sstever@eecs.umich.educhildren=system 42632Sstever@eecs.umich.edutime_sync_enable=false 52632Sstever@eecs.umich.edutime_sync_period=100000000000 62632Sstever@eecs.umich.edutime_sync_spin_threshold=100000000 72632Sstever@eecs.umich.edu 82632Sstever@eecs.umich.edu[system] 92632Sstever@eecs.umich.edutype=System 102632Sstever@eecs.umich.educhildren=cpu membus physmem 112632Sstever@eecs.umich.edumem_mode=atomic 122632Sstever@eecs.umich.eduphysmem=system.physmem 132632Sstever@eecs.umich.eduwork_begin_ckpt_count=0 142632Sstever@eecs.umich.eduwork_begin_cpu_id_exit=-1 152632Sstever@eecs.umich.eduwork_begin_exit_count=0 162632Sstever@eecs.umich.eduwork_cpus_ckpt_count=0 172632Sstever@eecs.umich.eduwork_end_ckpt_count=0 182632Sstever@eecs.umich.eduwork_end_exit_count=0 192632Sstever@eecs.umich.eduwork_item_id=-1 202632Sstever@eecs.umich.edu 212632Sstever@eecs.umich.edu[system.cpu] 222632Sstever@eecs.umich.edutype=TimingSimpleCPU 232632Sstever@eecs.umich.educhildren=dcache dtb icache itb l2cache toL2Bus tracer workload 242632Sstever@eecs.umich.educhecker=Null 252632Sstever@eecs.umich.educlock=500 262632Sstever@eecs.umich.educpu_id=0 272632Sstever@eecs.umich.edudefer_registration=false 282632Sstever@eecs.umich.edudo_checkpoint_insts=true 292632Sstever@eecs.umich.edudo_statistics_insts=true 302632Sstever@eecs.umich.edudtb=system.cpu.dtb 3112SN/Afunction_trace=false 3212SN/Afunction_trace_start=0 3312SN/Aitb=system.cpu.itb 3412SN/Amax_insts_all_threads=0 3512SN/Amax_insts_any_thread=0 3612SN/Amax_loads_all_threads=0 3712SN/Amax_loads_any_thread=0 3812SN/AnumThreads=1 3912SN/Aphase=0 4012SN/Aprogress_interval=0 4112SN/Asystem=system 4212SN/Atracer=system.cpu.tracer 4312SN/Aworkload=system.cpu.workload 4412SN/Adcache_port=system.cpu.dcache.cpu_side 4512SN/Aicache_port=system.cpu.icache.cpu_side 4612SN/A 4712SN/A[system.cpu.dcache] 4812SN/Atype=BaseCache 4912SN/Aaddr_range=0:18446744073709551615 5012SN/Aassoc=2 5112SN/Ablock_size=64 5212SN/Aforward_snoops=true 5312SN/Ahash_delay=1 5412SN/Alatency=1000 5512SN/Amax_miss_count=0 5612SN/Amshrs=10 5712SN/Anum_cpus=1 5812SN/Aprefetch_data_accesses_only=false 5912SN/Aprefetch_degree=1 6012SN/Aprefetch_latency=10000 6112SN/Aprefetch_on_access=false 6212SN/Aprefetch_past_page=false 6312SN/Aprefetch_policy=none 6412SN/Aprefetch_serial_squash=false 6512SN/Aprefetch_use_cpu_id=true 6612SN/Aprefetcher_size=100 6712SN/AprioritizeRequests=false 685543Ssaidi@eecs.umich.edurepl=Null 6912SN/Asize=262144 7012SN/Asubblock_size=0 7112SN/Atgts_per_mshr=5 7212SN/Atrace_addr=0 7312SN/Atwo_queue=false 7412SN/Awrite_buffers=8 7512SN/Acpu_side=system.cpu.dcache_port 7612SN/Amem_side=system.cpu.toL2Bus.port[1] 7712SN/A 7812SN/A[system.cpu.dtb] 795543Ssaidi@eecs.umich.edutype=SparcTLB 805543Ssaidi@eecs.umich.edusize=64 815543Ssaidi@eecs.umich.edu 825543Ssaidi@eecs.umich.edu[system.cpu.icache] 835543Ssaidi@eecs.umich.edutype=BaseCache 845543Ssaidi@eecs.umich.eduaddr_range=0:18446744073709551615 855543Ssaidi@eecs.umich.eduassoc=2 8612SN/Ablock_size=64 8712SN/Aforward_snoops=true 8812SN/Ahash_delay=1 8912SN/Alatency=1000 9012SN/Amax_miss_count=0 9112SN/Amshrs=10 9212SN/Anum_cpus=1 9312SN/Aprefetch_data_accesses_only=false 9412SN/Aprefetch_degree=1 9512SN/Aprefetch_latency=10000 9612SN/Aprefetch_on_access=false 9712SN/Aprefetch_past_page=false 9812SN/Aprefetch_policy=none 9912SN/Aprefetch_serial_squash=false 1005543Ssaidi@eecs.umich.eduprefetch_use_cpu_id=true 1015543Ssaidi@eecs.umich.eduprefetcher_size=100 1025543Ssaidi@eecs.umich.eduprioritizeRequests=false 1035543Ssaidi@eecs.umich.edurepl=Null 1045543Ssaidi@eecs.umich.edusize=131072 1055543Ssaidi@eecs.umich.edusubblock_size=0 1065543Ssaidi@eecs.umich.edutgts_per_mshr=5 1075543Ssaidi@eecs.umich.edutrace_addr=0 1085543Ssaidi@eecs.umich.edutwo_queue=false 1095543Ssaidi@eecs.umich.eduwrite_buffers=8 1105543Ssaidi@eecs.umich.educpu_side=system.cpu.icache_port 1115543Ssaidi@eecs.umich.edumem_side=system.cpu.toL2Bus.port[0] 1125543Ssaidi@eecs.umich.edu 1135543Ssaidi@eecs.umich.edu[system.cpu.itb] 1145543Ssaidi@eecs.umich.edutype=SparcTLB 1155543Ssaidi@eecs.umich.edusize=64 1165543Ssaidi@eecs.umich.edu 1175543Ssaidi@eecs.umich.edu[system.cpu.l2cache] 1185543Ssaidi@eecs.umich.edutype=BaseCache 1195543Ssaidi@eecs.umich.eduaddr_range=0:18446744073709551615 1205543Ssaidi@eecs.umich.eduassoc=2 1215543Ssaidi@eecs.umich.edublock_size=64 1225543Ssaidi@eecs.umich.eduforward_snoops=true 1235543Ssaidi@eecs.umich.eduhash_delay=1 1245543Ssaidi@eecs.umich.edulatency=10000 12512SN/Amax_miss_count=0 12612SN/Amshrs=10 12712SN/Anum_cpus=1 12812SN/Aprefetch_data_accesses_only=false 12912SN/Aprefetch_degree=1 13012SN/Aprefetch_latency=100000 13112SN/Aprefetch_on_access=false 13212SN/Aprefetch_past_page=false 13312SN/Aprefetch_policy=none 13412SN/Aprefetch_serial_squash=false 13512SN/Aprefetch_use_cpu_id=true 13612SN/Aprefetcher_size=100 13712SN/AprioritizeRequests=false 13812SN/Arepl=Null 13912SN/Asize=2097152 14012SN/Asubblock_size=0 1415543Ssaidi@eecs.umich.edutgts_per_mshr=5 14212SN/Atrace_addr=0 14312SN/Atwo_queue=false 14412SN/Awrite_buffers=8 14512SN/Acpu_side=system.cpu.toL2Bus.port[2] 14612SN/Amem_side=system.membus.port[1] 14712SN/A 1485543Ssaidi@eecs.umich.edu[system.cpu.toL2Bus] 1495543Ssaidi@eecs.umich.edutype=Bus 1505543Ssaidi@eecs.umich.edublock_size=64 1515543Ssaidi@eecs.umich.edubus_id=0 1525543Ssaidi@eecs.umich.educlock=1000 1535543Ssaidi@eecs.umich.eduheader_cycles=1 1545543Ssaidi@eecs.umich.eduuse_default_range=false 1555543Ssaidi@eecs.umich.eduwidth=64 1565543Ssaidi@eecs.umich.eduport=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 1575543Ssaidi@eecs.umich.edu 1585543Ssaidi@eecs.umich.edu[system.cpu.tracer] 1595543Ssaidi@eecs.umich.edutype=ExeTracer 1605543Ssaidi@eecs.umich.edu 1615543Ssaidi@eecs.umich.edu[system.cpu.workload] 1625543Ssaidi@eecs.umich.edutype=LiveProcess 1635543Ssaidi@eecs.umich.educmd=insttest 1645543Ssaidi@eecs.umich.educwd= 1655543Ssaidi@eecs.umich.eduegid=100 1665543Ssaidi@eecs.umich.eduenv= 1675543Ssaidi@eecs.umich.eduerrout=cerr 1685543Ssaidi@eecs.umich.edueuid=100 16912SN/Aexecutable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest 1705543Ssaidi@eecs.umich.edugid=100 1715543Ssaidi@eecs.umich.eduinput=cin 17212SN/Amax_stack_size=67108864 1735543Ssaidi@eecs.umich.eduoutput=cout 17412SN/Apid=100 17512SN/Appid=99 17612SN/Asimpoint=0 17712SN/Asystem=system 17812SN/Auid=100 17912SN/A 18012SN/A[system.membus] 18112SN/Atype=Bus 18212SN/Ablock_size=64 18312SN/Abus_id=0 18412SN/Aclock=1000 18512SN/Aheader_cycles=1 18612SN/Ause_default_range=false 18712SN/Awidth=64 18812SN/Aport=system.physmem.port[0] system.cpu.l2cache.mem_side 18912SN/A 19012SN/A[system.physmem] 19112SN/Atype=PhysicalMemory 1925543Ssaidi@eecs.umich.edufile= 1935543Ssaidi@eecs.umich.edulatency=30000 1945543Ssaidi@eecs.umich.edulatency_var=0 1955543Ssaidi@eecs.umich.edunull=false 1965543Ssaidi@eecs.umich.edurange=0:134217727 1975543Ssaidi@eecs.umich.eduzero=false 1985543Ssaidi@eecs.umich.eduport=system.membus.port[0] 1995543Ssaidi@eecs.umich.edu 2005543Ssaidi@eecs.umich.edu