config.ini revision 4355
1[root] 2type=Root 3children=system 4dummy=0 5 6[system] 7type=System 8children=cpu membus physmem 9mem_mode=atomic 10physmem=system.physmem 11 12[system.cpu] 13type=DerivO3CPU 14children=dcache fuPool icache l2cache toL2Bus workload 15BTBEntries=4096 16BTBTagSize=16 17LFSTSize=1024 18LQEntries=32 19RASSize=16 20SQEntries=32 21SSITSize=1024 22activity=0 23backComSize=5 24choiceCtrBits=2 25choicePredictorSize=8192 26clock=1 27commitToDecodeDelay=1 28commitToFetchDelay=1 29commitToIEWDelay=1 30commitToRenameDelay=1 31commitWidth=8 32cpu_id=0 33decodeToFetchDelay=1 34decodeToRenameDelay=1 35decodeWidth=8 36defer_registration=false 37dispatchWidth=8 38fetchToDecodeDelay=1 39fetchTrapLatency=1 40fetchWidth=8 41forwardComSize=5 42fuPool=system.cpu.fuPool 43function_trace=false 44function_trace_start=0 45globalCtrBits=2 46globalHistoryBits=13 47globalPredictorSize=8192 48iewToCommitDelay=1 49iewToDecodeDelay=1 50iewToFetchDelay=1 51iewToRenameDelay=1 52instShiftAmt=2 53issueToExecuteDelay=1 54issueWidth=8 55localCtrBits=2 56localHistoryBits=11 57localHistoryTableSize=2048 58localPredictorSize=2048 59max_insts_all_threads=0 60max_insts_any_thread=0 61max_loads_all_threads=0 62max_loads_any_thread=0 63numIQEntries=64 64numPhysFloatRegs=256 65numPhysIntRegs=256 66numROBEntries=192 67numRobs=1 68numThreads=1 69phase=0 70predType=tournament 71progress_interval=0 72renameToDecodeDelay=1 73renameToFetchDelay=1 74renameToIEWDelay=2 75renameToROBDelay=1 76renameWidth=8 77squashWidth=8 78system=system 79trapLatency=13 80wbDepth=1 81wbWidth=8 82workload=system.cpu.workload 83dcache_port=system.cpu.dcache.cpu_side 84icache_port=system.cpu.icache.cpu_side 85 86[system.cpu.dcache] 87type=BaseCache 88adaptive_compression=false 89assoc=2 90block_size=64 91compressed_bus=false 92compression_latency=0 93hash_delay=1 94hit_latency=1 95latency=1 96lifo=false 97max_miss_count=0 98mshrs=10 99prefetch_access=false 100prefetch_cache_check_push=true 101prefetch_data_accesses_only=false 102prefetch_degree=1 103prefetch_latency=10 104prefetch_miss=false 105prefetch_past_page=false 106prefetch_policy=none 107prefetch_serial_squash=false 108prefetch_use_cpu_id=true 109prefetcher_size=100 110prioritizeRequests=false 111protocol=Null 112repl=Null 113size=262144 114split=false 115split_size=0 116store_compressed=false 117subblock_size=0 118tgts_per_mshr=20 119trace_addr=0 120two_queue=false 121write_buffers=8 122cpu_side=system.cpu.dcache_port 123mem_side=system.cpu.toL2Bus.port[1] 124 125[system.cpu.fuPool] 126type=FUPool 127children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 128FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 129 130[system.cpu.fuPool.FUList0] 131type=FUDesc 132children=opList0 133count=6 134opList=system.cpu.fuPool.FUList0.opList0 135 136[system.cpu.fuPool.FUList0.opList0] 137type=OpDesc 138issueLat=1 139opClass=IntAlu 140opLat=1 141 142[system.cpu.fuPool.FUList1] 143type=FUDesc 144children=opList0 opList1 145count=2 146opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 147 148[system.cpu.fuPool.FUList1.opList0] 149type=OpDesc 150issueLat=1 151opClass=IntMult 152opLat=3 153 154[system.cpu.fuPool.FUList1.opList1] 155type=OpDesc 156issueLat=19 157opClass=IntDiv 158opLat=20 159 160[system.cpu.fuPool.FUList2] 161type=FUDesc 162children=opList0 opList1 opList2 163count=4 164opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 165 166[system.cpu.fuPool.FUList2.opList0] 167type=OpDesc 168issueLat=1 169opClass=FloatAdd 170opLat=2 171 172[system.cpu.fuPool.FUList2.opList1] 173type=OpDesc 174issueLat=1 175opClass=FloatCmp 176opLat=2 177 178[system.cpu.fuPool.FUList2.opList2] 179type=OpDesc 180issueLat=1 181opClass=FloatCvt 182opLat=2 183 184[system.cpu.fuPool.FUList3] 185type=FUDesc 186children=opList0 opList1 opList2 187count=2 188opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 189 190[system.cpu.fuPool.FUList3.opList0] 191type=OpDesc 192issueLat=1 193opClass=FloatMult 194opLat=4 195 196[system.cpu.fuPool.FUList3.opList1] 197type=OpDesc 198issueLat=12 199opClass=FloatDiv 200opLat=12 201 202[system.cpu.fuPool.FUList3.opList2] 203type=OpDesc 204issueLat=24 205opClass=FloatSqrt 206opLat=24 207 208[system.cpu.fuPool.FUList4] 209type=FUDesc 210children=opList0 211count=0 212opList=system.cpu.fuPool.FUList4.opList0 213 214[system.cpu.fuPool.FUList4.opList0] 215type=OpDesc 216issueLat=1 217opClass=MemRead 218opLat=1 219 220[system.cpu.fuPool.FUList5] 221type=FUDesc 222children=opList0 223count=0 224opList=system.cpu.fuPool.FUList5.opList0 225 226[system.cpu.fuPool.FUList5.opList0] 227type=OpDesc 228issueLat=1 229opClass=MemWrite 230opLat=1 231 232[system.cpu.fuPool.FUList6] 233type=FUDesc 234children=opList0 opList1 235count=4 236opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1 237 238[system.cpu.fuPool.FUList6.opList0] 239type=OpDesc 240issueLat=1 241opClass=MemRead 242opLat=1 243 244[system.cpu.fuPool.FUList6.opList1] 245type=OpDesc 246issueLat=1 247opClass=MemWrite 248opLat=1 249 250[system.cpu.fuPool.FUList7] 251type=FUDesc 252children=opList0 253count=1 254opList=system.cpu.fuPool.FUList7.opList0 255 256[system.cpu.fuPool.FUList7.opList0] 257type=OpDesc 258issueLat=3 259opClass=IprAccess 260opLat=3 261 262[system.cpu.icache] 263type=BaseCache 264adaptive_compression=false 265assoc=2 266block_size=64 267compressed_bus=false 268compression_latency=0 269hash_delay=1 270hit_latency=1 271latency=1 272lifo=false 273max_miss_count=0 274mshrs=10 275prefetch_access=false 276prefetch_cache_check_push=true 277prefetch_data_accesses_only=false 278prefetch_degree=1 279prefetch_latency=10 280prefetch_miss=false 281prefetch_past_page=false 282prefetch_policy=none 283prefetch_serial_squash=false 284prefetch_use_cpu_id=true 285prefetcher_size=100 286prioritizeRequests=false 287protocol=Null 288repl=Null 289size=131072 290split=false 291split_size=0 292store_compressed=false 293subblock_size=0 294tgts_per_mshr=20 295trace_addr=0 296two_queue=false 297write_buffers=8 298cpu_side=system.cpu.icache_port 299mem_side=system.cpu.toL2Bus.port[0] 300 301[system.cpu.l2cache] 302type=BaseCache 303adaptive_compression=false 304assoc=2 305block_size=64 306compressed_bus=false 307compression_latency=0 308hash_delay=1 309hit_latency=1 310latency=1 311lifo=false 312max_miss_count=0 313mshrs=10 314prefetch_access=false 315prefetch_cache_check_push=true 316prefetch_data_accesses_only=false 317prefetch_degree=1 318prefetch_latency=10 319prefetch_miss=false 320prefetch_past_page=false 321prefetch_policy=none 322prefetch_serial_squash=false 323prefetch_use_cpu_id=true 324prefetcher_size=100 325prioritizeRequests=false 326protocol=Null 327repl=Null 328size=2097152 329split=false 330split_size=0 331store_compressed=false 332subblock_size=0 333tgts_per_mshr=5 334trace_addr=0 335two_queue=false 336write_buffers=8 337cpu_side=system.cpu.toL2Bus.port[2] 338mem_side=system.membus.port[1] 339 340[system.cpu.toL2Bus] 341type=Bus 342bus_id=0 343clock=1000 344responder_set=false 345width=64 346port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 347 348[system.cpu.workload] 349type=LiveProcess 350cmd=insttest 351cwd= 352egid=100 353env= 354euid=100 355executable=tests/test-progs/insttest/bin/sparc/linux/insttest 356gid=100 357input=cin 358output=cout 359pid=100 360ppid=99 361system=system 362uid=100 363 364[system.membus] 365type=Bus 366bus_id=0 367clock=1000 368responder_set=false 369width=64 370port=system.physmem.port system.cpu.l2cache.mem_side 371 372[system.physmem] 373type=PhysicalMemory 374file= 375latency=1 376range=0:134217727 377zero=false 378port=system.membus.port[0] 379 380