stats.txt revision 11731
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.001842 # Number of seconds simulated 4sim_ticks 1841805 # Number of ticks simulated 5final_tick 1841805 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_inst_rate 30529 # Simulator instruction rate (inst/s) 8host_op_rate 30529 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 496310 # Simulator tick rate (ticks/s) 10host_mem_usage 411128 # Number of bytes of host memory used 11host_seconds 3.71 # Real time elapsed on the host 12sim_insts 113291 # Number of instructions simulated 13sim_ops 113291 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 1901888 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 1901888 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 1901632 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 1901632 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 29717 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 29717 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 29713 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 29713 # Number of write requests responded to by this memory 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 1032621803 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 1032621803 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 1032482809 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 1032482809 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 2065104612 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 2065104612 # Total bandwidth to/from this memory (bytes/s) 31system.mem_ctrls.readReqs 29717 # Number of read requests accepted 32system.mem_ctrls.writeReqs 29713 # Number of write requests accepted 33system.mem_ctrls.readBursts 29717 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 29713 # Number of DRAM write bursts, including those merged in the write queue 35system.mem_ctrls.bytesReadDRAM 810816 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 1091072 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 842496 # Total number of bytes written to DRAM 38system.mem_ctrls.bytesReadSys 1901888 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 1901632 # Total written bytes from the system interface side 40system.mem_ctrls.servicedByWrQ 17048 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 16517 # Number of DRAM write bursts merged with an existing one 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 43system.mem_ctrls.perBankRdBursts::0 1366 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::1 3 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::2 241 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::3 400 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 244 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 371 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::6 334 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 67 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 341 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 2380 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 1301 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 1236 # Per bank write bursts 55system.mem_ctrls.perBankRdBursts::12 1592 # Per bank write bursts 56system.mem_ctrls.perBankRdBursts::13 483 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::14 2223 # Per bank write bursts 58system.mem_ctrls.perBankRdBursts::15 87 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::0 1405 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::1 3 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::2 241 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::3 412 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::4 257 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::5 383 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 346 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 69 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 351 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::9 2448 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::10 1316 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 1275 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::12 1634 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::13 505 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::14 2424 # Per bank write bursts 74system.mem_ctrls.perBankWrBursts::15 95 # Per bank write bursts 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 77system.mem_ctrls.totGap 1841733 # Total gap between requests 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 29717 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 29713 # Write request sizes (log2) 92system.mem_ctrls.rdQLenPdf::0 12669 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 117system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 118system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 119system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 120system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 121system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 122system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 123system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::15 104 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::16 124 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 715 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::18 812 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 810 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::20 826 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 868 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 857 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 811 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 806 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 806 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 807 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 806 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 806 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 806 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 806 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 806 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 805 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 188system.mem_ctrls.bytesPerActivate::samples 4235 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 390.135537 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 255.090286 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 338.320461 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 828 19.55% 19.55% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 1136 26.82% 46.38% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 580 13.70% 60.07% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 361 8.52% 68.60% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 278 6.56% 75.16% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 169 3.99% 79.15% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 146 3.45% 82.60% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 150 3.54% 86.14% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 587 13.86% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 4235 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 805 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 15.719255 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.645655 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 1.595450 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 50 6.21% 6.21% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 309 38.39% 44.60% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 373 46.34% 90.93% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 65 8.07% 99.01% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::20-21 7 0.87% 99.88% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::36-37 1 0.12% 100.00% # Reads before turning the bus around for writes 212system.mem_ctrls.rdPerTurnAround::total 805 # Reads before turning the bus around for writes 213system.mem_ctrls.wrPerTurnAround::samples 805 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::mean 16.352795 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::gmean 16.329834 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::stdev 0.903150 # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::16 691 85.84% 85.84% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::17 4 0.50% 86.34% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::18 56 6.96% 93.29% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::19 48 5.96% 99.25% # Writes before turning the bus around for reads 221system.mem_ctrls.wrPerTurnAround::20 6 0.75% 100.00% # Writes before turning the bus around for reads 222system.mem_ctrls.wrPerTurnAround::total 805 # Writes before turning the bus around for reads 223system.mem_ctrls.totQLat 239535 # Total ticks spent queuing 224system.mem_ctrls.totMemAccLat 480246 # Total ticks spent from burst creation until serviced by the DRAM 225system.mem_ctrls.totBusLat 63345 # Total ticks spent in databus transfers 226system.mem_ctrls.avgQLat 18.91 # Average queueing delay per DRAM burst 227system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 228system.mem_ctrls.avgMemAccLat 37.91 # Average memory access latency per DRAM burst 229system.mem_ctrls.avgRdBW 440.23 # Average DRAM read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBW 457.43 # Average achieved write bandwidth in MiByte/s 231system.mem_ctrls.avgRdBWSys 1032.62 # Average system read bandwidth in MiByte/s 232system.mem_ctrls.avgWrBWSys 1032.48 # Average system write bandwidth in MiByte/s 233system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 234system.mem_ctrls.busUtil 7.01 # Data bus utilization in percentage 235system.mem_ctrls.busUtilRead 3.44 # Data bus utilization in percentage for reads 236system.mem_ctrls.busUtilWrite 3.57 # Data bus utilization in percentage for writes 237system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing 238system.mem_ctrls.avgWrQLen 25.93 # Average write queue length when enqueuing 239system.mem_ctrls.readRowHits 9468 # Number of row buffer hits during reads 240system.mem_ctrls.writeRowHits 12124 # Number of row buffer hits during writes 241system.mem_ctrls.readRowHitRate 74.73 # Row buffer hit rate for reads 242system.mem_ctrls.writeRowHitRate 91.88 # Row buffer hit rate for writes 243system.mem_ctrls.avgGap 30.99 # Average gap between requests 244system.mem_ctrls.pageHitRate 83.48 # Row buffer hit rate, read and write combined 245system.mem_ctrls_0.actEnergy 10074540 # Energy for activate commands per rank (pJ) 246system.mem_ctrls_0.preEnergy 5448240 # Energy for precharge commands per rank (pJ) 247system.mem_ctrls_0.readEnergy 34569024 # Energy for read commands per rank (pJ) 248system.mem_ctrls_0.writeEnergy 26024832 # Energy for write commands per rank (pJ) 249system.mem_ctrls_0.refreshEnergy 127230480.000000 # Energy for refresh commands per rank (pJ) 250system.mem_ctrls_0.actBackEnergy 197709288 # Energy for active background per rank (pJ) 251system.mem_ctrls_0.preBackEnergy 3259392 # Energy for precharge background per rank (pJ) 252system.mem_ctrls_0.actPowerDownEnergy 446690304 # Energy for active power-down per rank (pJ) 253system.mem_ctrls_0.prePowerDownEnergy 61497984 # Energy for precharge power-down per rank (pJ) 254system.mem_ctrls_0.selfRefreshEnergy 65163360 # Energy for self refresh per rank (pJ) 255system.mem_ctrls_0.totalEnergy 977667444 # Total energy per rank (pJ) 256system.mem_ctrls_0.averagePower 530.820279 # Core power per rank (mW) 257system.mem_ctrls_0.totalIdleTime 1399707 # Total Idle time Per DRAM Rank 258system.mem_ctrls_0.memoryStateTime::IDLE 2653 # Time in different power states 259system.mem_ctrls_0.memoryStateTime::REF 53850 # Time in different power states 260system.mem_ctrls_0.memoryStateTime::SREF 260009 # Time in different power states 261system.mem_ctrls_0.memoryStateTime::PRE_PDN 160151 # Time in different power states 262system.mem_ctrls_0.memoryStateTime::ACT 385558 # Time in different power states 263system.mem_ctrls_0.memoryStateTime::ACT_PDN 979584 # Time in different power states 264system.mem_ctrls_1.actEnergy 20206200 # Energy for activate commands per rank (pJ) 265system.mem_ctrls_1.preEnergy 10915800 # Energy for precharge commands per rank (pJ) 266system.mem_ctrls_1.readEnergy 110161632 # Energy for read commands per rank (pJ) 267system.mem_ctrls_1.writeEnergy 83920896 # Energy for write commands per rank (pJ) 268system.mem_ctrls_1.refreshEnergy 145055040.000000 # Energy for refresh commands per rank (pJ) 269system.mem_ctrls_1.actBackEnergy 217978032 # Energy for active background per rank (pJ) 270system.mem_ctrls_1.preBackEnergy 3880704 # Energy for precharge background per rank (pJ) 271system.mem_ctrls_1.actPowerDownEnergy 529686864 # Energy for active power-down per rank (pJ) 272system.mem_ctrls_1.prePowerDownEnergy 51989376 # Energy for precharge power-down per rank (pJ) 273system.mem_ctrls_1.selfRefreshEnergy 18024480 # Energy for self refresh per rank (pJ) 274system.mem_ctrls_1.totalEnergy 1191819024 # Total energy per rank (pJ) 275system.mem_ctrls_1.averagePower 647.092946 # Core power per rank (mW) 276system.mem_ctrls_1.totalIdleTime 1353468 # Total Idle time Per DRAM Rank 277system.mem_ctrls_1.memoryStateTime::IDLE 3236 # Time in different power states 278system.mem_ctrls_1.memoryStateTime::REF 61408 # Time in different power states 279system.mem_ctrls_1.memoryStateTime::SREF 56694 # Time in different power states 280system.mem_ctrls_1.memoryStateTime::PRE_PDN 135389 # Time in different power states 281system.mem_ctrls_1.memoryStateTime::ACT 423484 # Time in different power states 282system.mem_ctrls_1.memoryStateTime::ACT_PDN 1161594 # Time in different power states 283system.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 284system.cpu.clk_domain.clock 1 # Clock period in ticks 285system.cpu.dtb.read_hits 0 # DTB read hits 286system.cpu.dtb.read_misses 0 # DTB read misses 287system.cpu.dtb.read_accesses 0 # DTB read accesses 288system.cpu.dtb.write_hits 0 # DTB write hits 289system.cpu.dtb.write_misses 0 # DTB write misses 290system.cpu.dtb.write_accesses 0 # DTB write accesses 291system.cpu.dtb.hits 0 # DTB hits 292system.cpu.dtb.misses 0 # DTB misses 293system.cpu.dtb.accesses 0 # DTB accesses 294system.cpu.itb.read_hits 0 # DTB read hits 295system.cpu.itb.read_misses 0 # DTB read misses 296system.cpu.itb.read_accesses 0 # DTB read accesses 297system.cpu.itb.write_hits 0 # DTB write hits 298system.cpu.itb.write_misses 0 # DTB write misses 299system.cpu.itb.write_accesses 0 # DTB write accesses 300system.cpu.itb.hits 0 # DTB hits 301system.cpu.itb.misses 0 # DTB misses 302system.cpu.itb.accesses 0 # DTB accesses 303system.cpu.workload.num_syscalls 45 # Number of system calls 304system.cpu.pwrStateResidencyTicks::ON 1841805 # Cumulative time (in ticks) in various power states 305system.cpu.numCycles 1841805 # number of cpu cycles simulated 306system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 307system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 308system.cpu.committedInsts 113291 # Number of instructions committed 309system.cpu.committedOps 113291 # Number of ops (including micro ops) committed 310system.cpu.num_int_alu_accesses 113292 # Number of integer alu accesses 311system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 312system.cpu.num_func_calls 8529 # number of times a function call or return occured 313system.cpu.num_conditional_control_insts 17391 # number of instructions that are conditional controls 314system.cpu.num_int_insts 113292 # number of integer instructions 315system.cpu.num_fp_insts 0 # number of float instructions 316system.cpu.num_int_register_reads 151096 # number of times the integer registers were read 317system.cpu.num_int_register_writes 76188 # number of times the integer registers were written 318system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 319system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 320system.cpu.num_mem_refs 43493 # number of memory refs 321system.cpu.num_load_insts 23780 # Number of load instructions 322system.cpu.num_store_insts 19713 # Number of store instructions 323system.cpu.num_idle_cycles 0 # Number of idle cycles 324system.cpu.num_busy_cycles 1841805 # Number of busy cycles 325system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 326system.cpu.idle_fraction 0 # Percentage of idle cycles 327system.cpu.Branches 25920 # Number of branches fetched 328system.cpu.op_class::No_OpClass 45 0.04% 0.04% # Class of executed instruction 329system.cpu.op_class::IntAlu 69651 61.45% 61.49% # Class of executed instruction 330system.cpu.op_class::IntMult 122 0.11% 61.60% # Class of executed instruction 331system.cpu.op_class::IntDiv 26 0.02% 61.63% # Class of executed instruction 332system.cpu.op_class::FloatAdd 0 0.00% 61.63% # Class of executed instruction 333system.cpu.op_class::FloatCmp 0 0.00% 61.63% # Class of executed instruction 334system.cpu.op_class::FloatCvt 0 0.00% 61.63% # Class of executed instruction 335system.cpu.op_class::FloatMult 0 0.00% 61.63% # Class of executed instruction 336system.cpu.op_class::FloatMultAcc 0 0.00% 61.63% # Class of executed instruction 337system.cpu.op_class::FloatDiv 0 0.00% 61.63% # Class of executed instruction 338system.cpu.op_class::FloatMisc 0 0.00% 61.63% # Class of executed instruction 339system.cpu.op_class::FloatSqrt 0 0.00% 61.63% # Class of executed instruction 340system.cpu.op_class::SimdAdd 0 0.00% 61.63% # Class of executed instruction 341system.cpu.op_class::SimdAddAcc 0 0.00% 61.63% # Class of executed instruction 342system.cpu.op_class::SimdAlu 0 0.00% 61.63% # Class of executed instruction 343system.cpu.op_class::SimdCmp 0 0.00% 61.63% # Class of executed instruction 344system.cpu.op_class::SimdCvt 0 0.00% 61.63% # Class of executed instruction 345system.cpu.op_class::SimdMisc 0 0.00% 61.63% # Class of executed instruction 346system.cpu.op_class::SimdMult 0 0.00% 61.63% # Class of executed instruction 347system.cpu.op_class::SimdMultAcc 0 0.00% 61.63% # Class of executed instruction 348system.cpu.op_class::SimdShift 0 0.00% 61.63% # Class of executed instruction 349system.cpu.op_class::SimdShiftAcc 0 0.00% 61.63% # Class of executed instruction 350system.cpu.op_class::SimdSqrt 0 0.00% 61.63% # Class of executed instruction 351system.cpu.op_class::SimdFloatAdd 0 0.00% 61.63% # Class of executed instruction 352system.cpu.op_class::SimdFloatAlu 0 0.00% 61.63% # Class of executed instruction 353system.cpu.op_class::SimdFloatCmp 0 0.00% 61.63% # Class of executed instruction 354system.cpu.op_class::SimdFloatCvt 0 0.00% 61.63% # Class of executed instruction 355system.cpu.op_class::SimdFloatDiv 0 0.00% 61.63% # Class of executed instruction 356system.cpu.op_class::SimdFloatMisc 0 0.00% 61.63% # Class of executed instruction 357system.cpu.op_class::SimdFloatMult 0 0.00% 61.63% # Class of executed instruction 358system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.63% # Class of executed instruction 359system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.63% # Class of executed instruction 360system.cpu.op_class::MemRead 23780 20.98% 82.61% # Class of executed instruction 361system.cpu.op_class::MemWrite 19713 17.39% 100.00% # Class of executed instruction 362system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction 363system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction 364system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 365system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 366system.cpu.op_class::total 113337 # Class of executed instruction 367system.ruby.clk_domain.clock 1 # Clock period in ticks 368system.ruby.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 369system.ruby.delayHist::bucket_size 1 # delay histogram for all message 370system.ruby.delayHist::max_bucket 9 # delay histogram for all message 371system.ruby.delayHist::samples 59430 # delay histogram for all message 372system.ruby.delayHist | 59430 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 373system.ruby.delayHist::total 59430 # delay histogram for all message 374system.ruby.outstanding_req_hist_seqr::bucket_size 1 375system.ruby.outstanding_req_hist_seqr::max_bucket 9 376system.ruby.outstanding_req_hist_seqr::samples 156830 377system.ruby.outstanding_req_hist_seqr::mean 1 378system.ruby.outstanding_req_hist_seqr::gmean 1 379system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 156830 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 380system.ruby.outstanding_req_hist_seqr::total 156830 381system.ruby.latency_hist_seqr::bucket_size 64 382system.ruby.latency_hist_seqr::max_bucket 639 383system.ruby.latency_hist_seqr::samples 156829 384system.ruby.latency_hist_seqr::mean 10.744033 385system.ruby.latency_hist_seqr::gmean 2.067079 386system.ruby.latency_hist_seqr::stdev 25.213617 387system.ruby.latency_hist_seqr | 144536 92.16% 92.16% | 11426 7.29% 99.45% | 606 0.39% 99.83% | 87 0.06% 99.89% | 95 0.06% 99.95% | 65 0.04% 99.99% | 1 0.00% 99.99% | 3 0.00% 99.99% | 0 0.00% 99.99% | 10 0.01% 100.00% 388system.ruby.latency_hist_seqr::total 156829 389system.ruby.hit_latency_hist_seqr::bucket_size 1 390system.ruby.hit_latency_hist_seqr::max_bucket 9 391system.ruby.hit_latency_hist_seqr::samples 127112 392system.ruby.hit_latency_hist_seqr::mean 1 393system.ruby.hit_latency_hist_seqr::gmean 1 394system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 127112 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 395system.ruby.hit_latency_hist_seqr::total 127112 396system.ruby.miss_latency_hist_seqr::bucket_size 64 397system.ruby.miss_latency_hist_seqr::max_bucket 639 398system.ruby.miss_latency_hist_seqr::samples 29717 399system.ruby.miss_latency_hist_seqr::mean 52.423327 400system.ruby.miss_latency_hist_seqr::gmean 46.160524 401system.ruby.miss_latency_hist_seqr::stdev 34.809845 402system.ruby.miss_latency_hist_seqr | 17424 58.63% 58.63% | 11426 38.45% 97.08% | 606 2.04% 99.12% | 87 0.29% 99.41% | 95 0.32% 99.73% | 65 0.22% 99.95% | 1 0.00% 99.96% | 3 0.01% 99.97% | 0 0.00% 99.97% | 10 0.03% 100.00% 403system.ruby.miss_latency_hist_seqr::total 29717 404system.ruby.Directory.incomplete_times_seqr 29716 405system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 406system.ruby.l1_cntrl0.cacheMemory.demand_hits 127112 # Number of cache demand hits 407system.ruby.l1_cntrl0.cacheMemory.demand_misses 29717 # Number of cache demand misses 408system.ruby.l1_cntrl0.cacheMemory.demand_accesses 156829 # Number of cache demand accesses 409system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 410system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 411system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 412system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 413system.ruby.network.routers0.percent_links_utilized 8.066815 414system.ruby.network.routers0.msg_count.Control::2 29717 415system.ruby.network.routers0.msg_count.Data::2 29713 416system.ruby.network.routers0.msg_count.Response_Data::4 29717 417system.ruby.network.routers0.msg_count.Writeback_Control::3 29713 418system.ruby.network.routers0.msg_bytes.Control::2 237736 419system.ruby.network.routers0.msg_bytes.Data::2 2139336 420system.ruby.network.routers0.msg_bytes.Response_Data::4 2139624 421system.ruby.network.routers0.msg_bytes.Writeback_Control::3 237704 422system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 423system.ruby.network.routers1.percent_links_utilized 8.066815 424system.ruby.network.routers1.msg_count.Control::2 29717 425system.ruby.network.routers1.msg_count.Data::2 29713 426system.ruby.network.routers1.msg_count.Response_Data::4 29717 427system.ruby.network.routers1.msg_count.Writeback_Control::3 29713 428system.ruby.network.routers1.msg_bytes.Control::2 237736 429system.ruby.network.routers1.msg_bytes.Data::2 2139336 430system.ruby.network.routers1.msg_bytes.Response_Data::4 2139624 431system.ruby.network.routers1.msg_bytes.Writeback_Control::3 237704 432system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 433system.ruby.network.routers2.percent_links_utilized 8.066815 434system.ruby.network.routers2.msg_count.Control::2 29717 435system.ruby.network.routers2.msg_count.Data::2 29713 436system.ruby.network.routers2.msg_count.Response_Data::4 29717 437system.ruby.network.routers2.msg_count.Writeback_Control::3 29713 438system.ruby.network.routers2.msg_bytes.Control::2 237736 439system.ruby.network.routers2.msg_bytes.Data::2 2139336 440system.ruby.network.routers2.msg_bytes.Response_Data::4 2139624 441system.ruby.network.routers2.msg_bytes.Writeback_Control::3 237704 442system.ruby.network.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 443system.ruby.network.msg_count.Control 89151 444system.ruby.network.msg_count.Data 89139 445system.ruby.network.msg_count.Response_Data 89151 446system.ruby.network.msg_count.Writeback_Control 89139 447system.ruby.network.msg_byte.Control 713208 448system.ruby.network.msg_byte.Data 6418008 449system.ruby.network.msg_byte.Response_Data 6418872 450system.ruby.network.msg_byte.Writeback_Control 713112 451system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 1841805 # Cumulative time (in ticks) in various power states 452system.ruby.network.routers0.throttle0.link_utilization 8.067249 453system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 29717 454system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 29713 455system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 2139624 456system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 237704 457system.ruby.network.routers0.throttle1.link_utilization 8.066381 458system.ruby.network.routers0.throttle1.msg_count.Control::2 29717 459system.ruby.network.routers0.throttle1.msg_count.Data::2 29713 460system.ruby.network.routers0.throttle1.msg_bytes.Control::2 237736 461system.ruby.network.routers0.throttle1.msg_bytes.Data::2 2139336 462system.ruby.network.routers1.throttle0.link_utilization 8.066381 463system.ruby.network.routers1.throttle0.msg_count.Control::2 29717 464system.ruby.network.routers1.throttle0.msg_count.Data::2 29713 465system.ruby.network.routers1.throttle0.msg_bytes.Control::2 237736 466system.ruby.network.routers1.throttle0.msg_bytes.Data::2 2139336 467system.ruby.network.routers1.throttle1.link_utilization 8.067249 468system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 29717 469system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 29713 470system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 2139624 471system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 237704 472system.ruby.network.routers2.throttle0.link_utilization 8.067249 473system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 29717 474system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 29713 475system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 2139624 476system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 237704 477system.ruby.network.routers2.throttle1.link_utilization 8.066381 478system.ruby.network.routers2.throttle1.msg_count.Control::2 29717 479system.ruby.network.routers2.throttle1.msg_count.Data::2 29713 480system.ruby.network.routers2.throttle1.msg_bytes.Control::2 237736 481system.ruby.network.routers2.throttle1.msg_bytes.Data::2 2139336 482system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 483system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 484system.ruby.delayVCHist.vnet_1::samples 29717 # delay histogram for vnet_1 485system.ruby.delayVCHist.vnet_1 | 29717 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 486system.ruby.delayVCHist.vnet_1::total 29717 # delay histogram for vnet_1 487system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 488system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 489system.ruby.delayVCHist.vnet_2::samples 29713 # delay histogram for vnet_2 490system.ruby.delayVCHist.vnet_2 | 29713 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 491system.ruby.delayVCHist.vnet_2::total 29713 # delay histogram for vnet_2 492system.ruby.LD.latency_hist_seqr::bucket_size 64 493system.ruby.LD.latency_hist_seqr::max_bucket 639 494system.ruby.LD.latency_hist_seqr::samples 23780 495system.ruby.LD.latency_hist_seqr::mean 23.543860 496system.ruby.LD.latency_hist_seqr::gmean 5.728326 497system.ruby.LD.latency_hist_seqr::stdev 33.566569 498system.ruby.LD.latency_hist_seqr | 19950 83.89% 83.89% | 3533 14.86% 98.75% | 205 0.86% 99.61% | 27 0.11% 99.73% | 36 0.15% 99.88% | 25 0.11% 99.98% | 0 0.00% 99.98% | 2 0.01% 99.99% | 0 0.00% 99.99% | 2 0.01% 100.00% 499system.ruby.LD.latency_hist_seqr::total 23780 500system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 501system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 502system.ruby.LD.hit_latency_hist_seqr::samples 12809 503system.ruby.LD.hit_latency_hist_seqr::mean 1 504system.ruby.LD.hit_latency_hist_seqr::gmean 1 505system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 12809 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 506system.ruby.LD.hit_latency_hist_seqr::total 12809 507system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 508system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 509system.ruby.LD.miss_latency_hist_seqr::samples 10971 510system.ruby.LD.miss_latency_hist_seqr::mean 49.864552 511system.ruby.LD.miss_latency_hist_seqr::gmean 43.959200 512system.ruby.LD.miss_latency_hist_seqr::stdev 34.000652 513system.ruby.LD.miss_latency_hist_seqr | 7141 65.09% 65.09% | 3533 32.20% 97.29% | 205 1.87% 99.16% | 27 0.25% 99.41% | 36 0.33% 99.74% | 25 0.23% 99.96% | 0 0.00% 99.96% | 2 0.02% 99.98% | 0 0.00% 99.98% | 2 0.02% 100.00% 514system.ruby.LD.miss_latency_hist_seqr::total 10971 515system.ruby.ST.latency_hist_seqr::bucket_size 64 516system.ruby.ST.latency_hist_seqr::max_bucket 639 517system.ruby.ST.latency_hist_seqr::samples 19712 518system.ruby.ST.latency_hist_seqr::mean 12.481128 519system.ruby.ST.latency_hist_seqr::gmean 2.637325 520system.ruby.ST.latency_hist_seqr::stdev 25.900228 521system.ruby.ST.latency_hist_seqr | 18468 93.69% 93.69% | 1151 5.84% 99.53% | 59 0.30% 99.83% | 14 0.07% 99.90% | 7 0.04% 99.93% | 6 0.03% 99.96% | 0 0.00% 99.96% | 0 0.00% 99.96% | 0 0.00% 99.96% | 7 0.04% 100.00% 522system.ruby.ST.latency_hist_seqr::total 19712 523system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 524system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 525system.ruby.ST.hit_latency_hist_seqr::samples 14522 526system.ruby.ST.hit_latency_hist_seqr::mean 1 527system.ruby.ST.hit_latency_hist_seqr::gmean 1 528system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 14522 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 529system.ruby.ST.hit_latency_hist_seqr::total 14522 530system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 531system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 532system.ruby.ST.miss_latency_hist_seqr::samples 5190 533system.ruby.ST.miss_latency_hist_seqr::mean 44.606166 534system.ruby.ST.miss_latency_hist_seqr::gmean 39.775024 535system.ruby.ST.miss_latency_hist_seqr::stdev 33.868458 536system.ruby.ST.miss_latency_hist_seqr | 3946 76.03% 76.03% | 1151 22.18% 98.21% | 59 1.14% 99.34% | 14 0.27% 99.61% | 7 0.13% 99.75% | 6 0.12% 99.87% | 0 0.00% 99.87% | 0 0.00% 99.87% | 0 0.00% 99.87% | 7 0.13% 100.00% 537system.ruby.ST.miss_latency_hist_seqr::total 5190 538system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 539system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 540system.ruby.IFETCH.latency_hist_seqr::samples 113337 541system.ruby.IFETCH.latency_hist_seqr::mean 7.756293 542system.ruby.IFETCH.latency_hist_seqr::gmean 1.599835 543system.ruby.IFETCH.latency_hist_seqr::stdev 21.972545 544system.ruby.IFETCH.latency_hist_seqr | 106118 93.63% 93.63% | 6742 5.95% 99.58% | 342 0.30% 99.88% | 46 0.04% 99.92% | 52 0.05% 99.97% | 34 0.03% 100.00% | 1 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% 545system.ruby.IFETCH.latency_hist_seqr::total 113337 546system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 547system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 548system.ruby.IFETCH.hit_latency_hist_seqr::samples 99781 549system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 550system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 551system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 99781 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 552system.ruby.IFETCH.hit_latency_hist_seqr::total 99781 553system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 554system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 555system.ruby.IFETCH.miss_latency_hist_seqr::samples 13556 556system.ruby.IFETCH.miss_latency_hist_seqr::mean 57.487017 557system.ruby.IFETCH.miss_latency_hist_seqr::gmean 50.839427 558system.ruby.IFETCH.miss_latency_hist_seqr::stdev 35.033938 559system.ruby.IFETCH.miss_latency_hist_seqr | 6337 46.75% 46.75% | 6742 49.73% 96.48% | 342 2.52% 99.00% | 46 0.34% 99.34% | 52 0.38% 99.73% | 34 0.25% 99.98% | 1 0.01% 99.99% | 1 0.01% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% 560system.ruby.IFETCH.miss_latency_hist_seqr::total 13556 561system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 562system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 563system.ruby.Directory.miss_mach_latency_hist_seqr::samples 29717 564system.ruby.Directory.miss_mach_latency_hist_seqr::mean 52.423327 565system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 46.160524 566system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 34.809845 567system.ruby.Directory.miss_mach_latency_hist_seqr | 17424 58.63% 58.63% | 11426 38.45% 97.08% | 606 2.04% 99.12% | 87 0.29% 99.41% | 95 0.32% 99.73% | 65 0.22% 99.95% | 1 0.00% 99.96% | 3 0.01% 99.97% | 0 0.00% 99.97% | 10 0.03% 100.00% 568system.ruby.Directory.miss_mach_latency_hist_seqr::total 29717 569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 570system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 571system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 572system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 573system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 574system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 575system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 576system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9 577system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1 578system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan 579system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 580system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1 581system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1 582system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9 583system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1 584system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan 585system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 586system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1 587system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8 588system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79 589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1 590system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 591system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 592system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 593system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 594system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 10971 598system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 49.864552 599system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 43.959200 600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 34.000652 601system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 7141 65.09% 65.09% | 3533 32.20% 97.29% | 205 1.87% 99.16% | 27 0.25% 99.41% | 36 0.33% 99.74% | 25 0.23% 99.96% | 0 0.00% 99.96% | 2 0.02% 99.98% | 0 0.00% 99.98% | 2 0.02% 100.00% 602system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 10971 603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 5190 606system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 44.606166 607system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 39.775024 608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 33.868458 609system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 3946 76.03% 76.03% | 1151 22.18% 98.21% | 59 1.14% 99.34% | 14 0.27% 99.61% | 7 0.13% 99.75% | 6 0.12% 99.87% | 0 0.00% 99.87% | 0 0.00% 99.87% | 0 0.00% 99.87% | 7 0.13% 100.00% 610system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 5190 611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 13556 614system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 57.487017 615system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 50.839427 616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 35.033938 617system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 6337 46.75% 46.75% | 6742 49.73% 96.48% | 342 2.52% 99.00% | 46 0.34% 99.34% | 52 0.38% 99.73% | 34 0.25% 99.98% | 1 0.01% 99.99% | 1 0.01% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% 618system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 13556 619system.ruby.Directory_Controller.GETX 29717 0.00% 0.00% 620system.ruby.Directory_Controller.PUTX 29713 0.00% 0.00% 621system.ruby.Directory_Controller.Memory_Data 29717 0.00% 0.00% 622system.ruby.Directory_Controller.Memory_Ack 29713 0.00% 0.00% 623system.ruby.Directory_Controller.I.GETX 29717 0.00% 0.00% 624system.ruby.Directory_Controller.M.PUTX 29713 0.00% 0.00% 625system.ruby.Directory_Controller.IM.Memory_Data 29717 0.00% 0.00% 626system.ruby.Directory_Controller.MI.Memory_Ack 29713 0.00% 0.00% 627system.ruby.L1Cache_Controller.Load 23780 0.00% 0.00% 628system.ruby.L1Cache_Controller.Ifetch 113337 0.00% 0.00% 629system.ruby.L1Cache_Controller.Store 19712 0.00% 0.00% 630system.ruby.L1Cache_Controller.Data 29717 0.00% 0.00% 631system.ruby.L1Cache_Controller.Replacement 29713 0.00% 0.00% 632system.ruby.L1Cache_Controller.Writeback_Ack 29713 0.00% 0.00% 633system.ruby.L1Cache_Controller.I.Load 10971 0.00% 0.00% 634system.ruby.L1Cache_Controller.I.Ifetch 13556 0.00% 0.00% 635system.ruby.L1Cache_Controller.I.Store 5190 0.00% 0.00% 636system.ruby.L1Cache_Controller.M.Load 12809 0.00% 0.00% 637system.ruby.L1Cache_Controller.M.Ifetch 99781 0.00% 0.00% 638system.ruby.L1Cache_Controller.M.Store 14522 0.00% 0.00% 639system.ruby.L1Cache_Controller.M.Replacement 29713 0.00% 0.00% 640system.ruby.L1Cache_Controller.MI.Writeback_Ack 29713 0.00% 0.00% 641system.ruby.L1Cache_Controller.IS.Data 24527 0.00% 0.00% 642system.ruby.L1Cache_Controller.IM.Data 5190 0.00% 0.00% 643 644---------- End Simulation Statistics ---------- 645