xref: /gem5/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.000028                       # Number of seconds simulated
sim_ticks                                       27947                       # Number of ticks simulated
final_tick                                      27947                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                   1000000000                       # Frequency of simulated ticks
host_inst_rate                                  19868                       # Simulator instruction rate (inst/s)
host_op_rate                                    19863                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                                 349695                       # Simulator tick rate (ticks/s)
host_mem_usage                                 390760                       # Number of bytes of host memory used
host_seconds                                     0.08                       # Real time elapsed on the host
sim_insts                                        1587                       # Number of instructions simulated
sim_ops                                          1587                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                             1                       # Clock period in ticks
system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.mem_ctrls.bytes_read::ruby.dir_cntrl0        28032                       # Number of bytes read from this memory
system.mem_ctrls.bytes_read::total              28032                       # Number of bytes read from this memory
system.mem_ctrls.bytes_written::ruby.dir_cntrl0        27776                       # Number of bytes written to this memory
system.mem_ctrls.bytes_written::total           27776                       # Number of bytes written to this memory
system.mem_ctrls.num_reads::ruby.dir_cntrl0          438                       # Number of read requests responded to by this memory
system.mem_ctrls.num_reads::total                 438                       # Number of read requests responded to by this memory
system.mem_ctrls.num_writes::ruby.dir_cntrl0          434                       # Number of write requests responded to by this memory
system.mem_ctrls.num_writes::total                434                       # Number of write requests responded to by this memory
system.mem_ctrls.bw_read::ruby.dir_cntrl0   1003041471                       # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_read::total            1003041471                       # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::ruby.dir_cntrl0    993881275                       # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::total            993881275                       # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_total::ruby.dir_cntrl0   1996922747                       # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.bw_total::total           1996922747                       # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.readReqs                         438                       # Number of read requests accepted
system.mem_ctrls.writeReqs                        434                       # Number of write requests accepted
system.mem_ctrls.readBursts                       438                       # Number of DRAM read bursts, including those serviced by the write queue
system.mem_ctrls.writeBursts                      434                       # Number of DRAM write bursts, including those merged in the write queue
system.mem_ctrls.bytesReadDRAM                  15616                       # Total number of bytes read from DRAM
system.mem_ctrls.bytesReadWrQ                   12416                       # Total number of bytes read from write queue
system.mem_ctrls.bytesWritten                   14912                       # Total number of bytes written to DRAM
system.mem_ctrls.bytesReadSys                   28032                       # Total read bytes from the system interface side
system.mem_ctrls.bytesWrittenSys                27776                       # Total written bytes from the system interface side
system.mem_ctrls.servicedByWrQ                    194                       # Number of DRAM read bursts serviced by the write queue
system.mem_ctrls.mergedWrBursts                   183                       # Number of DRAM write bursts merged with an existing one
system.mem_ctrls.neitherReadNorWriteReqs            0                       # Number of requests that are neither read nor write
system.mem_ctrls.perBankRdBursts::0               102                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::1                69                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::2                43                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::3                30                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::4                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::5                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::6                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::7                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::8                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::9                 0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::10                0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::11                0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::12                0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::13                0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::14                0                       # Per bank write bursts
system.mem_ctrls.perBankRdBursts::15                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::0               100                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::1                62                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::2                41                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::3                30                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::4                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::5                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::6                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::7                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::8                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::9                 0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::10                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::11                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::12                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::13                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::14                0                       # Per bank write bursts
system.mem_ctrls.perBankWrBursts::15                0                       # Per bank write bursts
system.mem_ctrls.numRdRetry                         0                       # Number of times read queue was full causing retry
system.mem_ctrls.numWrRetry                         0                       # Number of times write queue was full causing retry
system.mem_ctrls.totGap                         27875                       # Total gap between requests
system.mem_ctrls.readPktSize::0                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::1                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::2                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::3                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::4                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::5                     0                       # Read request sizes (log2)
system.mem_ctrls.readPktSize::6                   438                       # Read request sizes (log2)
system.mem_ctrls.writePktSize::0                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::1                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::2                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::3                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::4                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::5                    0                       # Write request sizes (log2)
system.mem_ctrls.writePktSize::6                  434                       # Write request sizes (log2)
system.mem_ctrls.rdQLenPdf::0                     244                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::1                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::2                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::3                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::4                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::5                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::6                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::7                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::8                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::9                       0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::10                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::11                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::12                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::13                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::14                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::15                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::16                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::17                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::18                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::19                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::20                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::21                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::22                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::23                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::24                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::25                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::26                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::27                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::28                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::29                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::30                      0                       # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::31                      0                       # What read queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::0                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::1                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::2                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::3                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::4                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::5                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::6                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::7                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::8                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::9                       1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::10                      1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::11                      1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::12                      1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::13                      1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::14                      1                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::15                      5                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::16                      5                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::17                     12                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::18                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::19                     15                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::20                     15                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::21                     16                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::22                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::23                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::24                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::25                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::26                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::27                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::28                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::29                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::30                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::31                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::32                     14                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::33                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::34                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::35                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::36                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::37                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::38                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::39                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::40                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::41                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::42                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::43                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::44                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::45                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::46                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::47                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::48                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::49                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::50                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::51                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::52                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::53                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::54                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::55                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::56                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::57                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::58                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::59                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::60                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::61                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::62                      0                       # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::63                      0                       # What write queue length does an incoming req see
system.mem_ctrls.bytesPerActivate::samples           35                       # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::mean    835.657143                       # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::gmean   690.201292                       # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::stdev   331.080756                       # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::0-127            2      5.71%      5.71% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::128-255            2      5.71%     11.43% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::256-383            1      2.86%     14.29% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::384-511            1      2.86%     17.14% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::512-639            1      2.86%     20.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::640-767            3      8.57%     28.57% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::1024-1151           25     71.43%    100.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::total           35                       # Bytes accessed per row activation
system.mem_ctrls.rdPerTurnAround::samples           14                       # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::mean      17.285714                       # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::gmean     16.736288                       # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::stdev      5.580579                       # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::12-13             1      7.14%      7.14% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::14-15             4     28.57%     35.71% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::16-17             7     50.00%     85.71% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::18-19             1      7.14%     92.86% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::36-37             1      7.14%    100.00% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::total            14                       # Reads before turning the bus around for writes
system.mem_ctrls.wrPerTurnAround::samples           14                       # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::mean      16.642857                       # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::gmean     16.611629                       # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::stdev      1.081818                       # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::16               10     71.43%     71.43% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::18                3     21.43%     92.86% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::19                1      7.14%    100.00% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::total            14                       # Writes before turning the bus around for reads
system.mem_ctrls.totQLat                         2979                       # Total ticks spent queuing
system.mem_ctrls.totMemAccLat                    7615                       # Total ticks spent from burst creation until serviced by the DRAM
system.mem_ctrls.totBusLat                       1220                       # Total ticks spent in databus transfers
system.mem_ctrls.avgQLat                        12.21                       # Average queueing delay per DRAM burst
system.mem_ctrls.avgBusLat                       5.00                       # Average bus latency per DRAM burst
system.mem_ctrls.avgMemAccLat                   31.21                       # Average memory access latency per DRAM burst
system.mem_ctrls.avgRdBW                       558.77                       # Average DRAM read bandwidth in MiByte/s
system.mem_ctrls.avgWrBW                       533.58                       # Average achieved write bandwidth in MiByte/s
system.mem_ctrls.avgRdBWSys                   1003.04                       # Average system read bandwidth in MiByte/s
system.mem_ctrls.avgWrBWSys                    993.88                       # Average system write bandwidth in MiByte/s
system.mem_ctrls.peakBW                      12800.00                       # Theoretical peak bandwidth in MiByte/s
system.mem_ctrls.busUtil                         8.53                       # Data bus utilization in percentage
system.mem_ctrls.busUtilRead                     4.37                       # Data bus utilization in percentage for reads
system.mem_ctrls.busUtilWrite                    4.17                       # Data bus utilization in percentage for writes
system.mem_ctrls.avgRdQLen                       1.00                       # Average read queue length when enqueuing
system.mem_ctrls.avgWrQLen                      24.44                       # Average write queue length when enqueuing
system.mem_ctrls.readRowHits                      212                       # Number of row buffer hits during reads
system.mem_ctrls.writeRowHits                     228                       # Number of row buffer hits during writes
system.mem_ctrls.readRowHitRate                 86.89                       # Row buffer hit rate for reads
system.mem_ctrls.writeRowHitRate                90.84                       # Row buffer hit rate for writes
system.mem_ctrls.avgGap                         31.97                       # Average gap between requests
system.mem_ctrls.pageHitRate                    88.89                       # Row buffer hit rate, read and write combined
system.mem_ctrls_0.actEnergy                   264180                       # Energy for activate commands per rank (pJ)
system.mem_ctrls_0.preEnergy                   135240                       # Energy for precharge commands per rank (pJ)
system.mem_ctrls_0.readEnergy                 2787456                       # Energy for read commands per rank (pJ)
system.mem_ctrls_0.writeEnergy                1946016                       # Energy for write commands per rank (pJ)
system.mem_ctrls_0.refreshEnergy         1843920.000000                       # Energy for refresh commands per rank (pJ)
system.mem_ctrls_0.actBackEnergy              4405872                       # Energy for active background per rank (pJ)
system.mem_ctrls_0.preBackEnergy                40704                       # Energy for precharge background per rank (pJ)
system.mem_ctrls_0.actPowerDownEnergy         8149176                       # Energy for active power-down per rank (pJ)
system.mem_ctrls_0.prePowerDownEnergy          118272                       # Energy for precharge power-down per rank (pJ)
system.mem_ctrls_0.selfRefreshEnergy                0                       # Energy for self refresh per rank (pJ)
system.mem_ctrls_0.totalEnergy               19690836                       # Total energy per rank (pJ)
system.mem_ctrls_0.averagePower            704.577808                       # Core power per rank (mW)
system.mem_ctrls_0.totalIdleTime                18179                       # Total Idle time Per DRAM Rank
system.mem_ctrls_0.memoryStateTime::IDLE           22                       # Time in different power states
system.mem_ctrls_0.memoryStateTime::REF           780                       # Time in different power states
system.mem_ctrls_0.memoryStateTime::SREF            0                       # Time in different power states
system.mem_ctrls_0.memoryStateTime::PRE_PDN          308                       # Time in different power states
system.mem_ctrls_0.memoryStateTime::ACT          8966                       # Time in different power states
system.mem_ctrls_0.memoryStateTime::ACT_PDN        17871                       # Time in different power states
system.mem_ctrls_1.actEnergy                        0                       # Energy for activate commands per rank (pJ)
system.mem_ctrls_1.preEnergy                        0                       # Energy for precharge commands per rank (pJ)
system.mem_ctrls_1.readEnergy                       0                       # Energy for read commands per rank (pJ)
system.mem_ctrls_1.writeEnergy                      0                       # Energy for write commands per rank (pJ)
system.mem_ctrls_1.refreshEnergy         1229280.000000                       # Energy for refresh commands per rank (pJ)
system.mem_ctrls_1.actBackEnergy               224352                       # Energy for active background per rank (pJ)
system.mem_ctrls_1.preBackEnergy              3002880                       # Energy for precharge background per rank (pJ)
system.mem_ctrls_1.actPowerDownEnergy               0                       # Energy for active power-down per rank (pJ)
system.mem_ctrls_1.prePowerDownEnergy         2889984                       # Energy for precharge power-down per rank (pJ)
system.mem_ctrls_1.selfRefreshEnergy          2906160                       # Energy for self refresh per rank (pJ)
system.mem_ctrls_1.totalEnergy               10252656                       # Total energy per rank (pJ)
system.mem_ctrls_1.averagePower            366.860701                       # Core power per rank (mW)
system.mem_ctrls_1.totalIdleTime                 7526                       # Total Idle time Per DRAM Rank
system.mem_ctrls_1.memoryStateTime::IDLE         7786                       # Time in different power states
system.mem_ctrls_1.memoryStateTime::REF           526                       # Time in different power states
system.mem_ctrls_1.memoryStateTime::SREF        12109                       # Time in different power states
system.mem_ctrls_1.memoryStateTime::PRE_PDN         7526                       # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT             0                       # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
system.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.cpu.clk_domain.clock                         1                       # Clock period in ticks
system.cpu.dtb.read_hits                            0                       # DTB read hits
system.cpu.dtb.read_misses                          0                       # DTB read misses
system.cpu.dtb.read_accesses                        0                       # DTB read accesses
system.cpu.dtb.write_hits                           0                       # DTB write hits
system.cpu.dtb.write_misses                         0                       # DTB write misses
system.cpu.dtb.write_accesses                       0                       # DTB write accesses
system.cpu.dtb.hits                                 0                       # DTB hits
system.cpu.dtb.misses                               0                       # DTB misses
system.cpu.dtb.accesses                             0                       # DTB accesses
system.cpu.itb.read_hits                            0                       # DTB read hits
system.cpu.itb.read_misses                          0                       # DTB read misses
system.cpu.itb.read_accesses                        0                       # DTB read accesses
system.cpu.itb.write_hits                           0                       # DTB write hits
system.cpu.itb.write_misses                         0                       # DTB write misses
system.cpu.itb.write_accesses                       0                       # DTB write accesses
system.cpu.itb.hits                                 0                       # DTB hits
system.cpu.itb.misses                               0                       # DTB misses
system.cpu.itb.accesses                             0                       # DTB accesses
system.cpu.workload.num_syscalls                    9                       # Number of system calls
system.cpu.pwrStateResidencyTicks::ON           27947                       # Cumulative time (in ticks) in various power states
system.cpu.numCycles                            27947                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.committedInsts                        1587                       # Number of instructions committed
system.cpu.committedOps                          1587                       # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses                  1588                       # Number of integer alu accesses
system.cpu.num_fp_alu_accesses                      0                       # Number of float alu accesses
system.cpu.num_func_calls                         142                       # number of times a function call or return occured
system.cpu.num_conditional_control_insts          231                       # number of instructions that are conditional controls
system.cpu.num_int_insts                         1588                       # number of integer instructions
system.cpu.num_fp_insts                             0                       # number of float instructions
system.cpu.num_int_register_reads                2062                       # number of times the integer registers were read
system.cpu.num_int_register_writes               1077                       # number of times the integer registers were written
system.cpu.num_fp_register_reads                    0                       # number of times the floating registers were read
system.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
system.cpu.num_mem_refs                           569                       # number of memory refs
system.cpu.num_load_insts                         289                       # Number of load instructions
system.cpu.num_store_insts                        280                       # Number of store instructions
system.cpu.num_idle_cycles                          0                       # Number of idle cycles
system.cpu.num_busy_cycles                      27947                       # Number of busy cycles
system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
system.cpu.idle_fraction                            0                       # Percentage of idle cycles
system.cpu.Branches                               373                       # Number of branches fetched
system.cpu.op_class::No_OpClass                     9      0.56%      0.56% # Class of executed instruction
system.cpu.op_class::IntAlu                      1019     63.81%     64.37% # Class of executed instruction
system.cpu.op_class::IntMult                        0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::IntDiv                         0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatAdd                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatCmp                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatCvt                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatMult                      0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatMultAcc                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatDiv                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatMisc                      0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::FloatSqrt                      0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdAdd                        0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdAddAcc                     0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdAlu                        0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdCmp                        0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdCvt                        0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdMisc                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdMult                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdMultAcc                    0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdShift                      0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdShiftAcc                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdSqrt                       0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatAdd                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatAlu                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatCmp                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatCvt                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatDiv                   0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatMisc                  0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatMult                  0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatMultAcc               0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt                  0      0.00%     64.37% # Class of executed instruction
system.cpu.op_class::MemRead                      289     18.10%     82.47% # Class of executed instruction
system.cpu.op_class::MemWrite                     280     17.53%    100.00% # Class of executed instruction
system.cpu.op_class::FloatMemRead                   0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::FloatMemWrite                  0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::total                       1597                       # Class of executed instruction
system.ruby.clk_domain.clock                        1                       # Clock period in ticks
system.ruby.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.delayHist::bucket_size                  1                       # delay histogram for all message
system.ruby.delayHist::max_bucket                   9                       # delay histogram for all message
system.ruby.delayHist::samples                    872                       # delay histogram for all message
system.ruby.delayHist                    |         872    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for all message
system.ruby.delayHist::total                      872                       # delay histogram for all message
system.ruby.outstanding_req_hist_seqr::bucket_size            1                      
system.ruby.outstanding_req_hist_seqr::max_bucket            9                      
system.ruby.outstanding_req_hist_seqr::samples         2166                      
system.ruby.outstanding_req_hist_seqr::mean            1                      
system.ruby.outstanding_req_hist_seqr::gmean            1                      
system.ruby.outstanding_req_hist_seqr    |           0      0.00%      0.00% |        2166    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.outstanding_req_hist_seqr::total         2166                      
system.ruby.latency_hist_seqr::bucket_size           32                      
system.ruby.latency_hist_seqr::max_bucket          319                      
system.ruby.latency_hist_seqr::samples           2165                      
system.ruby.latency_hist_seqr::mean         11.908545                      
system.ruby.latency_hist_seqr::gmean         2.205817                      
system.ruby.latency_hist_seqr::stdev        24.908130                      
system.ruby.latency_hist_seqr            |        1727     79.77%     79.77% |         202      9.33%     89.10% |         224     10.35%     99.45% |           2      0.09%     99.54% |           2      0.09%     99.63% |           7      0.32%     99.95% |           0      0.00%     99.95% |           0      0.00%     99.95% |           0      0.00%     99.95% |           1      0.05%    100.00%
system.ruby.latency_hist_seqr::total             2165                      
system.ruby.hit_latency_hist_seqr::bucket_size            1                      
system.ruby.hit_latency_hist_seqr::max_bucket            9                      
system.ruby.hit_latency_hist_seqr::samples         1727                      
system.ruby.hit_latency_hist_seqr::mean             1                      
system.ruby.hit_latency_hist_seqr::gmean            1                      
system.ruby.hit_latency_hist_seqr        |           0      0.00%      0.00% |        1727    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.hit_latency_hist_seqr::total         1727                      
system.ruby.miss_latency_hist_seqr::bucket_size           32                      
system.ruby.miss_latency_hist_seqr::max_bucket          319                      
system.ruby.miss_latency_hist_seqr::samples          438                      
system.ruby.miss_latency_hist_seqr::mean    54.920091                      
system.ruby.miss_latency_hist_seqr::gmean    49.915756                      
system.ruby.miss_latency_hist_seqr::stdev    27.345330                      
system.ruby.miss_latency_hist_seqr       |           0      0.00%      0.00% |         202     46.12%     46.12% |         224     51.14%     97.26% |           2      0.46%     97.72% |           2      0.46%     98.17% |           7      1.60%     99.77% |           0      0.00%     99.77% |           0      0.00%     99.77% |           0      0.00%     99.77% |           1      0.23%    100.00%
system.ruby.miss_latency_hist_seqr::total          438                      
system.ruby.Directory.incomplete_times_seqr          437                      
system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.l1_cntrl0.cacheMemory.demand_hits         1727                       # Number of cache demand hits
system.ruby.l1_cntrl0.cacheMemory.demand_misses          438                       # Number of cache demand misses
system.ruby.l1_cntrl0.cacheMemory.demand_accesses         2165                       # Number of cache demand accesses
system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.memctrl_clk_domain.clock                3                       # Clock period in ticks
system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.network.routers0.percent_links_utilized     7.800479                      
system.ruby.network.routers0.msg_count.Control::2          438                      
system.ruby.network.routers0.msg_count.Data::2          434                      
system.ruby.network.routers0.msg_count.Response_Data::4          438                      
system.ruby.network.routers0.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers0.msg_bytes.Control::2         3504                      
system.ruby.network.routers0.msg_bytes.Data::2        31248                      
system.ruby.network.routers0.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers0.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.network.routers1.percent_links_utilized     7.800479                      
system.ruby.network.routers1.msg_count.Control::2          438                      
system.ruby.network.routers1.msg_count.Data::2          434                      
system.ruby.network.routers1.msg_count.Response_Data::4          438                      
system.ruby.network.routers1.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers1.msg_bytes.Control::2         3504                      
system.ruby.network.routers1.msg_bytes.Data::2        31248                      
system.ruby.network.routers1.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers1.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.network.routers2.percent_links_utilized     7.800479                      
system.ruby.network.routers2.msg_count.Control::2          438                      
system.ruby.network.routers2.msg_count.Data::2          434                      
system.ruby.network.routers2.msg_count.Response_Data::4          438                      
system.ruby.network.routers2.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers2.msg_bytes.Control::2         3504                      
system.ruby.network.routers2.msg_bytes.Data::2        31248                      
system.ruby.network.routers2.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers2.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.network.msg_count.Control            1314                      
system.ruby.network.msg_count.Data               1302                      
system.ruby.network.msg_count.Response_Data         1314                      
system.ruby.network.msg_count.Writeback_Control         1302                      
system.ruby.network.msg_byte.Control            10512                      
system.ruby.network.msg_byte.Data               93744                      
system.ruby.network.msg_byte.Response_Data        94608                      
system.ruby.network.msg_byte.Writeback_Control        10416                      
system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED        27947                       # Cumulative time (in ticks) in various power states
system.ruby.network.routers0.throttle0.link_utilization     7.829105                      
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4          438                      
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.routers0.throttle1.link_utilization     7.771854                      
system.ruby.network.routers0.throttle1.msg_count.Control::2          438                      
system.ruby.network.routers0.throttle1.msg_count.Data::2          434                      
system.ruby.network.routers0.throttle1.msg_bytes.Control::2         3504                      
system.ruby.network.routers0.throttle1.msg_bytes.Data::2        31248                      
system.ruby.network.routers1.throttle0.link_utilization     7.771854                      
system.ruby.network.routers1.throttle0.msg_count.Control::2          438                      
system.ruby.network.routers1.throttle0.msg_count.Data::2          434                      
system.ruby.network.routers1.throttle0.msg_bytes.Control::2         3504                      
system.ruby.network.routers1.throttle0.msg_bytes.Data::2        31248                      
system.ruby.network.routers1.throttle1.link_utilization     7.829105                      
system.ruby.network.routers1.throttle1.msg_count.Response_Data::4          438                      
system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.routers2.throttle0.link_utilization     7.829105                      
system.ruby.network.routers2.throttle0.msg_count.Response_Data::4          438                      
system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3          434                      
system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4        31536                      
system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3         3472                      
system.ruby.network.routers2.throttle1.link_utilization     7.771854                      
system.ruby.network.routers2.throttle1.msg_count.Control::2          438                      
system.ruby.network.routers2.throttle1.msg_count.Data::2          434                      
system.ruby.network.routers2.throttle1.msg_bytes.Control::2         3504                      
system.ruby.network.routers2.throttle1.msg_bytes.Data::2        31248                      
system.ruby.delayVCHist.vnet_1::bucket_size            1                       # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::max_bucket            9                       # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::samples           438                       # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1           |         438    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::total             438                       # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_2::bucket_size            1                       # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::max_bucket            9                       # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::samples           434                       # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2           |         434    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::total             434                       # delay histogram for vnet_2
system.ruby.LD.latency_hist_seqr::bucket_size           32                      
system.ruby.LD.latency_hist_seqr::max_bucket          319                      
system.ruby.LD.latency_hist_seqr::samples          289                      
system.ruby.LD.latency_hist_seqr::mean      23.332180                      
system.ruby.LD.latency_hist_seqr::gmean      5.457216                      
system.ruby.LD.latency_hist_seqr::stdev     32.553168                      
system.ruby.LD.latency_hist_seqr         |         161     55.71%     55.71% |          72     24.91%     80.62% |          54     18.69%     99.31% |           0      0.00%     99.31% |           0      0.00%     99.31% |           1      0.35%     99.65% |           0      0.00%     99.65% |           0      0.00%     99.65% |           0      0.00%     99.65% |           1      0.35%    100.00%
system.ruby.LD.latency_hist_seqr::total           289                      
system.ruby.LD.hit_latency_hist_seqr::bucket_size            1                      
system.ruby.LD.hit_latency_hist_seqr::max_bucket            9                      
system.ruby.LD.hit_latency_hist_seqr::samples          161                      
system.ruby.LD.hit_latency_hist_seqr::mean            1                      
system.ruby.LD.hit_latency_hist_seqr::gmean            1                      
system.ruby.LD.hit_latency_hist_seqr     |           0      0.00%      0.00% |         161    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.LD.hit_latency_hist_seqr::total          161                      
system.ruby.LD.miss_latency_hist_seqr::bucket_size           32                      
system.ruby.LD.miss_latency_hist_seqr::max_bucket          319                      
system.ruby.LD.miss_latency_hist_seqr::samples          128                      
system.ruby.LD.miss_latency_hist_seqr::mean    51.421875                      
system.ruby.LD.miss_latency_hist_seqr::gmean    46.125665                      
system.ruby.LD.miss_latency_hist_seqr::stdev    31.235103                      
system.ruby.LD.miss_latency_hist_seqr    |           0      0.00%      0.00% |          72     56.25%     56.25% |          54     42.19%     98.44% |           0      0.00%     98.44% |           0      0.00%     98.44% |           1      0.78%     99.22% |           0      0.00%     99.22% |           0      0.00%     99.22% |           0      0.00%     99.22% |           1      0.78%    100.00%
system.ruby.LD.miss_latency_hist_seqr::total          128                      
system.ruby.ST.latency_hist_seqr::bucket_size           16                      
system.ruby.ST.latency_hist_seqr::max_bucket          159                      
system.ruby.ST.latency_hist_seqr::samples          279                      
system.ruby.ST.latency_hist_seqr::mean      13.150538                      
system.ruby.ST.latency_hist_seqr::gmean      2.682693                      
system.ruby.ST.latency_hist_seqr::stdev     23.311750                      
system.ruby.ST.latency_hist_seqr         |         206     73.84%     73.84% |           0      0.00%     73.84% |          45     16.13%     89.96% |           2      0.72%     90.68% |          22      7.89%     98.57% |           2      0.72%     99.28% |           0      0.00%     99.28% |           1      0.36%     99.64% |           1      0.36%    100.00% |           0      0.00%    100.00%
system.ruby.ST.latency_hist_seqr::total           279                      
system.ruby.ST.hit_latency_hist_seqr::bucket_size            1                      
system.ruby.ST.hit_latency_hist_seqr::max_bucket            9                      
system.ruby.ST.hit_latency_hist_seqr::samples          206                      
system.ruby.ST.hit_latency_hist_seqr::mean            1                      
system.ruby.ST.hit_latency_hist_seqr::gmean            1                      
system.ruby.ST.hit_latency_hist_seqr     |           0      0.00%      0.00% |         206    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.ST.hit_latency_hist_seqr::total          206                      
system.ruby.ST.miss_latency_hist_seqr::bucket_size           16                      
system.ruby.ST.miss_latency_hist_seqr::max_bucket          159                      
system.ruby.ST.miss_latency_hist_seqr::samples           73                      
system.ruby.ST.miss_latency_hist_seqr::mean    47.438356                      
system.ruby.ST.miss_latency_hist_seqr::gmean    43.447321                      
system.ruby.ST.miss_latency_hist_seqr::stdev    21.997466                      
system.ruby.ST.miss_latency_hist_seqr    |           0      0.00%      0.00% |           0      0.00%      0.00% |          45     61.64%     61.64% |           2      2.74%     64.38% |          22     30.14%     94.52% |           2      2.74%     97.26% |           0      0.00%     97.26% |           1      1.37%     98.63% |           1      1.37%    100.00% |           0      0.00%    100.00%
system.ruby.ST.miss_latency_hist_seqr::total           73                      
system.ruby.IFETCH.latency_hist_seqr::bucket_size           32                      
system.ruby.IFETCH.latency_hist_seqr::max_bucket          319                      
system.ruby.IFETCH.latency_hist_seqr::samples         1597                      
system.ruby.IFETCH.latency_hist_seqr::mean     9.624296                      
system.ruby.IFETCH.latency_hist_seqr::gmean     1.809372                      
system.ruby.IFETCH.latency_hist_seqr::stdev    22.939232                      
system.ruby.IFETCH.latency_hist_seqr     |        1360     85.16%     85.16% |          83      5.20%     90.36% |         146      9.14%     99.50% |           1      0.06%     99.56% |           1      0.06%     99.62% |           6      0.38%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.IFETCH.latency_hist_seqr::total         1597                      
system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size            1                      
system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket            9                      
system.ruby.IFETCH.hit_latency_hist_seqr::samples         1360                      
system.ruby.IFETCH.hit_latency_hist_seqr::mean            1                      
system.ruby.IFETCH.hit_latency_hist_seqr::gmean            1                      
system.ruby.IFETCH.hit_latency_hist_seqr |           0      0.00%      0.00% |        1360    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.IFETCH.hit_latency_hist_seqr::total         1360                      
system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size           32                      
system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket          319                      
system.ruby.IFETCH.miss_latency_hist_seqr::samples          237                      
system.ruby.IFETCH.miss_latency_hist_seqr::mean    59.113924                      
system.ruby.IFETCH.miss_latency_hist_seqr::gmean    54.365760                      
system.ruby.IFETCH.miss_latency_hist_seqr::stdev    25.891554                      
system.ruby.IFETCH.miss_latency_hist_seqr |           0      0.00%      0.00% |          83     35.02%     35.02% |         146     61.60%     96.62% |           1      0.42%     97.05% |           1      0.42%     97.47% |           6      2.53%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.IFETCH.miss_latency_hist_seqr::total          237                      
system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size           32                      
system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket          319                      
system.ruby.Directory.miss_mach_latency_hist_seqr::samples          438                      
system.ruby.Directory.miss_mach_latency_hist_seqr::mean    54.920091                      
system.ruby.Directory.miss_mach_latency_hist_seqr::gmean    49.915756                      
system.ruby.Directory.miss_mach_latency_hist_seqr::stdev    27.345330                      
system.ruby.Directory.miss_mach_latency_hist_seqr |           0      0.00%      0.00% |         202     46.12%     46.12% |         224     51.14%     97.26% |           2      0.46%     97.72% |           2      0.46%     98.17% |           7      1.60%     99.77% |           0      0.00%     99.77% |           0      0.00%     99.77% |           0      0.00%     99.77% |           1      0.23%    100.00%
system.ruby.Directory.miss_mach_latency_hist_seqr::total          438                      
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size            1                      
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket            9                      
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples            1                      
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev          nan                      
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total            1                      
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size            1                      
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket            9                      
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples            1                      
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev          nan                      
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total            1                      
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size            1                      
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket            9                      
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples            1                      
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev          nan                      
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response |           1    100.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total            1                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size            8                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket           79                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples            1                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean           75                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean    75.000000                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev          nan                      
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           0      0.00%      0.00% |           1    100.00%    100.00%
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total            1                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size           32                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket          319                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples          128                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean    51.421875                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean    46.125665                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev    31.235103                      
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |          72     56.25%     56.25% |          54     42.19%     98.44% |           0      0.00%     98.44% |           0      0.00%     98.44% |           1      0.78%     99.22% |           0      0.00%     99.22% |           0      0.00%     99.22% |           0      0.00%     99.22% |           1      0.78%    100.00%
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total          128                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size           16                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket          159                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples           73                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean    47.438356                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean    43.447321                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev    21.997466                      
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |           0      0.00%      0.00% |          45     61.64%     61.64% |           2      2.74%     64.38% |          22     30.14%     94.52% |           2      2.74%     97.26% |           0      0.00%     97.26% |           1      1.37%     98.63% |           1      1.37%    100.00% |           0      0.00%    100.00%
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total           73                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size           32                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket          319                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples          237                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean    59.113924                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean    54.365760                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev    25.891554                      
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr |           0      0.00%      0.00% |          83     35.02%     35.02% |         146     61.60%     96.62% |           1      0.42%     97.05% |           1      0.42%     97.47% |           6      2.53%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total          237                      
system.ruby.Directory_Controller.GETX             438      0.00%      0.00%
system.ruby.Directory_Controller.PUTX             434      0.00%      0.00%
system.ruby.Directory_Controller.Memory_Data          438      0.00%      0.00%
system.ruby.Directory_Controller.Memory_Ack          434      0.00%      0.00%
system.ruby.Directory_Controller.I.GETX           438      0.00%      0.00%
system.ruby.Directory_Controller.M.PUTX           434      0.00%      0.00%
system.ruby.Directory_Controller.IM.Memory_Data          438      0.00%      0.00%
system.ruby.Directory_Controller.MI.Memory_Ack          434      0.00%      0.00%
system.ruby.L1Cache_Controller.Load               289      0.00%      0.00%
system.ruby.L1Cache_Controller.Ifetch            1597      0.00%      0.00%
system.ruby.L1Cache_Controller.Store              279      0.00%      0.00%
system.ruby.L1Cache_Controller.Data               438      0.00%      0.00%
system.ruby.L1Cache_Controller.Replacement          434      0.00%      0.00%
system.ruby.L1Cache_Controller.Writeback_Ack          434      0.00%      0.00%
system.ruby.L1Cache_Controller.I.Load             128      0.00%      0.00%
system.ruby.L1Cache_Controller.I.Ifetch           237      0.00%      0.00%
system.ruby.L1Cache_Controller.I.Store             73      0.00%      0.00%
system.ruby.L1Cache_Controller.M.Load             161      0.00%      0.00%
system.ruby.L1Cache_Controller.M.Ifetch          1360      0.00%      0.00%
system.ruby.L1Cache_Controller.M.Store            206      0.00%      0.00%
system.ruby.L1Cache_Controller.M.Replacement          434      0.00%      0.00%
system.ruby.L1Cache_Controller.MI.Writeback_Ack          434      0.00%      0.00%
system.ruby.L1Cache_Controller.IS.Data            365      0.00%      0.00%
system.ruby.L1Cache_Controller.IM.Data             73      0.00%      0.00%

---------- End Simulation Statistics   ----------