stats.txt revision 6692
1 2---------- Begin Simulation Statistics ---------- 3host_inst_rate 259216 # Simulator instruction rate (inst/s) 4host_mem_usage 263696 # Number of bytes of host memory used 5host_seconds 0.02 # Real time elapsed on the host 6host_tick_rate 128114508 # Simulator tick rate (ticks/s) 7sim_freq 1000000000000 # Frequency of simulated ticks 8sim_insts 5801 # Number of instructions simulated 9sim_seconds 0.000003 # Number of seconds simulated 10sim_ticks 2900000 # Number of ticks simulated 11system.cpu.dtb.accesses 0 # DTB accesses 12system.cpu.dtb.hits 0 # DTB hits 13system.cpu.dtb.misses 0 # DTB misses 14system.cpu.dtb.read_accesses 0 # DTB read accesses 15system.cpu.dtb.read_hits 0 # DTB read hits 16system.cpu.dtb.read_misses 0 # DTB read misses 17system.cpu.dtb.write_accesses 0 # DTB write accesses 18system.cpu.dtb.write_hits 0 # DTB write hits 19system.cpu.dtb.write_misses 0 # DTB write misses 20system.cpu.idle_fraction 0 # Percentage of idle cycles 21system.cpu.itb.accesses 0 # DTB accesses 22system.cpu.itb.hits 0 # DTB hits 23system.cpu.itb.misses 0 # DTB misses 24system.cpu.itb.read_accesses 0 # DTB read accesses 25system.cpu.itb.read_hits 0 # DTB read hits 26system.cpu.itb.read_misses 0 # DTB read misses 27system.cpu.itb.write_accesses 0 # DTB write accesses 28system.cpu.itb.write_hits 0 # DTB write hits 29system.cpu.itb.write_misses 0 # DTB write misses 30system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 31system.cpu.numCycles 5801 # number of cpu cycles simulated 32system.cpu.num_insts 5801 # Number of instructions executed 33system.cpu.num_refs 2008 # Number of memory references 34system.cpu.workload.PROG:num_syscalls 9 # Number of system calls 35 36---------- End Simulation Statistics ---------- 37