stats.txt revision 10526:0068ad93a67e
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000116 # Number of seconds simulated 4sim_ticks 115508 # Number of ticks simulated 5final_tick 115508 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_inst_rate 2198 # Simulator instruction rate (inst/s) 8host_op_rate 2198 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 45146 # Simulator tick rate (ticks/s) 10host_mem_usage 435400 # Number of bytes of host memory used 11host_seconds 2.56 # Real time elapsed on the host 12sim_insts 5624 # Number of instructions simulated 13sim_ops 5624 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 94080 # Number of bytes read from this memory 17system.mem_ctrls.bytes_read::total 94080 # Number of bytes read from this memory 18system.mem_ctrls.bytes_written::ruby.dir_cntrl0 93824 # Number of bytes written to this memory 19system.mem_ctrls.bytes_written::total 93824 # Number of bytes written to this memory 20system.mem_ctrls.num_reads::ruby.dir_cntrl0 1470 # Number of read requests responded to by this memory 21system.mem_ctrls.num_reads::total 1470 # Number of read requests responded to by this memory 22system.mem_ctrls.num_writes::ruby.dir_cntrl0 1466 # Number of write requests responded to by this memory 23system.mem_ctrls.num_writes::total 1466 # Number of write requests responded to by this memory 24system.mem_ctrls.bw_read::ruby.dir_cntrl0 814489040 # Total read bandwidth from this memory (bytes/s) 25system.mem_ctrls.bw_read::total 814489040 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_write::ruby.dir_cntrl0 812272743 # Write bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::total 812272743 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_total::ruby.dir_cntrl0 1626761783 # Total bandwidth to/from this memory (bytes/s) 29system.mem_ctrls.bw_total::total 1626761783 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.readReqs 1470 # Number of read requests accepted 31system.mem_ctrls.writeReqs 1466 # Number of write requests accepted 32system.mem_ctrls.readBursts 1470 # Number of DRAM read bursts, including those serviced by the write queue 33system.mem_ctrls.writeBursts 1466 # Number of DRAM write bursts, including those merged in the write queue 34system.mem_ctrls.bytesReadDRAM 59264 # Total number of bytes read from DRAM 35system.mem_ctrls.bytesReadWrQ 34816 # Total number of bytes read from write queue 36system.mem_ctrls.bytesWritten 60672 # Total number of bytes written to DRAM 37system.mem_ctrls.bytesReadSys 94080 # Total read bytes from the system interface side 38system.mem_ctrls.bytesWrittenSys 93824 # Total written bytes from the system interface side 39system.mem_ctrls.servicedByWrQ 544 # Number of DRAM read bursts serviced by the write queue 40system.mem_ctrls.mergedWrBursts 493 # Number of DRAM write bursts merged with an existing one 41system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 42system.mem_ctrls.perBankRdBursts::0 33 # Per bank write bursts 43system.mem_ctrls.perBankRdBursts::1 0 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::2 0 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::3 0 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::4 7 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::5 3 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::6 12 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::7 86 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::8 65 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::9 244 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::10 102 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::11 43 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::12 100 # Per bank write bursts 55system.mem_ctrls.perBankRdBursts::13 45 # Per bank write bursts 56system.mem_ctrls.perBankRdBursts::14 173 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::15 13 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::0 35 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::4 7 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::5 3 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::6 13 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::7 76 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::8 60 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::9 244 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::10 103 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::11 45 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::12 110 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::13 43 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::14 194 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::15 15 # Per bank write bursts 74system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 75system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 76system.mem_ctrls.totGap 115437 # Total gap between requests 77system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 78system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::6 1470 # Read request sizes (log2) 84system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 85system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::6 1466 # Write request sizes (log2) 91system.mem_ctrls.rdQLenPdf::0 926 # What read queue length does an incoming req see 92system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 117system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 118system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 119system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 120system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 121system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 122system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 123system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::15 12 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::16 16 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::17 56 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::18 60 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::19 59 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::20 64 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::21 59 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::22 58 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::23 58 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::24 58 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::25 57 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::26 57 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::27 57 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::28 57 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::29 57 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::30 57 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::31 57 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::32 57 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::34 1 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 187system.mem_ctrls.bytesPerActivate::samples 349 # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::mean 341.455587 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::gmean 225.575393 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::stdev 311.156448 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::0-127 80 22.92% 22.92% # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::128-255 99 28.37% 51.29% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::256-383 59 16.91% 68.19% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::384-511 25 7.16% 75.36% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::512-639 22 6.30% 81.66% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::640-767 9 2.58% 84.24% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::768-895 12 3.44% 87.68% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::896-1023 6 1.72% 89.40% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::1024-1151 37 10.60% 100.00% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::total 349 # Bytes accessed per row activation 201system.mem_ctrls.rdPerTurnAround::samples 57 # Reads before turning the bus around for writes 202system.mem_ctrls.rdPerTurnAround::mean 16.070175 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::gmean 15.908868 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::stdev 2.750712 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::12-13 2 3.51% 3.51% # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::14-15 24 42.11% 45.61% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::16-17 25 43.86% 89.47% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::18-19 5 8.77% 98.25% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::34-35 1 1.75% 100.00% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::total 57 # Reads before turning the bus around for writes 211system.mem_ctrls.wrPerTurnAround::samples 57 # Writes before turning the bus around for reads 212system.mem_ctrls.wrPerTurnAround::mean 16.631579 # Writes before turning the bus around for reads 213system.mem_ctrls.wrPerTurnAround::gmean 16.601010 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::stdev 1.045937 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::16 39 68.42% 68.42% # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::17 5 8.77% 77.19% # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::18 9 15.79% 92.98% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::19 3 5.26% 98.25% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::20 1 1.75% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 57 # Writes before turning the bus around for reads 221system.mem_ctrls.totQLat 12468 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 30062 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 4630 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 13.46 # Average queueing delay per DRAM burst 225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 226system.mem_ctrls.avgMemAccLat 32.46 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 513.07 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 525.26 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 814.49 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 812.27 # Average system write bandwidth in MiByte/s 231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 232system.mem_ctrls.busUtil 8.11 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 4.01 # Data bus utilization in percentage for reads 234system.mem_ctrls.busUtilWrite 4.10 # Data bus utilization in percentage for writes 235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing 236system.mem_ctrls.avgWrQLen 25.51 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 626 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 891 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 67.60 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 91.57 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 39.32 # Average gap between requests 242system.mem_ctrls.pageHitRate 79.88 # Row buffer hit rate, read and write combined 243system.mem_ctrls.memoryStateTime::IDLE 12 # Time in different power states 244system.mem_ctrls.memoryStateTime::REF 3640 # Time in different power states 245system.mem_ctrls.memoryStateTime::PRE_PDN 0 # Time in different power states 246system.mem_ctrls.memoryStateTime::ACT 105626 # Time in different power states 247system.mem_ctrls.memoryStateTime::ACT_PDN 0 # Time in different power states 248system.mem_ctrls.actEnergy::0 453600 # Energy for activate commands per rank (pJ) 249system.mem_ctrls.actEnergy::1 2033640 # Energy for activate commands per rank (pJ) 250system.mem_ctrls.preEnergy::0 252000 # Energy for precharge commands per rank (pJ) 251system.mem_ctrls.preEnergy::1 1129800 # Energy for precharge commands per rank (pJ) 252system.mem_ctrls.readEnergy::0 1547520 # Energy for read commands per rank (pJ) 253system.mem_ctrls.readEnergy::1 9409920 # Energy for read commands per rank (pJ) 254system.mem_ctrls.writeEnergy::0 1213056 # Energy for write commands per rank (pJ) 255system.mem_ctrls.writeEnergy::1 8107776 # Energy for write commands per rank (pJ) 256system.mem_ctrls.refreshEnergy::0 7119840 # Energy for refresh commands per rank (pJ) 257system.mem_ctrls.refreshEnergy::1 7119840 # Energy for refresh commands per rank (pJ) 258system.mem_ctrls.actBackEnergy::0 51518196 # Energy for active background per rank (pJ) 259system.mem_ctrls.actBackEnergy::1 74359692 # Energy for active background per rank (pJ) 260system.mem_ctrls.preBackEnergy::0 20367000 # Energy for precharge background per rank (pJ) 261system.mem_ctrls.preBackEnergy::1 330600 # Energy for precharge background per rank (pJ) 262system.mem_ctrls.totalEnergy::0 82471212 # Total energy per rank (pJ) 263system.mem_ctrls.totalEnergy::1 102491268 # Total energy per rank (pJ) 264system.mem_ctrls.averagePower::0 754.788512 # Core power per rank (mW) 265system.mem_ctrls.averagePower::1 938.014973 # Core power per rank (mW) 266system.ruby.clk_domain.clock 1 # Clock period in ticks 267system.ruby.delayHist::bucket_size 1 # delay histogram for all message 268system.ruby.delayHist::max_bucket 9 # delay histogram for all message 269system.ruby.delayHist::samples 2936 # delay histogram for all message 270system.ruby.delayHist | 2936 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 271system.ruby.delayHist::total 2936 # delay histogram for all message 272system.ruby.outstanding_req_hist::bucket_size 1 273system.ruby.outstanding_req_hist::max_bucket 9 274system.ruby.outstanding_req_hist::samples 7659 275system.ruby.outstanding_req_hist::mean 1 276system.ruby.outstanding_req_hist::gmean 1 277system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 7659 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 278system.ruby.outstanding_req_hist::total 7659 279system.ruby.latency_hist::bucket_size 64 280system.ruby.latency_hist::max_bucket 639 281system.ruby.latency_hist::samples 7658 282system.ruby.latency_hist::mean 14.083312 283system.ruby.latency_hist::gmean 5.240199 284system.ruby.latency_hist::stdev 27.247033 285system.ruby.latency_hist | 7337 95.81% 95.81% | 269 3.51% 99.32% | 34 0.44% 99.76% | 10 0.13% 99.90% | 4 0.05% 99.95% | 3 0.04% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 286system.ruby.latency_hist::total 7658 287system.ruby.hit_latency_hist::bucket_size 1 288system.ruby.hit_latency_hist::max_bucket 9 289system.ruby.hit_latency_hist::samples 6188 290system.ruby.hit_latency_hist::mean 3 291system.ruby.hit_latency_hist::gmean 3.000000 292system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6188 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 293system.ruby.hit_latency_hist::total 6188 294system.ruby.miss_latency_hist::bucket_size 64 295system.ruby.miss_latency_hist::max_bucket 639 296system.ruby.miss_latency_hist::samples 1470 297system.ruby.miss_latency_hist::mean 60.738776 298system.ruby.miss_latency_hist::gmean 54.828482 299system.ruby.miss_latency_hist::stdev 34.263958 300system.ruby.miss_latency_hist | 1149 78.16% 78.16% | 269 18.30% 96.46% | 34 2.31% 98.78% | 10 0.68% 99.46% | 4 0.27% 99.73% | 3 0.20% 99.93% | 0 0.00% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 301system.ruby.miss_latency_hist::total 1470 302system.ruby.Directory.incomplete_times 1469 303system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 304system.ruby.l1_cntrl0.cacheMemory.demand_hits 6188 # Number of cache demand hits 305system.ruby.l1_cntrl0.cacheMemory.demand_misses 1470 # Number of cache demand misses 306system.ruby.l1_cntrl0.cacheMemory.demand_accesses 7658 # Number of cache demand accesses 307system.cpu.clk_domain.clock 1 # Clock period in ticks 308system.ruby.network.routers0.percent_links_utilized 6.354538 309system.ruby.network.routers0.msg_count.Control::2 1470 310system.ruby.network.routers0.msg_count.Data::2 1466 311system.ruby.network.routers0.msg_count.Response_Data::4 1470 312system.ruby.network.routers0.msg_count.Writeback_Control::3 1466 313system.ruby.network.routers0.msg_bytes.Control::2 11760 314system.ruby.network.routers0.msg_bytes.Data::2 105552 315system.ruby.network.routers0.msg_bytes.Response_Data::4 105840 316system.ruby.network.routers0.msg_bytes.Writeback_Control::3 11728 317system.ruby.network.routers1.percent_links_utilized 6.354538 318system.ruby.network.routers1.msg_count.Control::2 1470 319system.ruby.network.routers1.msg_count.Data::2 1466 320system.ruby.network.routers1.msg_count.Response_Data::4 1470 321system.ruby.network.routers1.msg_count.Writeback_Control::3 1466 322system.ruby.network.routers1.msg_bytes.Control::2 11760 323system.ruby.network.routers1.msg_bytes.Data::2 105552 324system.ruby.network.routers1.msg_bytes.Response_Data::4 105840 325system.ruby.network.routers1.msg_bytes.Writeback_Control::3 11728 326system.ruby.network.routers2.percent_links_utilized 6.354538 327system.ruby.network.routers2.msg_count.Control::2 1470 328system.ruby.network.routers2.msg_count.Data::2 1466 329system.ruby.network.routers2.msg_count.Response_Data::4 1470 330system.ruby.network.routers2.msg_count.Writeback_Control::3 1466 331system.ruby.network.routers2.msg_bytes.Control::2 11760 332system.ruby.network.routers2.msg_bytes.Data::2 105552 333system.ruby.network.routers2.msg_bytes.Response_Data::4 105840 334system.ruby.network.routers2.msg_bytes.Writeback_Control::3 11728 335system.ruby.network.msg_count.Control 4410 336system.ruby.network.msg_count.Data 4398 337system.ruby.network.msg_count.Response_Data 4410 338system.ruby.network.msg_count.Writeback_Control 4398 339system.ruby.network.msg_byte.Control 35280 340system.ruby.network.msg_byte.Data 316656 341system.ruby.network.msg_byte.Response_Data 317520 342system.ruby.network.msg_byte.Writeback_Control 35184 343system.cpu.dtb.read_hits 0 # DTB read hits 344system.cpu.dtb.read_misses 0 # DTB read misses 345system.cpu.dtb.read_accesses 0 # DTB read accesses 346system.cpu.dtb.write_hits 0 # DTB write hits 347system.cpu.dtb.write_misses 0 # DTB write misses 348system.cpu.dtb.write_accesses 0 # DTB write accesses 349system.cpu.dtb.hits 0 # DTB hits 350system.cpu.dtb.misses 0 # DTB misses 351system.cpu.dtb.accesses 0 # DTB accesses 352system.cpu.itb.read_hits 0 # DTB read hits 353system.cpu.itb.read_misses 0 # DTB read misses 354system.cpu.itb.read_accesses 0 # DTB read accesses 355system.cpu.itb.write_hits 0 # DTB write hits 356system.cpu.itb.write_misses 0 # DTB write misses 357system.cpu.itb.write_accesses 0 # DTB write accesses 358system.cpu.itb.hits 0 # DTB hits 359system.cpu.itb.misses 0 # DTB misses 360system.cpu.itb.accesses 0 # DTB accesses 361system.cpu.workload.num_syscalls 7 # Number of system calls 362system.cpu.numCycles 115508 # number of cpu cycles simulated 363system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 364system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 365system.cpu.committedInsts 5624 # Number of instructions committed 366system.cpu.committedOps 5624 # Number of ops (including micro ops) committed 367system.cpu.num_int_alu_accesses 4944 # Number of integer alu accesses 368system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses 369system.cpu.num_func_calls 190 # number of times a function call or return occured 370system.cpu.num_conditional_control_insts 649 # number of instructions that are conditional controls 371system.cpu.num_int_insts 4944 # number of integer instructions 372system.cpu.num_fp_insts 2 # number of float instructions 373system.cpu.num_int_register_reads 7054 # number of times the integer registers were read 374system.cpu.num_int_register_writes 3281 # number of times the integer registers were written 375system.cpu.num_fp_register_reads 3 # number of times the floating registers were read 376system.cpu.num_fp_register_writes 1 # number of times the floating registers were written 377system.cpu.num_mem_refs 2034 # number of memory refs 378system.cpu.num_load_insts 1132 # Number of load instructions 379system.cpu.num_store_insts 902 # Number of store instructions 380system.cpu.num_idle_cycles 0 # Number of idle cycles 381system.cpu.num_busy_cycles 115508 # Number of busy cycles 382system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 383system.cpu.idle_fraction 0 # Percentage of idle cycles 384system.cpu.Branches 883 # Number of branches fetched 385system.cpu.op_class::No_OpClass 637 11.32% 11.32% # Class of executed instruction 386system.cpu.op_class::IntAlu 2950 52.44% 63.77% # Class of executed instruction 387system.cpu.op_class::IntMult 2 0.04% 63.80% # Class of executed instruction 388system.cpu.op_class::IntDiv 0 0.00% 63.80% # Class of executed instruction 389system.cpu.op_class::FloatAdd 2 0.04% 63.84% # Class of executed instruction 390system.cpu.op_class::FloatCmp 0 0.00% 63.84% # Class of executed instruction 391system.cpu.op_class::FloatCvt 0 0.00% 63.84% # Class of executed instruction 392system.cpu.op_class::FloatMult 0 0.00% 63.84% # Class of executed instruction 393system.cpu.op_class::FloatDiv 0 0.00% 63.84% # Class of executed instruction 394system.cpu.op_class::FloatSqrt 0 0.00% 63.84% # Class of executed instruction 395system.cpu.op_class::SimdAdd 0 0.00% 63.84% # Class of executed instruction 396system.cpu.op_class::SimdAddAcc 0 0.00% 63.84% # Class of executed instruction 397system.cpu.op_class::SimdAlu 0 0.00% 63.84% # Class of executed instruction 398system.cpu.op_class::SimdCmp 0 0.00% 63.84% # Class of executed instruction 399system.cpu.op_class::SimdCvt 0 0.00% 63.84% # Class of executed instruction 400system.cpu.op_class::SimdMisc 0 0.00% 63.84% # Class of executed instruction 401system.cpu.op_class::SimdMult 0 0.00% 63.84% # Class of executed instruction 402system.cpu.op_class::SimdMultAcc 0 0.00% 63.84% # Class of executed instruction 403system.cpu.op_class::SimdShift 0 0.00% 63.84% # Class of executed instruction 404system.cpu.op_class::SimdShiftAcc 0 0.00% 63.84% # Class of executed instruction 405system.cpu.op_class::SimdSqrt 0 0.00% 63.84% # Class of executed instruction 406system.cpu.op_class::SimdFloatAdd 0 0.00% 63.84% # Class of executed instruction 407system.cpu.op_class::SimdFloatAlu 0 0.00% 63.84% # Class of executed instruction 408system.cpu.op_class::SimdFloatCmp 0 0.00% 63.84% # Class of executed instruction 409system.cpu.op_class::SimdFloatCvt 0 0.00% 63.84% # Class of executed instruction 410system.cpu.op_class::SimdFloatDiv 0 0.00% 63.84% # Class of executed instruction 411system.cpu.op_class::SimdFloatMisc 0 0.00% 63.84% # Class of executed instruction 412system.cpu.op_class::SimdFloatMult 0 0.00% 63.84% # Class of executed instruction 413system.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.84% # Class of executed instruction 414system.cpu.op_class::SimdFloatSqrt 0 0.00% 63.84% # Class of executed instruction 415system.cpu.op_class::MemRead 1132 20.12% 83.96% # Class of executed instruction 416system.cpu.op_class::MemWrite 902 16.04% 100.00% # Class of executed instruction 417system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 418system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 419system.cpu.op_class::total 5625 # Class of executed instruction 420system.ruby.network.routers0.throttle0.link_utilization 6.361464 421system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1470 422system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1466 423system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 105840 424system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 11728 425system.ruby.network.routers0.throttle1.link_utilization 6.347612 426system.ruby.network.routers0.throttle1.msg_count.Control::2 1470 427system.ruby.network.routers0.throttle1.msg_count.Data::2 1466 428system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11760 429system.ruby.network.routers0.throttle1.msg_bytes.Data::2 105552 430system.ruby.network.routers1.throttle0.link_utilization 6.347612 431system.ruby.network.routers1.throttle0.msg_count.Control::2 1470 432system.ruby.network.routers1.throttle0.msg_count.Data::2 1466 433system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11760 434system.ruby.network.routers1.throttle0.msg_bytes.Data::2 105552 435system.ruby.network.routers1.throttle1.link_utilization 6.361464 436system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1470 437system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1466 438system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 105840 439system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 11728 440system.ruby.network.routers2.throttle0.link_utilization 6.361464 441system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1470 442system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1466 443system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 105840 444system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 11728 445system.ruby.network.routers2.throttle1.link_utilization 6.347612 446system.ruby.network.routers2.throttle1.msg_count.Control::2 1470 447system.ruby.network.routers2.throttle1.msg_count.Data::2 1466 448system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11760 449system.ruby.network.routers2.throttle1.msg_bytes.Data::2 105552 450system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 451system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 452system.ruby.delayVCHist.vnet_1::samples 1470 # delay histogram for vnet_1 453system.ruby.delayVCHist.vnet_1 | 1470 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 454system.ruby.delayVCHist.vnet_1::total 1470 # delay histogram for vnet_1 455system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 456system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 457system.ruby.delayVCHist.vnet_2::samples 1466 # delay histogram for vnet_2 458system.ruby.delayVCHist.vnet_2 | 1466 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 459system.ruby.delayVCHist.vnet_2::total 1466 # delay histogram for vnet_2 460system.ruby.LD.latency_hist::bucket_size 64 461system.ruby.LD.latency_hist::max_bucket 639 462system.ruby.LD.latency_hist::samples 1132 463system.ruby.LD.latency_hist::mean 35.522968 464system.ruby.LD.latency_hist::gmean 16.130611 465system.ruby.LD.latency_hist::stdev 37.257775 466system.ruby.LD.latency_hist | 989 87.37% 87.37% | 116 10.25% 97.61% | 20 1.77% 99.38% | 4 0.35% 99.73% | 2 0.18% 99.91% | 1 0.09% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 467system.ruby.LD.latency_hist::total 1132 468system.ruby.LD.hit_latency_hist::bucket_size 1 469system.ruby.LD.hit_latency_hist::max_bucket 9 470system.ruby.LD.hit_latency_hist::samples 465 471system.ruby.LD.hit_latency_hist::mean 3 472system.ruby.LD.hit_latency_hist::gmean 3.000000 473system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 465 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 474system.ruby.LD.hit_latency_hist::total 465 475system.ruby.LD.miss_latency_hist::bucket_size 64 476system.ruby.LD.miss_latency_hist::max_bucket 639 477system.ruby.LD.miss_latency_hist::samples 667 478system.ruby.LD.miss_latency_hist::mean 58.196402 479system.ruby.LD.miss_latency_hist::gmean 52.112336 480system.ruby.LD.miss_latency_hist::stdev 33.226027 481system.ruby.LD.miss_latency_hist | 524 78.56% 78.56% | 116 17.39% 95.95% | 20 3.00% 98.95% | 4 0.60% 99.55% | 2 0.30% 99.85% | 1 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 482system.ruby.LD.miss_latency_hist::total 667 483system.ruby.ST.latency_hist::bucket_size 64 484system.ruby.ST.latency_hist::max_bucket 639 485system.ruby.ST.latency_hist::samples 901 486system.ruby.ST.latency_hist::mean 15.558269 487system.ruby.ST.latency_hist::gmean 5.883337 488system.ruby.ST.latency_hist::stdev 27.738104 489system.ruby.ST.latency_hist | 860 95.45% 95.45% | 33 3.66% 99.11% | 6 0.67% 99.78% | 1 0.11% 99.89% | 0 0.00% 99.89% | 1 0.11% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 490system.ruby.ST.latency_hist::total 901 491system.ruby.ST.hit_latency_hist::bucket_size 1 492system.ruby.ST.hit_latency_hist::max_bucket 9 493system.ruby.ST.hit_latency_hist::samples 684 494system.ruby.ST.hit_latency_hist::mean 3 495system.ruby.ST.hit_latency_hist::gmean 3.000000 496system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 684 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 497system.ruby.ST.hit_latency_hist::total 684 498system.ruby.ST.miss_latency_hist::bucket_size 64 499system.ruby.ST.miss_latency_hist::max_bucket 639 500system.ruby.ST.miss_latency_hist::samples 217 501system.ruby.ST.miss_latency_hist::mean 55.142857 502system.ruby.ST.miss_latency_hist::gmean 49.160125 503system.ruby.ST.miss_latency_hist::stdev 33.648687 504system.ruby.ST.miss_latency_hist | 176 81.11% 81.11% | 33 15.21% 96.31% | 6 2.76% 99.08% | 1 0.46% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 505system.ruby.ST.miss_latency_hist::total 217 506system.ruby.IFETCH.latency_hist::bucket_size 64 507system.ruby.IFETCH.latency_hist::max_bucket 639 508system.ruby.IFETCH.latency_hist::samples 5625 509system.ruby.IFETCH.latency_hist::mean 9.532444 510system.ruby.IFETCH.latency_hist::gmean 4.102291 511system.ruby.IFETCH.latency_hist::stdev 22.246367 512system.ruby.IFETCH.latency_hist | 5488 97.56% 97.56% | 120 2.13% 99.70% | 8 0.14% 99.84% | 5 0.09% 99.93% | 2 0.04% 99.96% | 1 0.02% 99.98% | 0 0.00% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 513system.ruby.IFETCH.latency_hist::total 5625 514system.ruby.IFETCH.hit_latency_hist::bucket_size 1 515system.ruby.IFETCH.hit_latency_hist::max_bucket 9 516system.ruby.IFETCH.hit_latency_hist::samples 5039 517system.ruby.IFETCH.hit_latency_hist::mean 3 518system.ruby.IFETCH.hit_latency_hist::gmean 3.000000 519system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 5039 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 520system.ruby.IFETCH.hit_latency_hist::total 5039 521system.ruby.IFETCH.miss_latency_hist::bucket_size 64 522system.ruby.IFETCH.miss_latency_hist::max_bucket 639 523system.ruby.IFETCH.miss_latency_hist::samples 586 524system.ruby.IFETCH.miss_latency_hist::mean 65.704778 525system.ruby.IFETCH.miss_latency_hist::gmean 60.488386 526system.ruby.IFETCH.miss_latency_hist::stdev 35.064530 527system.ruby.IFETCH.miss_latency_hist | 449 76.62% 76.62% | 120 20.48% 97.10% | 8 1.37% 98.46% | 5 0.85% 99.32% | 2 0.34% 99.66% | 1 0.17% 99.83% | 0 0.00% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 528system.ruby.IFETCH.miss_latency_hist::total 586 529system.ruby.Directory.miss_mach_latency_hist::bucket_size 64 530system.ruby.Directory.miss_mach_latency_hist::max_bucket 639 531system.ruby.Directory.miss_mach_latency_hist::samples 1470 532system.ruby.Directory.miss_mach_latency_hist::mean 60.738776 533system.ruby.Directory.miss_mach_latency_hist::gmean 54.828482 534system.ruby.Directory.miss_mach_latency_hist::stdev 34.263958 535system.ruby.Directory.miss_mach_latency_hist | 1149 78.16% 78.16% | 269 18.30% 96.46% | 34 2.31% 98.78% | 10 0.68% 99.46% | 4 0.27% 99.73% | 3 0.20% 99.93% | 0 0.00% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 536system.ruby.Directory.miss_mach_latency_hist::total 1470 537system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1 538system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9 539system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1 540system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan 541system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 542system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1 543system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1 544system.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9 545system.ruby.Directory.miss_latency_hist.initial_to_forward::samples 1 546system.ruby.Directory.miss_latency_hist.initial_to_forward::stdev nan 547system.ruby.Directory.miss_latency_hist.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 548system.ruby.Directory.miss_latency_hist.initial_to_forward::total 1 549system.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1 550system.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9 551system.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 1 552system.ruby.Directory.miss_latency_hist.forward_to_first_response::stdev nan 553system.ruby.Directory.miss_latency_hist.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 554system.ruby.Directory.miss_latency_hist.forward_to_first_response::total 1 555system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8 556system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79 557system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1 558system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75 559system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000 560system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan 561system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 562system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1 563system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64 564system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639 565system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 667 566system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 58.196402 567system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 52.112336 568system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 33.226027 569system.ruby.LD.Directory.miss_type_mach_latency_hist | 524 78.56% 78.56% | 116 17.39% 95.95% | 20 3.00% 98.95% | 4 0.60% 99.55% | 2 0.30% 99.85% | 1 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 570system.ruby.LD.Directory.miss_type_mach_latency_hist::total 667 571system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 64 572system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 639 573system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 217 574system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 55.142857 575system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 49.160125 576system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 33.648687 577system.ruby.ST.Directory.miss_type_mach_latency_hist | 176 81.11% 81.11% | 33 15.21% 96.31% | 6 2.76% 99.08% | 1 0.46% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 578system.ruby.ST.Directory.miss_type_mach_latency_hist::total 217 579system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64 580system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639 581system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 586 582system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 65.704778 583system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 60.488386 584system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 35.064530 585system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 449 76.62% 76.62% | 120 20.48% 97.10% | 8 1.37% 98.46% | 5 0.85% 99.32% | 2 0.34% 99.66% | 1 0.17% 99.83% | 0 0.00% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 586system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 586 587system.ruby.L1Cache_Controller.Load 1132 0.00% 0.00% 588system.ruby.L1Cache_Controller.Ifetch 5625 0.00% 0.00% 589system.ruby.L1Cache_Controller.Store 901 0.00% 0.00% 590system.ruby.L1Cache_Controller.Data 1470 0.00% 0.00% 591system.ruby.L1Cache_Controller.Replacement 1466 0.00% 0.00% 592system.ruby.L1Cache_Controller.Writeback_Ack 1466 0.00% 0.00% 593system.ruby.L1Cache_Controller.I.Load 667 0.00% 0.00% 594system.ruby.L1Cache_Controller.I.Ifetch 586 0.00% 0.00% 595system.ruby.L1Cache_Controller.I.Store 217 0.00% 0.00% 596system.ruby.L1Cache_Controller.M.Load 465 0.00% 0.00% 597system.ruby.L1Cache_Controller.M.Ifetch 5039 0.00% 0.00% 598system.ruby.L1Cache_Controller.M.Store 684 0.00% 0.00% 599system.ruby.L1Cache_Controller.M.Replacement 1466 0.00% 0.00% 600system.ruby.L1Cache_Controller.MI.Writeback_Ack 1466 0.00% 0.00% 601system.ruby.L1Cache_Controller.IS.Data 1253 0.00% 0.00% 602system.ruby.L1Cache_Controller.IM.Data 217 0.00% 0.00% 603system.ruby.Directory_Controller.GETX 1470 0.00% 0.00% 604system.ruby.Directory_Controller.PUTX 1466 0.00% 0.00% 605system.ruby.Directory_Controller.Memory_Data 1470 0.00% 0.00% 606system.ruby.Directory_Controller.Memory_Ack 1466 0.00% 0.00% 607system.ruby.Directory_Controller.I.GETX 1470 0.00% 0.00% 608system.ruby.Directory_Controller.M.PUTX 1466 0.00% 0.00% 609system.ruby.Directory_Controller.IM.Memory_Data 1470 0.00% 0.00% 610system.ruby.Directory_Controller.MI.Memory_Ack 1466 0.00% 0.00% 611 612---------- End Simulation Statistics ---------- 613