config.ini revision 11219:b65d4e878ed2
12SN/A[root] 21762SN/Atype=Root 32SN/Achildren=system 42SN/Aeventq_index=0 52SN/Afull_system=false 62SN/Asim_quantum=0 72SN/Atime_sync_enable=false 82SN/Atime_sync_period=100000000000 92SN/Atime_sync_spin_threshold=100000000 102SN/A 112SN/A[system] 122SN/Atype=System 132SN/Achildren=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 142SN/Aboot_osflags=a 152SN/Acache_line_size=64 162SN/Aclk_domain=system.clk_domain 172SN/Aeventq_index=0 182SN/Ainit_param=0 192SN/Akernel= 202SN/Akernel_addr_check=true 212SN/Aload_addr_mask=1099511627775 222SN/Aload_offset=0 232SN/Amem_mode=timing 242SN/Amem_ranges= 252SN/Amemories=system.physmem 262SN/Ammap_using_noreserve=false 272665Ssaidi@eecs.umich.edumulti_thread=false 282665Ssaidi@eecs.umich.edunum_work_ids=16 292665Ssaidi@eecs.umich.edureadfile= 302665Ssaidi@eecs.umich.edusymbolfile= 312665Ssaidi@eecs.umich.eduwork_begin_ckpt_count=0 322SN/Awork_begin_cpu_id_exit=-1 332SN/Awork_begin_exit_count=0 342SN/Awork_cpus_ckpt_count=0 352SN/Awork_end_ckpt_count=0 362SN/Awork_end_exit_count=0 372973Sgblack@eecs.umich.eduwork_item_id=-1 3856SN/Asystem_port=system.membus.slave[0] 391717SN/A 402518SN/A[system.clk_domain] 4156SN/Atype=SrcClockDomain 422518SN/Aclock=1000 432518SN/Adomain_id=-1 442SN/Aeventq_index=0 452SN/Ainit_perf_level=0 462973Sgblack@eecs.umich.eduvoltage_domain=system.voltage_domain 472SN/A 482SN/A[system.cpu] 492SN/Atype=TimingSimpleCPU 502SN/Achildren=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 512SN/AbranchPred=Null 522SN/Achecker=Null 532SN/Aclk_domain=system.cpu_clk_domain 542SN/Acpu_id=0 552SN/Ado_checkpoint_insts=true 562SN/Ado_quiesce=true 573059Sgblack@eecs.umich.edudo_statistics_insts=true 583059Sgblack@eecs.umich.edudstage2_mmu=system.cpu.dstage2_mmu 593059Sgblack@eecs.umich.edudtb=system.cpu.dtb 603059Sgblack@eecs.umich.edueventq_index=0 613059Sgblack@eecs.umich.edufunction_trace=false 623059Sgblack@eecs.umich.edufunction_trace_start=0 633059Sgblack@eecs.umich.eduinterrupts=system.cpu.interrupts 643059Sgblack@eecs.umich.eduisa=system.cpu.isa 653059Sgblack@eecs.umich.eduistage2_mmu=system.cpu.istage2_mmu 663059Sgblack@eecs.umich.eduitb=system.cpu.itb 672973Sgblack@eecs.umich.edumax_insts_all_threads=0 682973Sgblack@eecs.umich.edumax_insts_any_thread=0 693059Sgblack@eecs.umich.edumax_loads_all_threads=0 703059Sgblack@eecs.umich.edumax_loads_any_thread=0 713059Sgblack@eecs.umich.edunumThreads=1 723059Sgblack@eecs.umich.eduprofile=0 733059Sgblack@eecs.umich.eduprogress_interval=0 743059Sgblack@eecs.umich.edusimpoint_start_insts= 753059Sgblack@eecs.umich.edusocket_id=0 763059Sgblack@eecs.umich.eduswitched_out=false 773059Sgblack@eecs.umich.edusystem=system 783059Sgblack@eecs.umich.edutracer=system.cpu.tracer 793059Sgblack@eecs.umich.eduworkload=system.cpu.workload 803059Sgblack@eecs.umich.edudcache_port=system.cpu.dcache.cpu_side 813059Sgblack@eecs.umich.eduicache_port=system.cpu.icache.cpu_side 823059Sgblack@eecs.umich.edu 833059Sgblack@eecs.umich.edu[system.cpu.dcache] 843059Sgblack@eecs.umich.edutype=Cache 853059Sgblack@eecs.umich.educhildren=tags 863059Sgblack@eecs.umich.eduaddr_ranges=0:18446744073709551615 873059Sgblack@eecs.umich.eduassoc=2 883059Sgblack@eecs.umich.educlk_domain=system.cpu_clk_domain 893059Sgblack@eecs.umich.educlusivity=mostly_incl 903059Sgblack@eecs.umich.edudemand_mshr_reserve=1 913059Sgblack@eecs.umich.edueventq_index=0 923059Sgblack@eecs.umich.eduforward_snoops=true 933059Sgblack@eecs.umich.eduhit_latency=2 943059Sgblack@eecs.umich.eduis_read_only=false 953059Sgblack@eecs.umich.edumax_miss_count=0 963059Sgblack@eecs.umich.edumshrs=4 973059Sgblack@eecs.umich.eduprefetch_on_access=false 983059Sgblack@eecs.umich.eduprefetcher=Null 993059Sgblack@eecs.umich.eduresponse_latency=2 1003059Sgblack@eecs.umich.edusequential_access=false 1013059Sgblack@eecs.umich.edusize=262144 1023059Sgblack@eecs.umich.edusystem=system 1033059Sgblack@eecs.umich.edutags=system.cpu.dcache.tags 1043059Sgblack@eecs.umich.edutgts_per_mshr=20 1053059Sgblack@eecs.umich.eduwrite_buffers=8 1063059Sgblack@eecs.umich.eduwriteback_clean=false 1073059Sgblack@eecs.umich.educpu_side=system.cpu.dcache_port 1083059Sgblack@eecs.umich.edumem_side=system.cpu.toL2Bus.slave[1] 1093059Sgblack@eecs.umich.edu 1103059Sgblack@eecs.umich.edu[system.cpu.dcache.tags] 1113059Sgblack@eecs.umich.edutype=LRU 1123059Sgblack@eecs.umich.eduassoc=2 1133059Sgblack@eecs.umich.edublock_size=64 1142973Sgblack@eecs.umich.educlk_domain=system.cpu_clk_domain 1152973Sgblack@eecs.umich.edueventq_index=0 1162973Sgblack@eecs.umich.eduhit_latency=2 1172973Sgblack@eecs.umich.edusequential_access=false 1182973Sgblack@eecs.umich.edusize=262144 1192973Sgblack@eecs.umich.edu 1202973Sgblack@eecs.umich.edu[system.cpu.dstage2_mmu] 1212973Sgblack@eecs.umich.edutype=ArmStage2MMU 1222973Sgblack@eecs.umich.educhildren=stage2_tlb 1232973Sgblack@eecs.umich.edueventq_index=0 1242973Sgblack@eecs.umich.edustage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 1252973Sgblack@eecs.umich.edusys=system 1262973Sgblack@eecs.umich.edutlb=system.cpu.dtb 1272973Sgblack@eecs.umich.edu 1282973Sgblack@eecs.umich.edu[system.cpu.dstage2_mmu.stage2_tlb] 1292973Sgblack@eecs.umich.edutype=ArmTLB 1302973Sgblack@eecs.umich.educhildren=walker 1312973Sgblack@eecs.umich.edueventq_index=0 1322973Sgblack@eecs.umich.eduis_stage2=true 1332973Sgblack@eecs.umich.edusize=32 1342973Sgblack@eecs.umich.eduwalker=system.cpu.dstage2_mmu.stage2_tlb.walker 1352973Sgblack@eecs.umich.edu 1362973Sgblack@eecs.umich.edu[system.cpu.dstage2_mmu.stage2_tlb.walker] 1372973Sgblack@eecs.umich.edutype=ArmTableWalker 1382973Sgblack@eecs.umich.educlk_domain=system.cpu_clk_domain 1392973Sgblack@eecs.umich.edueventq_index=0 1402973Sgblack@eecs.umich.eduis_stage2=true 1412973Sgblack@eecs.umich.edunum_squash_per_cycle=2 1422973Sgblack@eecs.umich.edusys=system 1431968SN/A 1441968SN/A[system.cpu.dtb] 1451968SN/Atype=ArmTLB 1461968SN/Achildren=walker 1471968SN/Aeventq_index=0 1481968SN/Ais_stage2=false 1491967SN/Asize=64 1501967SN/Awalker=system.cpu.dtb.walker 1511967SN/A 1521967SN/A[system.cpu.dtb.walker] 1531967SN/Atype=ArmTableWalker 1541967SN/Aclk_domain=system.cpu_clk_domain 1551967SN/Aeventq_index=0 1561967SN/Ais_stage2=false 1571967SN/Anum_squash_per_cycle=2 1581967SN/Asys=system 1591904SN/Aport=system.cpu.toL2Bus.slave[3] 1601904SN/A 1611904SN/A[system.cpu.icache] 1621904SN/Atype=Cache 163452SN/Achildren=tags 1641904SN/Aaddr_ranges=0:18446744073709551615 1652SN/Aassoc=2 1661904SN/Aclk_domain=system.cpu_clk_domain 1671904SN/Aclusivity=mostly_incl 1682SN/Ademand_mshr_reserve=1 1691904SN/Aeventq_index=0 1701904SN/Aforward_snoops=true 1712SN/Ahit_latency=2 1722SN/Ais_read_only=true 1731904SN/Amax_miss_count=0 1741904SN/Amshrs=4 1751904SN/Aprefetch_on_access=false 1762299SN/Aprefetcher=Null 1772299SN/Aresponse_latency=2 1781904SN/Asequential_access=false 1791904SN/Asize=131072 1801904SN/Asystem=system 1811904SN/Atags=system.cpu.icache.tags 1821904SN/Atgts_per_mshr=20 1831904SN/Awrite_buffers=8 1841904SN/Awriteback_clean=true 185452SN/Acpu_side=system.cpu.icache_port 1861904SN/Amem_side=system.cpu.toL2Bus.slave[0] 1871904SN/A 1881904SN/A[system.cpu.icache.tags] 1892SN/Atype=LRU 1902SN/Aassoc=2 1911904SN/Ablock_size=64 1921904SN/Aclk_domain=system.cpu_clk_domain 1931904SN/Aeventq_index=0 1941904SN/Ahit_latency=2 1951904SN/Asequential_access=false 1961904SN/Asize=131072 1972SN/A 1981904SN/A[system.cpu.interrupts] 1992SN/Atype=ArmInterrupts 2002SN/Aeventq_index=0 2011904SN/A 2022SN/A[system.cpu.isa] 2031904SN/Atype=ArmISA 2041904SN/AdecoderFlavour=Generic 2051904SN/Aeventq_index=0 2061904SN/Afpsid=1090793632 2071904SN/Aid_aa64afr0_el1=0 2081904SN/Aid_aa64afr1_el1=0 2091904SN/Aid_aa64dfr0_el1=1052678 2101904SN/Aid_aa64dfr1_el1=0 2111904SN/Aid_aa64isar0_el1=0 2121904SN/Aid_aa64isar1_el1=0 2131904SN/Aid_aa64mmfr0_el1=15728642 2141904SN/Aid_aa64mmfr1_el1=0 2151904SN/Aid_aa64pfr0_el1=17 2161904SN/Aid_aa64pfr1_el1=0 2171904SN/Aid_isar0=34607377 2181904SN/Aid_isar1=34677009 2191904SN/Aid_isar2=555950401 2201904SN/Aid_isar3=17899825 2211904SN/Aid_isar4=268501314 2221904SN/Aid_isar5=0 2232525SN/Aid_mmfr0=270536963 2241904SN/Aid_mmfr1=0 2252525SN/Aid_mmfr2=19070976 2262525SN/Aid_mmfr3=34611729 2272525SN/Aid_pfr0=49 2281904SN/Aid_pfr1=4113 2291904SN/Amidr=1091551472 2301904SN/Apmu=Null 2311904SN/Asystem=system 2321904SN/A 2331904SN/A[system.cpu.istage2_mmu] 2341904SN/Atype=ArmStage2MMU 2351904SN/Achildren=stage2_tlb 2361967SN/Aeventq_index=0 2371967SN/Astage2_tlb=system.cpu.istage2_mmu.stage2_tlb 2381967SN/Asys=system 2391967SN/Atlb=system.cpu.itb 2401967SN/A 2412SN/A[system.cpu.istage2_mmu.stage2_tlb] 2422SN/Atype=ArmTLB 2432SN/Achildren=walker 2442SN/Aeventq_index=0 2452SN/Ais_stage2=true 2461967SN/Asize=32 2472SN/Awalker=system.cpu.istage2_mmu.stage2_tlb.walker 2482SN/A 2492SN/A[system.cpu.istage2_mmu.stage2_tlb.walker] 2502SN/Atype=ArmTableWalker 2512SN/Aclk_domain=system.cpu_clk_domain 2522SN/Aeventq_index=0 2532SN/Ais_stage2=true 2542SN/Anum_squash_per_cycle=2 2552SN/Asys=system 2562SN/A 2572SN/A[system.cpu.itb] 2582SN/Atype=ArmTLB 2592SN/Achildren=walker 2602SN/Aeventq_index=0 2612SN/Ais_stage2=false 2622SN/Asize=64 2632SN/Awalker=system.cpu.itb.walker 2642SN/A 2652SN/A[system.cpu.itb.walker] 2662SN/Atype=ArmTableWalker 2671413SN/Aclk_domain=system.cpu_clk_domain 2682SN/Aeventq_index=0 2692SN/Ais_stage2=false 2702SN/Anum_squash_per_cycle=2 2712SN/Asys=system 2722SN/Aport=system.cpu.toL2Bus.slave[2] 2732SN/A 2742SN/A[system.cpu.l2cache] 2752SN/Atype=Cache 2762SN/Achildren=tags 2772SN/Aaddr_ranges=0:18446744073709551615 2782SN/Aassoc=8 2792SN/Aclk_domain=system.cpu_clk_domain 2802SN/Aclusivity=mostly_incl 2812SN/Ademand_mshr_reserve=1 2822SN/Aeventq_index=0 2832SN/Aforward_snoops=true 2842SN/Ahit_latency=20 2852973Sgblack@eecs.umich.eduis_read_only=false 2862973Sgblack@eecs.umich.edumax_miss_count=0 2872299SN/Amshrs=20 2882299SN/Aprefetch_on_access=false 2891904SN/Aprefetcher=Null 2901904SN/Aresponse_latency=20 2911967SN/Asequential_access=false 2921967SN/Asize=2097152 2931967SN/Asystem=system 2941904SN/Atags=system.cpu.l2cache.tags 2952SN/Atgts_per_mshr=12 2962SN/Awrite_buffers=8 2972SN/Awriteback_clean=false 2982SN/Acpu_side=system.cpu.toL2Bus.master[0] 2992SN/Amem_side=system.membus.slave[1] 3002SN/A 3012SN/A[system.cpu.l2cache.tags] 3022SN/Atype=LRU 3032SN/Aassoc=8 3042SN/Ablock_size=64 3052SN/Aclk_domain=system.cpu_clk_domain 3062SN/Aeventq_index=0 3072SN/Ahit_latency=20 3082SN/Asequential_access=false 3092SN/Asize=2097152 3102SN/A 3112SN/A[system.cpu.toL2Bus] 3122SN/Atype=CoherentXBar 3132973Sgblack@eecs.umich.educhildren=snoop_filter 3142299SN/Aclk_domain=system.cpu_clk_domain 3151904SN/Aeventq_index=0 3161967SN/Aforward_latency=0 3172SN/Afrontend_latency=1 3182SN/Aresponse_latency=1 3192SN/Asnoop_filter=system.cpu.toL2Bus.snoop_filter 3202SN/Asnoop_response_latency=1 3212SN/Asystem=system 3222SN/Ause_default_range=false 3232SN/Awidth=32 3242SN/Amaster=system.cpu.l2cache.cpu_side 325slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 326 327[system.cpu.toL2Bus.snoop_filter] 328type=SnoopFilter 329eventq_index=0 330lookup_latency=0 331max_capacity=8388608 332system=system 333 334[system.cpu.tracer] 335type=ExeTracer 336eventq_index=0 337 338[system.cpu.workload] 339type=LiveProcess 340cmd=hello 341cwd= 342drivers= 343egid=100 344env= 345errout=cerr 346euid=100 347eventq_index=0 348executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello 349gid=100 350input=cin 351kvmInSE=false 352max_stack_size=67108864 353output=cout 354pid=100 355ppid=99 356simpoint=0 357system=system 358uid=100 359useArchPT=false 360 361[system.cpu_clk_domain] 362type=SrcClockDomain 363clock=500 364domain_id=-1 365eventq_index=0 366init_perf_level=0 367voltage_domain=system.voltage_domain 368 369[system.dvfs_handler] 370type=DVFSHandler 371domains= 372enable=false 373eventq_index=0 374sys_clk_domain=system.clk_domain 375transition_latency=100000000 376 377[system.membus] 378type=CoherentXBar 379clk_domain=system.clk_domain 380eventq_index=0 381forward_latency=4 382frontend_latency=3 383response_latency=2 384snoop_filter=Null 385snoop_response_latency=4 386system=system 387use_default_range=false 388width=16 389master=system.physmem.port 390slave=system.system_port system.cpu.l2cache.mem_side 391 392[system.physmem] 393type=SimpleMemory 394bandwidth=73.000000 395clk_domain=system.clk_domain 396conf_table_reported=true 397eventq_index=0 398in_addr_map=true 399latency=30000 400latency_var=0 401null=false 402range=0:134217727 403port=system.membus.master[0] 404 405[system.voltage_domain] 406type=VoltageDomain 407eventq_index=0 408voltage=1.000000 409 410