config.ini revision 11570:4aac82f10951
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17default_p_state=UNDEFINED 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=atomic 26mem_ranges= 27memories=system.physmem 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[0] 47 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 51domain_id=-1 52eventq_index=0 53init_perf_level=0 54voltage_domain=system.voltage_domain 55 56[system.cpu] 57type=AtomicSimpleCPU 58children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload 59branchPred=Null 60checker=Null 61clk_domain=system.cpu_clk_domain 62cpu_id=0 63default_p_state=UNDEFINED 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dstage2_mmu=system.cpu.dstage2_mmu 68dtb=system.cpu.dtb 69eventq_index=0 70fastmem=false 71function_trace=false 72function_trace_start=0 73interrupts=system.cpu.interrupts 74isa=system.cpu.isa 75istage2_mmu=system.cpu.istage2_mmu 76itb=system.cpu.itb 77max_insts_all_threads=0 78max_insts_any_thread=0 79max_loads_all_threads=0 80max_loads_any_thread=0 81numThreads=1 82p_state_clk_gate_bins=20 83p_state_clk_gate_max=1000000000000 84p_state_clk_gate_min=1000 85power_model=Null 86profile=0 87progress_interval=0 88simpoint_start_insts= 89simulate_data_stalls=false 90simulate_inst_stalls=false 91socket_id=0 92switched_out=false 93system=system 94tracer=system.cpu.tracer 95width=1 96workload=system.cpu.workload 97dcache_port=system.membus.slave[2] 98icache_port=system.membus.slave[1] 99 100[system.cpu.dstage2_mmu] 101type=ArmStage2MMU 102children=stage2_tlb 103eventq_index=0 104stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 105sys=system 106tlb=system.cpu.dtb 107 108[system.cpu.dstage2_mmu.stage2_tlb] 109type=ArmTLB 110children=walker 111eventq_index=0 112is_stage2=true 113size=32 114walker=system.cpu.dstage2_mmu.stage2_tlb.walker 115 116[system.cpu.dstage2_mmu.stage2_tlb.walker] 117type=ArmTableWalker 118clk_domain=system.cpu_clk_domain 119default_p_state=UNDEFINED 120eventq_index=0 121is_stage2=true 122num_squash_per_cycle=2 123p_state_clk_gate_bins=20 124p_state_clk_gate_max=1000000000000 125p_state_clk_gate_min=1000 126power_model=Null 127sys=system 128 129[system.cpu.dtb] 130type=ArmTLB 131children=walker 132eventq_index=0 133is_stage2=false 134size=64 135walker=system.cpu.dtb.walker 136 137[system.cpu.dtb.walker] 138type=ArmTableWalker 139clk_domain=system.cpu_clk_domain 140default_p_state=UNDEFINED 141eventq_index=0 142is_stage2=false 143num_squash_per_cycle=2 144p_state_clk_gate_bins=20 145p_state_clk_gate_max=1000000000000 146p_state_clk_gate_min=1000 147power_model=Null 148sys=system 149port=system.membus.slave[4] 150 151[system.cpu.interrupts] 152type=ArmInterrupts 153eventq_index=0 154 155[system.cpu.isa] 156type=ArmISA 157decoderFlavour=Generic 158eventq_index=0 159fpsid=1090793632 160id_aa64afr0_el1=0 161id_aa64afr1_el1=0 162id_aa64dfr0_el1=1052678 163id_aa64dfr1_el1=0 164id_aa64isar0_el1=0 165id_aa64isar1_el1=0 166id_aa64mmfr0_el1=15728642 167id_aa64mmfr1_el1=0 168id_aa64pfr0_el1=17 169id_aa64pfr1_el1=0 170id_isar0=34607377 171id_isar1=34677009 172id_isar2=555950401 173id_isar3=17899825 174id_isar4=268501314 175id_isar5=0 176id_mmfr0=270536963 177id_mmfr1=0 178id_mmfr2=19070976 179id_mmfr3=34611729 180id_pfr0=49 181id_pfr1=4113 182midr=1091551472 183pmu=Null 184system=system 185 186[system.cpu.istage2_mmu] 187type=ArmStage2MMU 188children=stage2_tlb 189eventq_index=0 190stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 191sys=system 192tlb=system.cpu.itb 193 194[system.cpu.istage2_mmu.stage2_tlb] 195type=ArmTLB 196children=walker 197eventq_index=0 198is_stage2=true 199size=32 200walker=system.cpu.istage2_mmu.stage2_tlb.walker 201 202[system.cpu.istage2_mmu.stage2_tlb.walker] 203type=ArmTableWalker 204clk_domain=system.cpu_clk_domain 205default_p_state=UNDEFINED 206eventq_index=0 207is_stage2=true 208num_squash_per_cycle=2 209p_state_clk_gate_bins=20 210p_state_clk_gate_max=1000000000000 211p_state_clk_gate_min=1000 212power_model=Null 213sys=system 214 215[system.cpu.itb] 216type=ArmTLB 217children=walker 218eventq_index=0 219is_stage2=false 220size=64 221walker=system.cpu.itb.walker 222 223[system.cpu.itb.walker] 224type=ArmTableWalker 225clk_domain=system.cpu_clk_domain 226default_p_state=UNDEFINED 227eventq_index=0 228is_stage2=false 229num_squash_per_cycle=2 230p_state_clk_gate_bins=20 231p_state_clk_gate_max=1000000000000 232p_state_clk_gate_min=1000 233power_model=Null 234sys=system 235port=system.membus.slave[3] 236 237[system.cpu.tracer] 238type=ExeTracer 239eventq_index=0 240 241[system.cpu.workload] 242type=LiveProcess 243cmd=hello 244cwd= 245drivers= 246egid=100 247env= 248errout=cerr 249euid=100 250eventq_index=0 251executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/arm/linux/hello 252gid=100 253input=cin 254kvmInSE=false 255max_stack_size=67108864 256output=cout 257pid=100 258ppid=99 259simpoint=0 260system=system 261uid=100 262useArchPT=false 263 264[system.cpu_clk_domain] 265type=SrcClockDomain 266clock=500 267domain_id=-1 268eventq_index=0 269init_perf_level=0 270voltage_domain=system.voltage_domain 271 272[system.dvfs_handler] 273type=DVFSHandler 274domains= 275enable=false 276eventq_index=0 277sys_clk_domain=system.clk_domain 278transition_latency=100000000 279 280[system.membus] 281type=CoherentXBar 282clk_domain=system.clk_domain 283default_p_state=UNDEFINED 284eventq_index=0 285forward_latency=4 286frontend_latency=3 287p_state_clk_gate_bins=20 288p_state_clk_gate_max=1000000000000 289p_state_clk_gate_min=1000 290point_of_coherency=true 291power_model=Null 292response_latency=2 293snoop_filter=Null 294snoop_response_latency=4 295system=system 296use_default_range=false 297width=16 298master=system.physmem.port 299slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port 300 301[system.physmem] 302type=SimpleMemory 303bandwidth=73.000000 304clk_domain=system.clk_domain 305conf_table_reported=true 306default_p_state=UNDEFINED 307eventq_index=0 308in_addr_map=true 309latency=30000 310latency_var=0 311null=false 312p_state_clk_gate_bins=20 313p_state_clk_gate_max=1000000000000 314p_state_clk_gate_min=1000 315power_model=Null 316range=0:134217727 317port=system.membus.master[0] 318 319[system.voltage_domain] 320type=VoltageDomain 321eventq_index=0 322voltage=1.000000 323 324