config.ini revision 8546
19646SChris.Emmons@arm.com[root] 211897Ssudhanshu.jha@arm.comtype=Root 39646SChris.Emmons@arm.comchildren=system 49646SChris.Emmons@arm.comtime_sync_enable=false 59646SChris.Emmons@arm.comtime_sync_period=100000000000 69646SChris.Emmons@arm.comtime_sync_spin_threshold=100000000 79646SChris.Emmons@arm.com 89646SChris.Emmons@arm.com[system] 99646SChris.Emmons@arm.comtype=System 109646SChris.Emmons@arm.comchildren=cpu membus physmem 119646SChris.Emmons@arm.commem_mode=atomic 129646SChris.Emmons@arm.commemories=system.physmem 139646SChris.Emmons@arm.comphysmem=system.physmem 149646SChris.Emmons@arm.comwork_begin_ckpt_count=0 159646SChris.Emmons@arm.comwork_begin_cpu_id_exit=-1 169646SChris.Emmons@arm.comwork_begin_exit_count=0 179646SChris.Emmons@arm.comwork_cpus_ckpt_count=0 189646SChris.Emmons@arm.comwork_end_ckpt_count=0 199646SChris.Emmons@arm.comwork_end_exit_count=0 209646SChris.Emmons@arm.comwork_item_id=-1 219646SChris.Emmons@arm.com 229646SChris.Emmons@arm.com[system.cpu] 239646SChris.Emmons@arm.comtype=DerivO3CPU 249646SChris.Emmons@arm.comchildren=dcache dtb fuPool icache itb l2cache toL2Bus tracer workload 259646SChris.Emmons@arm.comBTBEntries=4096 269646SChris.Emmons@arm.comBTBTagSize=16 279646SChris.Emmons@arm.comLFSTSize=1024 289646SChris.Emmons@arm.comLQEntries=32 299646SChris.Emmons@arm.comLSQCheckLoads=true 309646SChris.Emmons@arm.comLSQDepCheckShift=4 319646SChris.Emmons@arm.comRASSize=16 329646SChris.Emmons@arm.comSQEntries=32 339646SChris.Emmons@arm.comSSITSize=1024 349646SChris.Emmons@arm.comactivity=0 359646SChris.Emmons@arm.combackComSize=5 369646SChris.Emmons@arm.comcachePorts=200 379646SChris.Emmons@arm.comchecker=Null 3811090Sandreas.sandberg@arm.comchoiceCtrBits=2 399646SChris.Emmons@arm.comchoicePredictorSize=8192 409646SChris.Emmons@arm.comclock=500 4110839Sandreas.sandberg@arm.comcommitToDecodeDelay=1 4210839Sandreas.sandberg@arm.comcommitToFetchDelay=1 439646SChris.Emmons@arm.comcommitToIEWDelay=1 449646SChris.Emmons@arm.comcommitToRenameDelay=1 4511793Sbrandon.potter@amd.comcommitWidth=8 4611090Sandreas.sandberg@arm.comcpu_id=0 479646SChris.Emmons@arm.comdecodeToFetchDelay=1 489646SChris.Emmons@arm.comdecodeToRenameDelay=1 499646SChris.Emmons@arm.comdecodeWidth=8 5012232Sgiacomo.travaglini@arm.comdefer_registration=false 519646SChris.Emmons@arm.comdispatchWidth=8 529646SChris.Emmons@arm.comdo_checkpoint_insts=true 5311090Sandreas.sandberg@arm.comdo_statistics_insts=true 549646SChris.Emmons@arm.comdtb=system.cpu.dtb 559646SChris.Emmons@arm.comfetchToDecodeDelay=1 569646SChris.Emmons@arm.comfetchTrapLatency=1 579646SChris.Emmons@arm.comfetchWidth=8 589646SChris.Emmons@arm.comforwardComSize=5 599646SChris.Emmons@arm.comfuPool=system.cpu.fuPool 6011090Sandreas.sandberg@arm.comfunction_trace=false 6111090Sandreas.sandberg@arm.comfunction_trace_start=0 6211090Sandreas.sandberg@arm.comglobalCtrBits=2 6311090Sandreas.sandberg@arm.comglobalHistoryBits=13 6411090Sandreas.sandberg@arm.comglobalPredictorSize=8192 6511090Sandreas.sandberg@arm.comiewToCommitDelay=1 6611090Sandreas.sandberg@arm.comiewToDecodeDelay=1 6711090Sandreas.sandberg@arm.comiewToFetchDelay=1 6811090Sandreas.sandberg@arm.comiewToRenameDelay=1 6911898Ssudhanshu.jha@arm.cominstShiftAmt=2 7011090Sandreas.sandberg@arm.comissueToExecuteDelay=1 7111090Sandreas.sandberg@arm.comissueWidth=8 7211090Sandreas.sandberg@arm.comitb=system.cpu.itb 7311090Sandreas.sandberg@arm.comlocalCtrBits=2 7411090Sandreas.sandberg@arm.comlocalHistoryBits=11 759646SChris.Emmons@arm.comlocalHistoryTableSize=2048 769646SChris.Emmons@arm.comlocalPredictorSize=2048 7711090Sandreas.sandberg@arm.commax_insts_all_threads=0 789646SChris.Emmons@arm.commax_insts_any_thread=0 799646SChris.Emmons@arm.commax_loads_all_threads=0 8011090Sandreas.sandberg@arm.commax_loads_any_thread=0 8111090Sandreas.sandberg@arm.comnumIQEntries=64 8211090Sandreas.sandberg@arm.comnumPhysFloatRegs=256 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10311091Sandreas.sandberg@arm.comsmtROBThreshold=100 10411091Sandreas.sandberg@arm.comsquashWidth=8 10511523Sdavid.guillen@arm.comstore_set_clear_period=250000 10611523Sdavid.guillen@arm.comsystem=system 10711091Sandreas.sandberg@arm.comtracer=system.cpu.tracer 10811091Sandreas.sandberg@arm.comtrapLatency=13 10911091Sandreas.sandberg@arm.comwbDepth=1 11011091Sandreas.sandberg@arm.comwbWidth=8 11111091Sandreas.sandberg@arm.comworkload=system.cpu.workload 11211091Sandreas.sandberg@arm.comdcache_port=system.cpu.dcache.cpu_side 11311091Sandreas.sandberg@arm.comicache_port=system.cpu.icache.cpu_side 11411091Sandreas.sandberg@arm.com 11511091Sandreas.sandberg@arm.com[system.cpu.dcache] 11611091Sandreas.sandberg@arm.comtype=BaseCache 11711090Sandreas.sandberg@arm.comaddr_range=0:18446744073709551615 11811090Sandreas.sandberg@arm.comassoc=2 11911090Sandreas.sandberg@arm.comblock_size=64 12011090Sandreas.sandberg@arm.comforward_snoops=true 12111090Sandreas.sandberg@arm.comhash_delay=1 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14111090Sandreas.sandberg@arm.comtrace_addr=0 14211090Sandreas.sandberg@arm.comtwo_queue=false 14311090Sandreas.sandberg@arm.comwrite_buffers=8 14411090Sandreas.sandberg@arm.comcpu_side=system.cpu.dcache_port 14511090Sandreas.sandberg@arm.commem_side=system.cpu.toL2Bus.port[1] 14611090Sandreas.sandberg@arm.com 14711090Sandreas.sandberg@arm.com[system.cpu.dtb] 14811090Sandreas.sandberg@arm.comtype=ArmTLB 14911090Sandreas.sandberg@arm.comsize=64 15011090Sandreas.sandberg@arm.com 15111090Sandreas.sandberg@arm.com[system.cpu.fuPool] 15211090Sandreas.sandberg@arm.comtype=FUPool 15311090Sandreas.sandberg@arm.comchildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 15411090Sandreas.sandberg@arm.comFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 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2509646SChris.Emmons@arm.comopList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 25113230Sgabeblack@google.com 2529646SChris.Emmons@arm.com[system.cpu.fuPool.FUList5.opList00] 2539646SChris.Emmons@arm.comtype=OpDesc 2549646SChris.Emmons@arm.comissueLat=1 2559646SChris.Emmons@arm.comopClass=SimdAdd 2569646SChris.Emmons@arm.comopLat=1 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40211090Sandreas.sandberg@arm.com[system.cpu.fuPool.FUList8] 40311090Sandreas.sandberg@arm.comtype=FUDesc 40411090Sandreas.sandberg@arm.comchildren=opList 40511090Sandreas.sandberg@arm.comcount=1 40611090Sandreas.sandberg@arm.comopList=system.cpu.fuPool.FUList8.opList 40711090Sandreas.sandberg@arm.com 40811090Sandreas.sandberg@arm.com[system.cpu.fuPool.FUList8.opList] 40911090Sandreas.sandberg@arm.comtype=OpDesc 41011090Sandreas.sandberg@arm.comissueLat=3 41111090Sandreas.sandberg@arm.comopClass=IprAccess 41211090Sandreas.sandberg@arm.comopLat=3 41311090Sandreas.sandberg@arm.com 41411090Sandreas.sandberg@arm.com[system.cpu.icache] 41511090Sandreas.sandberg@arm.comtype=BaseCache 41611090Sandreas.sandberg@arm.comaddr_range=0:18446744073709551615 41711090Sandreas.sandberg@arm.comassoc=2 41811090Sandreas.sandberg@arm.comblock_size=64 41911090Sandreas.sandberg@arm.comforward_snoops=true 42011090Sandreas.sandberg@arm.comhash_delay=1 42111090Sandreas.sandberg@arm.comis_top_level=true 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47911090Sandreas.sandberg@arm.comcpu_side=system.cpu.toL2Bus.port[2] 48011090Sandreas.sandberg@arm.commem_side=system.membus.port[1] 48111090Sandreas.sandberg@arm.com 48211090Sandreas.sandberg@arm.com[system.cpu.toL2Bus] 48311090Sandreas.sandberg@arm.comtype=Bus 48411090Sandreas.sandberg@arm.comblock_size=64 48511090Sandreas.sandberg@arm.combus_id=0 48611090Sandreas.sandberg@arm.comclock=1000 48711090Sandreas.sandberg@arm.comheader_cycles=1 48811090Sandreas.sandberg@arm.comuse_default_range=false 48911090Sandreas.sandberg@arm.comwidth=64 49011090Sandreas.sandberg@arm.comport=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side 49111090Sandreas.sandberg@arm.com 49211090Sandreas.sandberg@arm.com[system.cpu.tracer] 49311090Sandreas.sandberg@arm.comtype=ExeTracer 49411090Sandreas.sandberg@arm.com 49511090Sandreas.sandberg@arm.com[system.cpu.workload] 49611090Sandreas.sandberg@arm.comtype=LiveProcess 49711090Sandreas.sandberg@arm.comcmd=hello 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