config.ini revision 9449
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1000 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=timing 18mem_ranges= 19memories=system.physmem 20num_work_ids=16 21readfile= 22symbolfile= 23work_begin_ckpt_count=0 24work_begin_cpu_id_exit=-1 25work_begin_exit_count=0 26work_cpus_ckpt_count=0 27work_end_ckpt_count=0 28work_end_exit_count=0 29work_item_id=-1 30system_port=system.membus.slave[0] 31 32[system.cpu] 33type=DerivO3CPU 34children=checker dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload 35BTBEntries=4096 36BTBTagSize=16 37LFSTSize=1024 38LQEntries=32 39LSQCheckLoads=true 40LSQDepCheckShift=4 41RASSize=16 42SQEntries=32 43SSITSize=1024 44activity=0 45backComSize=5 46cachePorts=200 47checker=system.cpu.checker 48choiceCtrBits=2 49choicePredictorSize=8192 50clock=500 51commitToDecodeDelay=1 52commitToFetchDelay=1 53commitToIEWDelay=1 54commitToRenameDelay=1 55commitWidth=8 56cpu_id=0 57decodeToFetchDelay=1 58decodeToRenameDelay=1 59decodeWidth=8 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 68forwardComSize=5 69fuPool=system.cpu.fuPool 70function_trace=false 71function_trace_start=0 72globalCtrBits=2 73globalHistoryBits=13 74globalPredictorSize=8192 75iewToCommitDelay=1 76iewToDecodeDelay=1 77iewToFetchDelay=1 78iewToRenameDelay=1 79instShiftAmt=2 80interrupts=system.cpu.interrupts 81isa=system.cpu.isa 82issueToExecuteDelay=1 83issueWidth=8 84itb=system.cpu.itb 85localCtrBits=2 86localHistoryBits=11 87localHistoryTableSize=2048 88localPredictorSize=2048 89max_insts_all_threads=0 90max_insts_any_thread=0 91max_loads_all_threads=0 92max_loads_any_thread=0 93needsTSO=false 94numIQEntries=64 95numPhysFloatRegs=256 96numPhysIntRegs=256 97numROBEntries=192 98numRobs=1 99numThreads=1 100predType=tournament 101profile=0 102progress_interval=0 103renameToDecodeDelay=1 104renameToFetchDelay=1 105renameToIEWDelay=2 106renameToROBDelay=1 107renameWidth=8 108smtCommitPolicy=RoundRobin 109smtFetchPolicy=SingleThread 110smtIQPolicy=Partitioned 111smtIQThreshold=100 112smtLSQPolicy=Partitioned 113smtLSQThreshold=100 114smtNumFetchingThreads=1 115smtROBPolicy=Partitioned 116smtROBThreshold=100 117squashWidth=8 118store_set_clear_period=250000 119switched_out=false 120system=system 121tracer=system.cpu.tracer 122trapLatency=13 123wbDepth=1 124wbWidth=8 125workload=system.cpu.workload 126dcache_port=system.cpu.dcache.cpu_side 127icache_port=system.cpu.icache.cpu_side 128 129[system.cpu.checker] 130type=O3Checker 131children=dtb isa itb tracer 132checker=Null 133clock=500 134cpu_id=0 135do_checkpoint_insts=true 136do_quiesce=true 137do_statistics_insts=true 138dtb=system.cpu.checker.dtb 139exitOnError=false 140function_trace=false 141function_trace_start=0 142interrupts=Null 143isa=system.cpu.checker.isa 144itb=system.cpu.checker.itb 145max_insts_all_threads=0 146max_insts_any_thread=0 147max_loads_all_threads=0 148max_loads_any_thread=0 149numThreads=1 150profile=0 151progress_interval=0 152switched_out=false 153system=system 154tracer=system.cpu.checker.tracer 155updateOnError=true 156warnOnlyOnLoadError=true 157workload=system.cpu.workload 158 159[system.cpu.checker.dtb] 160type=ArmTLB 161children=walker 162size=64 163walker=system.cpu.checker.dtb.walker 164 165[system.cpu.checker.dtb.walker] 166type=ArmTableWalker 167clock=500 168num_squash_per_cycle=2 169sys=system 170port=system.cpu.toL2Bus.slave[5] 171 172[system.cpu.checker.isa] 173type=ArmISA 174fpsid=1090793632 175id_isar0=34607377 176id_isar1=34677009 177id_isar2=555950401 178id_isar3=17899825 179id_isar4=268501314 180id_isar5=0 181id_mmfr0=3 182id_mmfr1=0 183id_mmfr2=19070976 184id_mmfr3=4027589137 185id_pfr0=49 186id_pfr1=1 187midr=890224640 188 189[system.cpu.checker.itb] 190type=ArmTLB 191children=walker 192size=64 193walker=system.cpu.checker.itb.walker 194 195[system.cpu.checker.itb.walker] 196type=ArmTableWalker 197clock=500 198num_squash_per_cycle=2 199sys=system 200port=system.cpu.toL2Bus.slave[4] 201 202[system.cpu.checker.tracer] 203type=ExeTracer 204 205[system.cpu.dcache] 206type=BaseCache 207addr_ranges=0:18446744073709551615 208assoc=2 209block_size=64 210clock=500 211forward_snoops=true 212hit_latency=2 213is_top_level=true 214max_miss_count=0 215mshrs=4 216prefetch_on_access=false 217prefetcher=Null 218response_latency=2 219size=262144 220system=system 221tgts_per_mshr=20 222two_queue=false 223write_buffers=8 224cpu_side=system.cpu.dcache_port 225mem_side=system.cpu.toL2Bus.slave[1] 226 227[system.cpu.dtb] 228type=ArmTLB 229children=walker 230size=64 231walker=system.cpu.dtb.walker 232 233[system.cpu.dtb.walker] 234type=ArmTableWalker 235clock=500 236num_squash_per_cycle=2 237sys=system 238port=system.cpu.toL2Bus.slave[3] 239 240[system.cpu.fuPool] 241type=FUPool 242children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 243FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 244 245[system.cpu.fuPool.FUList0] 246type=FUDesc 247children=opList 248count=6 249opList=system.cpu.fuPool.FUList0.opList 250 251[system.cpu.fuPool.FUList0.opList] 252type=OpDesc 253issueLat=1 254opClass=IntAlu 255opLat=1 256 257[system.cpu.fuPool.FUList1] 258type=FUDesc 259children=opList0 opList1 260count=2 261opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 262 263[system.cpu.fuPool.FUList1.opList0] 264type=OpDesc 265issueLat=1 266opClass=IntMult 267opLat=3 268 269[system.cpu.fuPool.FUList1.opList1] 270type=OpDesc 271issueLat=19 272opClass=IntDiv 273opLat=20 274 275[system.cpu.fuPool.FUList2] 276type=FUDesc 277children=opList0 opList1 opList2 278count=4 279opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 280 281[system.cpu.fuPool.FUList2.opList0] 282type=OpDesc 283issueLat=1 284opClass=FloatAdd 285opLat=2 286 287[system.cpu.fuPool.FUList2.opList1] 288type=OpDesc 289issueLat=1 290opClass=FloatCmp 291opLat=2 292 293[system.cpu.fuPool.FUList2.opList2] 294type=OpDesc 295issueLat=1 296opClass=FloatCvt 297opLat=2 298 299[system.cpu.fuPool.FUList3] 300type=FUDesc 301children=opList0 opList1 opList2 302count=2 303opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 304 305[system.cpu.fuPool.FUList3.opList0] 306type=OpDesc 307issueLat=1 308opClass=FloatMult 309opLat=4 310 311[system.cpu.fuPool.FUList3.opList1] 312type=OpDesc 313issueLat=12 314opClass=FloatDiv 315opLat=12 316 317[system.cpu.fuPool.FUList3.opList2] 318type=OpDesc 319issueLat=24 320opClass=FloatSqrt 321opLat=24 322 323[system.cpu.fuPool.FUList4] 324type=FUDesc 325children=opList 326count=0 327opList=system.cpu.fuPool.FUList4.opList 328 329[system.cpu.fuPool.FUList4.opList] 330type=OpDesc 331issueLat=1 332opClass=MemRead 333opLat=1 334 335[system.cpu.fuPool.FUList5] 336type=FUDesc 337children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 338count=4 339opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 340 341[system.cpu.fuPool.FUList5.opList00] 342type=OpDesc 343issueLat=1 344opClass=SimdAdd 345opLat=1 346 347[system.cpu.fuPool.FUList5.opList01] 348type=OpDesc 349issueLat=1 350opClass=SimdAddAcc 351opLat=1 352 353[system.cpu.fuPool.FUList5.opList02] 354type=OpDesc 355issueLat=1 356opClass=SimdAlu 357opLat=1 358 359[system.cpu.fuPool.FUList5.opList03] 360type=OpDesc 361issueLat=1 362opClass=SimdCmp 363opLat=1 364 365[system.cpu.fuPool.FUList5.opList04] 366type=OpDesc 367issueLat=1 368opClass=SimdCvt 369opLat=1 370 371[system.cpu.fuPool.FUList5.opList05] 372type=OpDesc 373issueLat=1 374opClass=SimdMisc 375opLat=1 376 377[system.cpu.fuPool.FUList5.opList06] 378type=OpDesc 379issueLat=1 380opClass=SimdMult 381opLat=1 382 383[system.cpu.fuPool.FUList5.opList07] 384type=OpDesc 385issueLat=1 386opClass=SimdMultAcc 387opLat=1 388 389[system.cpu.fuPool.FUList5.opList08] 390type=OpDesc 391issueLat=1 392opClass=SimdShift 393opLat=1 394 395[system.cpu.fuPool.FUList5.opList09] 396type=OpDesc 397issueLat=1 398opClass=SimdShiftAcc 399opLat=1 400 401[system.cpu.fuPool.FUList5.opList10] 402type=OpDesc 403issueLat=1 404opClass=SimdSqrt 405opLat=1 406 407[system.cpu.fuPool.FUList5.opList11] 408type=OpDesc 409issueLat=1 410opClass=SimdFloatAdd 411opLat=1 412 413[system.cpu.fuPool.FUList5.opList12] 414type=OpDesc 415issueLat=1 416opClass=SimdFloatAlu 417opLat=1 418 419[system.cpu.fuPool.FUList5.opList13] 420type=OpDesc 421issueLat=1 422opClass=SimdFloatCmp 423opLat=1 424 425[system.cpu.fuPool.FUList5.opList14] 426type=OpDesc 427issueLat=1 428opClass=SimdFloatCvt 429opLat=1 430 431[system.cpu.fuPool.FUList5.opList15] 432type=OpDesc 433issueLat=1 434opClass=SimdFloatDiv 435opLat=1 436 437[system.cpu.fuPool.FUList5.opList16] 438type=OpDesc 439issueLat=1 440opClass=SimdFloatMisc 441opLat=1 442 443[system.cpu.fuPool.FUList5.opList17] 444type=OpDesc 445issueLat=1 446opClass=SimdFloatMult 447opLat=1 448 449[system.cpu.fuPool.FUList5.opList18] 450type=OpDesc 451issueLat=1 452opClass=SimdFloatMultAcc 453opLat=1 454 455[system.cpu.fuPool.FUList5.opList19] 456type=OpDesc 457issueLat=1 458opClass=SimdFloatSqrt 459opLat=1 460 461[system.cpu.fuPool.FUList6] 462type=FUDesc 463children=opList 464count=0 465opList=system.cpu.fuPool.FUList6.opList 466 467[system.cpu.fuPool.FUList6.opList] 468type=OpDesc 469issueLat=1 470opClass=MemWrite 471opLat=1 472 473[system.cpu.fuPool.FUList7] 474type=FUDesc 475children=opList0 opList1 476count=4 477opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 478 479[system.cpu.fuPool.FUList7.opList0] 480type=OpDesc 481issueLat=1 482opClass=MemRead 483opLat=1 484 485[system.cpu.fuPool.FUList7.opList1] 486type=OpDesc 487issueLat=1 488opClass=MemWrite 489opLat=1 490 491[system.cpu.fuPool.FUList8] 492type=FUDesc 493children=opList 494count=1 495opList=system.cpu.fuPool.FUList8.opList 496 497[system.cpu.fuPool.FUList8.opList] 498type=OpDesc 499issueLat=3 500opClass=IprAccess 501opLat=3 502 503[system.cpu.icache] 504type=BaseCache 505addr_ranges=0:18446744073709551615 506assoc=2 507block_size=64 508clock=500 509forward_snoops=true 510hit_latency=2 511is_top_level=true 512max_miss_count=0 513mshrs=4 514prefetch_on_access=false 515prefetcher=Null 516response_latency=2 517size=131072 518system=system 519tgts_per_mshr=20 520two_queue=false 521write_buffers=8 522cpu_side=system.cpu.icache_port 523mem_side=system.cpu.toL2Bus.slave[0] 524 525[system.cpu.interrupts] 526type=ArmInterrupts 527 528[system.cpu.isa] 529type=ArmISA 530fpsid=1090793632 531id_isar0=34607377 532id_isar1=34677009 533id_isar2=555950401 534id_isar3=17899825 535id_isar4=268501314 536id_isar5=0 537id_mmfr0=3 538id_mmfr1=0 539id_mmfr2=19070976 540id_mmfr3=4027589137 541id_pfr0=49 542id_pfr1=1 543midr=890224640 544 545[system.cpu.itb] 546type=ArmTLB 547children=walker 548size=64 549walker=system.cpu.itb.walker 550 551[system.cpu.itb.walker] 552type=ArmTableWalker 553clock=500 554num_squash_per_cycle=2 555sys=system 556port=system.cpu.toL2Bus.slave[2] 557 558[system.cpu.l2cache] 559type=BaseCache 560addr_ranges=0:18446744073709551615 561assoc=8 562block_size=64 563clock=500 564forward_snoops=true 565hit_latency=20 566is_top_level=false 567max_miss_count=0 568mshrs=20 569prefetch_on_access=false 570prefetcher=Null 571response_latency=20 572size=2097152 573system=system 574tgts_per_mshr=12 575two_queue=false 576write_buffers=8 577cpu_side=system.cpu.toL2Bus.master[0] 578mem_side=system.membus.slave[1] 579 580[system.cpu.toL2Bus] 581type=CoherentBus 582block_size=64 583clock=500 584header_cycles=1 585use_default_range=false 586width=32 587master=system.cpu.l2cache.cpu_side 588slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 589 590[system.cpu.tracer] 591type=ExeTracer 592 593[system.cpu.workload] 594type=LiveProcess 595cmd=hello 596cwd= 597egid=100 598env= 599errout=cerr 600euid=100 601executable=/gem5/dist/test-progs/hello/bin/arm/linux/hello 602gid=100 603input=cin 604max_stack_size=67108864 605output=cout 606pid=100 607ppid=99 608simpoint=0 609system=system 610uid=100 611 612[system.membus] 613type=CoherentBus 614block_size=64 615clock=1000 616header_cycles=1 617use_default_range=false 618width=8 619master=system.physmem.port 620slave=system.system_port system.cpu.l2cache.mem_side 621 622[system.physmem] 623type=SimpleDRAM 624addr_mapping=openmap 625banks_per_rank=8 626clock=1000 627conf_table_reported=false 628in_addr_map=true 629lines_per_rowbuffer=64 630mem_sched_policy=fcfs 631null=false 632page_policy=open 633range=0:134217727 634ranks_per_channel=2 635read_buffer_size=32 636tBURST=4000 637tCL=14000 638tRCD=14000 639tREFI=7800000 640tRFC=300000 641tRP=14000 642tWTR=1000 643write_buffer_size=32 644write_thresh_perc=70 645zero=false 646port=system.membus.master[0] 647 648