config.ini revision 11219
12SN/A[root] 21762SN/Atype=Root 35502Snate@binkert.orgchildren=system 49983Sstever@gmail.comeventq_index=0 52SN/Afull_system=false 62SN/Asim_quantum=0 72SN/Atime_sync_enable=false 82SN/Atime_sync_period=100000000000 92SN/Atime_sync_spin_threshold=100000000 102SN/A 112SN/A[system] 122SN/Atype=System 132SN/Achildren=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 142SN/Aboot_osflags=a 152SN/Acache_line_size=64 162SN/Aclk_domain=system.clk_domain 172SN/Aeventq_index=0 182SN/Ainit_param=0 192SN/Akernel= 202SN/Akernel_addr_check=true 212SN/Aload_addr_mask=1099511627775 222SN/Aload_offset=0 232SN/Amem_mode=timing 242SN/Amem_ranges= 252SN/Amemories=system.physmem 262SN/Ammap_using_noreserve=false 272SN/Amulti_thread=false 282SN/Anum_work_ids=16 292665Ssaidi@eecs.umich.edureadfile= 302665Ssaidi@eecs.umich.edusymbolfile= 312665Ssaidi@eecs.umich.eduwork_begin_ckpt_count=0 322665Ssaidi@eecs.umich.eduwork_begin_cpu_id_exit=-1 332SN/Awork_begin_exit_count=0 342SN/Awork_cpus_ckpt_count=0 355501Snate@binkert.orgwork_end_ckpt_count=0 362SN/Awork_end_exit_count=0 372SN/Awork_item_id=-1 3811168Sandreas.hansson@arm.comsystem_port=system.membus.slave[0] 392SN/A 402SN/A[system.clk_domain] 4112334Sgabeblack@google.comtype=SrcClockDomain 425501Snate@binkert.orgclock=1000 431717SN/Adomain_id=-1 4410906Sandreas.sandberg@arm.comeventq_index=0 455501Snate@binkert.orginit_perf_level=0 469356Snilay@cs.wisc.eduvoltage_domain=system.voltage_domain 472SN/A 482SN/A[system.cpu] 492SN/Atype=DerivO3CPU 509983Sstever@gmail.comchildren=branchPred checker dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 519983Sstever@gmail.comLFSTSize=1024 522SN/ALQEntries=32 539983Sstever@gmail.comLSQCheckLoads=true 542SN/ALSQDepCheckShift=4 559983Sstever@gmail.comSQEntries=32 562SN/ASSITSize=1024 572SN/Aactivity=0 589983Sstever@gmail.combackComSize=5 599983Sstever@gmail.combranchPred=system.cpu.branchPred 609983Sstever@gmail.comcachePorts=200 619983Sstever@gmail.comchecker=system.cpu.checker 629983Sstever@gmail.comclk_domain=system.cpu_clk_domain 639983Sstever@gmail.comcommitToDecodeDelay=1 649983Sstever@gmail.comcommitToFetchDelay=1 659983Sstever@gmail.comcommitToIEWDelay=1 669983Sstever@gmail.comcommitToRenameDelay=1 679983Sstever@gmail.comcommitWidth=8 689983Sstever@gmail.comcpu_id=0 699983Sstever@gmail.comdecodeToFetchDelay=1 709983Sstever@gmail.comdecodeToRenameDelay=1 719983Sstever@gmail.comdecodeWidth=8 729983Sstever@gmail.comdispatchWidth=8 739983Sstever@gmail.comdo_checkpoint_insts=true 742SN/Ado_quiesce=true 754017Sstever@eecs.umich.edudo_statistics_insts=true 764016Sstever@eecs.umich.edudstage2_mmu=system.cpu.dstage2_mmu 774017Sstever@eecs.umich.edudtb=system.cpu.dtb 784016Sstever@eecs.umich.edueventq_index=0 795768Snate@binkert.orgfetchBufferSize=64 805768Snate@binkert.orgfetchQueueSize=32 815774Snate@binkert.orgfetchToDecodeDelay=1 827059Snate@binkert.orgfetchTrapLatency=1 835768Snate@binkert.orgfetchWidth=8 845768Snate@binkert.orgforwardComSize=5 855768Snate@binkert.orgfuPool=system.cpu.fuPool 865768Snate@binkert.orgfunction_trace=false 875768Snate@binkert.orgfunction_trace_start=0 885768Snate@binkert.orgiewToCommitDelay=1 895768Snate@binkert.orgiewToDecodeDelay=1 905768Snate@binkert.orgiewToFetchDelay=1 915768Snate@binkert.orgiewToRenameDelay=1 925768Snate@binkert.orginterrupts=system.cpu.interrupts 935768Snate@binkert.orgisa=system.cpu.isa 945768Snate@binkert.orgissueToExecuteDelay=1 955768Snate@binkert.orgissueWidth=8 965602Snate@binkert.orgistage2_mmu=system.cpu.istage2_mmu 975602Snate@binkert.orgitb=system.cpu.itb 985502Snate@binkert.orgmax_insts_all_threads=0 995503Snate@binkert.orgmax_insts_any_thread=0 1005502Snate@binkert.orgmax_loads_all_threads=0 1015502Snate@binkert.orgmax_loads_any_thread=0 1025502Snate@binkert.orgneedsTSO=false 1035502Snate@binkert.orgnumIQEntries=64 1045502Snate@binkert.orgnumPhysCCRegs=1280 1055503Snate@binkert.orgnumPhysFloatRegs=256 1065502Snate@binkert.orgnumPhysIntRegs=256 1075502Snate@binkert.orgnumROBEntries=192 1085502Snate@binkert.orgnumRobs=1 1095502Snate@binkert.orgnumThreads=1 1105503Snate@binkert.orgprofile=0 1115503Snate@binkert.orgprogress_interval=0 1125503Snate@binkert.orgrenameToDecodeDelay=1 1135502Snate@binkert.orgrenameToFetchDelay=1 1145503Snate@binkert.orgrenameToIEWDelay=2 1155502Snate@binkert.orgrenameToROBDelay=1 1165502Snate@binkert.orgrenameWidth=8 1172SN/Asimpoint_start_insts= 1182SN/AsmtCommitPolicy=RoundRobin 1192SN/AsmtFetchPolicy=SingleThread 1205502Snate@binkert.orgsmtIQPolicy=Partitioned 1215502Snate@binkert.orgsmtIQThreshold=100 1225602Snate@binkert.orgsmtLSQPolicy=Partitioned 1235502Snate@binkert.orgsmtLSQThreshold=100 1245502Snate@binkert.orgsmtNumFetchingThreads=1 1252SN/AsmtROBPolicy=Partitioned 1265502Snate@binkert.orgsmtROBThreshold=100 1275502Snate@binkert.orgsocket_id=0 1285503Snate@binkert.orgsquashWidth=8 1295503Snate@binkert.orgstore_set_clear_period=250000 1305503Snate@binkert.orgswitched_out=false 1315503Snate@binkert.orgsystem=system 1325503Snate@binkert.orgtracer=system.cpu.tracer 1335502Snate@binkert.orgtrapLatency=13 1342SN/AwbWidth=8 1355503Snate@binkert.orgworkload=system.cpu.workload 1365503Snate@binkert.orgdcache_port=system.cpu.dcache.cpu_side 1375602Snate@binkert.orgicache_port=system.cpu.icache.cpu_side 1385502Snate@binkert.org 1392SN/A[system.cpu.branchPred] 1405602Snate@binkert.orgtype=TournamentBP 1415602Snate@binkert.orgBTBEntries=4096 1425502Snate@binkert.orgBTBTagSize=16 1435503Snate@binkert.orgRASSize=16 1445503Snate@binkert.orgchoiceCtrBits=2 1455502Snate@binkert.orgchoicePredictorSize=8192 1465503Snate@binkert.orgeventq_index=0 1475503Snate@binkert.orgglobalCtrBits=2 1485503Snate@binkert.orgglobalPredictorSize=8192 1495503Snate@binkert.orginstShiftAmt=2 1505503Snate@binkert.orglocalCtrBits=2 1515503Snate@binkert.orglocalHistoryTableSize=2048 1525503Snate@binkert.orglocalPredictorSize=2048 1535503Snate@binkert.orgnumThreads=1 1545503Snate@binkert.org 1555503Snate@binkert.org[system.cpu.checker] 1565503Snate@binkert.orgtype=O3Checker 1575503Snate@binkert.orgchildren=dstage2_mmu dtb isa istage2_mmu itb tracer 1585503Snate@binkert.orgchecker=Null 1595503Snate@binkert.orgclk_domain=system.cpu_clk_domain 1605502Snate@binkert.orgcpu_id=0 1615502Snate@binkert.orgdo_checkpoint_insts=true 1625503Snate@binkert.orgdo_quiesce=true 1635503Snate@binkert.orgdo_statistics_insts=true 1642SN/Adstage2_mmu=system.cpu.checker.dstage2_mmu 1655502Snate@binkert.orgdtb=system.cpu.checker.dtb 1665503Snate@binkert.orgeventq_index=0 1675503Snate@binkert.orgexitOnError=false 1685503Snate@binkert.orgfunction_trace=false 1692SN/Afunction_trace_start=0 1702SN/Ainterrupts= 1712SN/Aisa=system.cpu.checker.isa 1722SN/Aistage2_mmu=system.cpu.checker.istage2_mmu 1732SN/Aitb=system.cpu.checker.itb 1742SN/Amax_insts_all_threads=0 1755502Snate@binkert.orgmax_insts_any_thread=0 1762SN/Amax_loads_all_threads=0 1779983Sstever@gmail.commax_loads_any_thread=0 1789983Sstever@gmail.comnumThreads=1 1795502Snate@binkert.orgprofile=0 1805502Snate@binkert.orgprogress_interval=0 1815502Snate@binkert.orgsimpoint_start_insts= 1825602Snate@binkert.orgsocket_id=0 1832SN/Aswitched_out=false 1842SN/Asystem=system 1852SN/Atracer=system.cpu.checker.tracer 1865502Snate@binkert.orgupdateOnError=true 1872SN/AwarnOnlyOnLoadError=true 1885502Snate@binkert.orgworkload=system.cpu.workload 1895502Snate@binkert.org 1902SN/A[system.cpu.checker.dstage2_mmu] 1915502Snate@binkert.orgtype=ArmStage2MMU 1922SN/Achildren=stage2_tlb 1932SN/Aeventq_index=0 1945502Snate@binkert.orgstage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb 1955502Snate@binkert.orgsys=system 1965502Snate@binkert.orgtlb=system.cpu.checker.dtb 1975503Snate@binkert.org 1985503Snate@binkert.org[system.cpu.checker.dstage2_mmu.stage2_tlb] 1995502Snate@binkert.orgtype=ArmTLB 2005602Snate@binkert.orgchildren=walker 2012SN/Aeventq_index=0 2022SN/Ais_stage2=true 2032667Sstever@eecs.umich.edusize=32 2042SN/Awalker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker 2052SN/A 20610153Sandreas@sandberg.pp.se[system.cpu.checker.dstage2_mmu.stage2_tlb.walker] 2075503Snate@binkert.orgtype=ArmTableWalker 2085503Snate@binkert.orgclk_domain=system.cpu_clk_domain 2095769Snate@binkert.orgeventq_index=0 2105502Snate@binkert.orgis_stage2=true 2115503Snate@binkert.orgnum_squash_per_cycle=2 2125503Snate@binkert.orgsys=system 2135503Snate@binkert.org 2145503Snate@binkert.org[system.cpu.checker.dtb] 2155503Snate@binkert.orgtype=ArmTLB 2165503Snate@binkert.orgchildren=walker 2175503Snate@binkert.orgeventq_index=0 2185502Snate@binkert.orgis_stage2=false 2195502Snate@binkert.orgsize=64 2205503Snate@binkert.orgwalker=system.cpu.checker.dtb.walker 2215502Snate@binkert.org 2222SN/A[system.cpu.checker.dtb.walker] 2232SN/Atype=ArmTableWalker 2242667Sstever@eecs.umich.educlk_domain=system.cpu_clk_domain 2259356Snilay@cs.wisc.edueventq_index=0 2269356Snilay@cs.wisc.eduis_stage2=false 2279356Snilay@cs.wisc.edunum_squash_per_cycle=2 2282SN/Asys=system 2292667Sstever@eecs.umich.eduport=system.cpu.toL2Bus.slave[5] 23012040Sandreas.sandberg@arm.com 2319328SAli.Saidi@ARM.com[system.cpu.checker.isa] 2322667Sstever@eecs.umich.edutype=ArmISA 2332667Sstever@eecs.umich.edudecoderFlavour=Generic 2342667Sstever@eecs.umich.edueventq_index=0 2355769Snate@binkert.orgfpsid=1090793632 2362667Sstever@eecs.umich.eduid_aa64afr0_el1=0 2372SN/Aid_aa64afr1_el1=0 23812040Sandreas.sandberg@arm.comid_aa64dfr0_el1=1052678 2392667Sstever@eecs.umich.eduid_aa64dfr1_el1=0 2402667Sstever@eecs.umich.eduid_aa64isar0_el1=0 2412SN/Aid_aa64isar1_el1=0 2422SN/Aid_aa64mmfr0_el1=15728642 243224SN/Aid_aa64mmfr1_el1=0 24410905Sandreas.sandberg@arm.comid_aa64pfr0_el1=17 245224SN/Aid_aa64pfr1_el1=0 246224SN/Aid_isar0=34607377 247224SN/Aid_isar1=34677009 2485769Snate@binkert.orgid_isar2=555950401 2495769Snate@binkert.orgid_isar3=17899825 250224SN/Aid_isar4=268501314 251224SN/Aid_isar5=0 252224SN/Aid_mmfr0=270536963 25310905Sandreas.sandberg@arm.comid_mmfr1=0 254224SN/Aid_mmfr2=19070976 25510906Sandreas.sandberg@arm.comid_mmfr3=34611729 256224SN/Aid_pfr0=49 257224SN/Aid_pfr1=4113 258224SN/Amidr=1091551472 259224SN/Apmu=Null 26010906Sandreas.sandberg@arm.comsystem=system 2615769Snate@binkert.org 2627452SLisa.Hsu@amd.com[system.cpu.checker.istage2_mmu] 2637452SLisa.Hsu@amd.comtype=ArmStage2MMU 2647452SLisa.Hsu@amd.comchildren=stage2_tlb 26511320Ssteve.reinhardt@amd.comeventq_index=0 26611320Ssteve.reinhardt@amd.comstage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb 26711320Ssteve.reinhardt@amd.comsys=system 2687452SLisa.Hsu@amd.comtlb=system.cpu.checker.itb 2697451SLisa.Hsu@amd.com 2705769Snate@binkert.org[system.cpu.checker.istage2_mmu.stage2_tlb] 2717451SLisa.Hsu@amd.comtype=ArmTLB 2725769Snate@binkert.orgchildren=walker 2737452SLisa.Hsu@amd.comeventq_index=0 2747452SLisa.Hsu@amd.comis_stage2=true 2757452SLisa.Hsu@amd.comsize=32 27610906Sandreas.sandberg@arm.comwalker=system.cpu.checker.istage2_mmu.stage2_tlb.walker 27710906Sandreas.sandberg@arm.com 27810906Sandreas.sandberg@arm.com[system.cpu.checker.istage2_mmu.stage2_tlb.walker] 27910906Sandreas.sandberg@arm.comtype=ArmTableWalker 28010906Sandreas.sandberg@arm.comclk_domain=system.cpu_clk_domain 281224SN/Aeventq_index=0 282224SN/Ais_stage2=true 283224SN/Anum_squash_per_cycle=2 2842SN/Asys=system 28510906Sandreas.sandberg@arm.com 28610906Sandreas.sandberg@arm.com[system.cpu.checker.itb] 28710906Sandreas.sandberg@arm.comtype=ArmTLB 28810906Sandreas.sandberg@arm.comchildren=walker 28910906Sandreas.sandberg@arm.comeventq_index=0 29010906Sandreas.sandberg@arm.comis_stage2=false 29110906Sandreas.sandberg@arm.comsize=64 29210906Sandreas.sandberg@arm.comwalker=system.cpu.checker.itb.walker 29310906Sandreas.sandberg@arm.com 2945501Snate@binkert.org[system.cpu.checker.itb.walker] 2952SN/Atype=ArmTableWalker 2962SN/Aclk_domain=system.cpu_clk_domain 2977823Ssteve.reinhardt@amd.comeventq_index=0 2982SN/Ais_stage2=false 2992SN/Anum_squash_per_cycle=2 3002SN/Asys=system 3012SN/Aport=system.cpu.toL2Bus.slave[4] 3022SN/A 3035502Snate@binkert.org[system.cpu.checker.tracer] 3045502Snate@binkert.orgtype=ExeTracer 3055502Snate@binkert.orgeventq_index=0 3065503Snate@binkert.org 3075503Snate@binkert.org[system.cpu.dcache] 3085502Snate@binkert.orgtype=Cache 3095503Snate@binkert.orgchildren=tags 3105502Snate@binkert.orgaddr_ranges=0:18446744073709551615 3115502Snate@binkert.orgassoc=2 3122SN/Aclk_domain=system.cpu_clk_domain 3132SN/Aclusivity=mostly_incl 3142SN/Ademand_mshr_reserve=1 3152SN/Aeventq_index=0 3162SN/Aforward_snoops=true 3172SN/Ahit_latency=2 3185502Snate@binkert.orgis_read_only=false 3195502Snate@binkert.orgmax_miss_count=0 3205502Snate@binkert.orgmshrs=4 32111168Sandreas.hansson@arm.comprefetch_on_access=false 3225502Snate@binkert.orgprefetcher=Null 3235502Snate@binkert.orgresponse_latency=2 3245502Snate@binkert.orgsequential_access=false 3255502Snate@binkert.orgsize=262144 3265502Snate@binkert.orgsystem=system 3275502Snate@binkert.orgtags=system.cpu.dcache.tags 3285503Snate@binkert.orgtgts_per_mshr=20 3295503Snate@binkert.orgwrite_buffers=8 3305502Snate@binkert.orgwriteback_clean=false 3315502Snate@binkert.orgcpu_side=system.cpu.dcache_port 3325502Snate@binkert.orgmem_side=system.cpu.toL2Bus.slave[1] 3335502Snate@binkert.org 3345502Snate@binkert.org[system.cpu.dcache.tags] 3355502Snate@binkert.orgtype=LRU 3365502Snate@binkert.orgassoc=2 3375502Snate@binkert.orgblock_size=64 3385502Snate@binkert.orgclk_domain=system.cpu_clk_domain 3395502Snate@binkert.orgeventq_index=0 3405502Snate@binkert.orghit_latency=2 3415502Snate@binkert.orgsequential_access=false 3425502Snate@binkert.orgsize=262144 3435502Snate@binkert.org 3445502Snate@binkert.org[system.cpu.dstage2_mmu] 3455502Snate@binkert.orgtype=ArmStage2MMU 3465502Snate@binkert.orgchildren=stage2_tlb 3475502Snate@binkert.orgeventq_index=0 3485502Snate@binkert.orgstage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 3495502Snate@binkert.orgsys=system 3505502Snate@binkert.orgtlb=system.cpu.dtb 3515502Snate@binkert.org 3525503Snate@binkert.org[system.cpu.dstage2_mmu.stage2_tlb] 3535502Snate@binkert.orgtype=ArmTLB 3545502Snate@binkert.orgchildren=walker 3555502Snate@binkert.orgeventq_index=0 3565502Snate@binkert.orgis_stage2=true 3575502Snate@binkert.orgsize=32 3585502Snate@binkert.orgwalker=system.cpu.dstage2_mmu.stage2_tlb.walker 3595502Snate@binkert.org 3608648Snilay@cs.wisc.edu[system.cpu.dstage2_mmu.stage2_tlb.walker] 3618648Snilay@cs.wisc.edutype=ArmTableWalker 3628648Snilay@cs.wisc.educlk_domain=system.cpu_clk_domain 3638648Snilay@cs.wisc.edueventq_index=0 3648648Snilay@cs.wisc.eduis_stage2=true 3658648Snilay@cs.wisc.edunum_squash_per_cycle=2 3668648Snilay@cs.wisc.edusys=system 3678648Snilay@cs.wisc.edu 3681019SN/A[system.cpu.dtb] 3691019SN/Atype=ArmTLB 3701019SN/Achildren=walker 3719983Sstever@gmail.comeventq_index=0 3729983Sstever@gmail.comis_stage2=false 3739983Sstever@gmail.comsize=64 3741019SN/Awalker=system.cpu.dtb.walker 3751019SN/A 3762SN/A[system.cpu.dtb.walker] 3772SN/Atype=ArmTableWalker 3785336Shines@cs.fsu.educlk_domain=system.cpu_clk_domain 3792SN/Aeventq_index=0 3802SN/Ais_stage2=false 3812SN/Anum_squash_per_cycle=2 3822SN/Asys=system 3832SN/Aport=system.cpu.toL2Bus.slave[3] 3842SN/A 3852SN/A[system.cpu.fuPool] 3862SN/Atype=FUPool 3872SN/Achildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 3882SN/AFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 3892SN/Aeventq_index=0 3902SN/A 3912SN/A[system.cpu.fuPool.FUList0] 3922SN/Atype=FUDesc 3932SN/Achildren=opList 3942SN/Acount=6 3952SN/Aeventq_index=0 3962SN/AopList=system.cpu.fuPool.FUList0.opList 3972SN/A 3982SN/A[system.cpu.fuPool.FUList0.opList] 3995501Snate@binkert.orgtype=OpDesc 4002SN/Aeventq_index=0 4015501Snate@binkert.orgopClass=IntAlu 4025769Snate@binkert.orgopLat=1 4035501Snate@binkert.orgpipelined=true 4045501Snate@binkert.org 4052SN/A[system.cpu.fuPool.FUList1] 4062SN/Atype=FUDesc 4075501Snate@binkert.orgchildren=opList0 opList1 4085501Snate@binkert.orgcount=2 4092SN/Aeventq_index=0 4101019SN/AopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 4115501Snate@binkert.org 4121019SN/A[system.cpu.fuPool.FUList1.opList0] 4132SN/Atype=OpDesc 4142SN/Aeventq_index=0 4157063Snate@binkert.orgopClass=IntMult 4167063Snate@binkert.orgopLat=3 41710412Sandreas.hansson@arm.compipelined=true 4189983Sstever@gmail.com 4199983Sstever@gmail.com[system.cpu.fuPool.FUList1.opList1] 4209983Sstever@gmail.comtype=OpDesc 4219983Sstever@gmail.comeventq_index=0 4229983Sstever@gmail.comopClass=IntDiv 4239983Sstever@gmail.comopLat=20 42410412Sandreas.hansson@arm.compipelined=false 4259983Sstever@gmail.com 42610412Sandreas.hansson@arm.com[system.cpu.fuPool.FUList2] 4279983Sstever@gmail.comtype=FUDesc 4289983Sstever@gmail.comchildren=opList0 opList1 opList2 4299983Sstever@gmail.comcount=4 4309983Sstever@gmail.comeventq_index=0 4319983Sstever@gmail.comopList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 4329983Sstever@gmail.com 43310412Sandreas.hansson@arm.com[system.cpu.fuPool.FUList2.opList0] 4349983Sstever@gmail.comtype=OpDesc 4359983Sstever@gmail.comeventq_index=0 4369983Sstever@gmail.comopClass=FloatAdd 4379983Sstever@gmail.comopLat=2 4389983Sstever@gmail.compipelined=true 4399983Sstever@gmail.com 44010412Sandreas.hansson@arm.com[system.cpu.fuPool.FUList2.opList1] 4419983Sstever@gmail.comtype=OpDesc 442eventq_index=0 443opClass=FloatCmp 444opLat=2 445pipelined=true 446 447[system.cpu.fuPool.FUList2.opList2] 448type=OpDesc 449eventq_index=0 450opClass=FloatCvt 451opLat=2 452pipelined=true 453 454[system.cpu.fuPool.FUList3] 455type=FUDesc 456children=opList0 opList1 opList2 457count=2 458eventq_index=0 459opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 460 461[system.cpu.fuPool.FUList3.opList0] 462type=OpDesc 463eventq_index=0 464opClass=FloatMult 465opLat=4 466pipelined=true 467 468[system.cpu.fuPool.FUList3.opList1] 469type=OpDesc 470eventq_index=0 471opClass=FloatDiv 472opLat=12 473pipelined=false 474 475[system.cpu.fuPool.FUList3.opList2] 476type=OpDesc 477eventq_index=0 478opClass=FloatSqrt 479opLat=24 480pipelined=false 481 482[system.cpu.fuPool.FUList4] 483type=FUDesc 484children=opList 485count=0 486eventq_index=0 487opList=system.cpu.fuPool.FUList4.opList 488 489[system.cpu.fuPool.FUList4.opList] 490type=OpDesc 491eventq_index=0 492opClass=MemRead 493opLat=1 494pipelined=true 495 496[system.cpu.fuPool.FUList5] 497type=FUDesc 498children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 499count=4 500eventq_index=0 501opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 502 503[system.cpu.fuPool.FUList5.opList00] 504type=OpDesc 505eventq_index=0 506opClass=SimdAdd 507opLat=1 508pipelined=true 509 510[system.cpu.fuPool.FUList5.opList01] 511type=OpDesc 512eventq_index=0 513opClass=SimdAddAcc 514opLat=1 515pipelined=true 516 517[system.cpu.fuPool.FUList5.opList02] 518type=OpDesc 519eventq_index=0 520opClass=SimdAlu 521opLat=1 522pipelined=true 523 524[system.cpu.fuPool.FUList5.opList03] 525type=OpDesc 526eventq_index=0 527opClass=SimdCmp 528opLat=1 529pipelined=true 530 531[system.cpu.fuPool.FUList5.opList04] 532type=OpDesc 533eventq_index=0 534opClass=SimdCvt 535opLat=1 536pipelined=true 537 538[system.cpu.fuPool.FUList5.opList05] 539type=OpDesc 540eventq_index=0 541opClass=SimdMisc 542opLat=1 543pipelined=true 544 545[system.cpu.fuPool.FUList5.opList06] 546type=OpDesc 547eventq_index=0 548opClass=SimdMult 549opLat=1 550pipelined=true 551 552[system.cpu.fuPool.FUList5.opList07] 553type=OpDesc 554eventq_index=0 555opClass=SimdMultAcc 556opLat=1 557pipelined=true 558 559[system.cpu.fuPool.FUList5.opList08] 560type=OpDesc 561eventq_index=0 562opClass=SimdShift 563opLat=1 564pipelined=true 565 566[system.cpu.fuPool.FUList5.opList09] 567type=OpDesc 568eventq_index=0 569opClass=SimdShiftAcc 570opLat=1 571pipelined=true 572 573[system.cpu.fuPool.FUList5.opList10] 574type=OpDesc 575eventq_index=0 576opClass=SimdSqrt 577opLat=1 578pipelined=true 579 580[system.cpu.fuPool.FUList5.opList11] 581type=OpDesc 582eventq_index=0 583opClass=SimdFloatAdd 584opLat=1 585pipelined=true 586 587[system.cpu.fuPool.FUList5.opList12] 588type=OpDesc 589eventq_index=0 590opClass=SimdFloatAlu 591opLat=1 592pipelined=true 593 594[system.cpu.fuPool.FUList5.opList13] 595type=OpDesc 596eventq_index=0 597opClass=SimdFloatCmp 598opLat=1 599pipelined=true 600 601[system.cpu.fuPool.FUList5.opList14] 602type=OpDesc 603eventq_index=0 604opClass=SimdFloatCvt 605opLat=1 606pipelined=true 607 608[system.cpu.fuPool.FUList5.opList15] 609type=OpDesc 610eventq_index=0 611opClass=SimdFloatDiv 612opLat=1 613pipelined=true 614 615[system.cpu.fuPool.FUList5.opList16] 616type=OpDesc 617eventq_index=0 618opClass=SimdFloatMisc 619opLat=1 620pipelined=true 621 622[system.cpu.fuPool.FUList5.opList17] 623type=OpDesc 624eventq_index=0 625opClass=SimdFloatMult 626opLat=1 627pipelined=true 628 629[system.cpu.fuPool.FUList5.opList18] 630type=OpDesc 631eventq_index=0 632opClass=SimdFloatMultAcc 633opLat=1 634pipelined=true 635 636[system.cpu.fuPool.FUList5.opList19] 637type=OpDesc 638eventq_index=0 639opClass=SimdFloatSqrt 640opLat=1 641pipelined=true 642 643[system.cpu.fuPool.FUList6] 644type=FUDesc 645children=opList 646count=0 647eventq_index=0 648opList=system.cpu.fuPool.FUList6.opList 649 650[system.cpu.fuPool.FUList6.opList] 651type=OpDesc 652eventq_index=0 653opClass=MemWrite 654opLat=1 655pipelined=true 656 657[system.cpu.fuPool.FUList7] 658type=FUDesc 659children=opList0 opList1 660count=4 661eventq_index=0 662opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 663 664[system.cpu.fuPool.FUList7.opList0] 665type=OpDesc 666eventq_index=0 667opClass=MemRead 668opLat=1 669pipelined=true 670 671[system.cpu.fuPool.FUList7.opList1] 672type=OpDesc 673eventq_index=0 674opClass=MemWrite 675opLat=1 676pipelined=true 677 678[system.cpu.fuPool.FUList8] 679type=FUDesc 680children=opList 681count=1 682eventq_index=0 683opList=system.cpu.fuPool.FUList8.opList 684 685[system.cpu.fuPool.FUList8.opList] 686type=OpDesc 687eventq_index=0 688opClass=IprAccess 689opLat=3 690pipelined=false 691 692[system.cpu.icache] 693type=Cache 694children=tags 695addr_ranges=0:18446744073709551615 696assoc=2 697clk_domain=system.cpu_clk_domain 698clusivity=mostly_incl 699demand_mshr_reserve=1 700eventq_index=0 701forward_snoops=true 702hit_latency=2 703is_read_only=true 704max_miss_count=0 705mshrs=4 706prefetch_on_access=false 707prefetcher=Null 708response_latency=2 709sequential_access=false 710size=131072 711system=system 712tags=system.cpu.icache.tags 713tgts_per_mshr=20 714write_buffers=8 715writeback_clean=true 716cpu_side=system.cpu.icache_port 717mem_side=system.cpu.toL2Bus.slave[0] 718 719[system.cpu.icache.tags] 720type=LRU 721assoc=2 722block_size=64 723clk_domain=system.cpu_clk_domain 724eventq_index=0 725hit_latency=2 726sequential_access=false 727size=131072 728 729[system.cpu.interrupts] 730type=ArmInterrupts 731eventq_index=0 732 733[system.cpu.isa] 734type=ArmISA 735decoderFlavour=Generic 736eventq_index=0 737fpsid=1090793632 738id_aa64afr0_el1=0 739id_aa64afr1_el1=0 740id_aa64dfr0_el1=1052678 741id_aa64dfr1_el1=0 742id_aa64isar0_el1=0 743id_aa64isar1_el1=0 744id_aa64mmfr0_el1=15728642 745id_aa64mmfr1_el1=0 746id_aa64pfr0_el1=17 747id_aa64pfr1_el1=0 748id_isar0=34607377 749id_isar1=34677009 750id_isar2=555950401 751id_isar3=17899825 752id_isar4=268501314 753id_isar5=0 754id_mmfr0=270536963 755id_mmfr1=0 756id_mmfr2=19070976 757id_mmfr3=34611729 758id_pfr0=49 759id_pfr1=4113 760midr=1091551472 761pmu=Null 762system=system 763 764[system.cpu.istage2_mmu] 765type=ArmStage2MMU 766children=stage2_tlb 767eventq_index=0 768stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 769sys=system 770tlb=system.cpu.itb 771 772[system.cpu.istage2_mmu.stage2_tlb] 773type=ArmTLB 774children=walker 775eventq_index=0 776is_stage2=true 777size=32 778walker=system.cpu.istage2_mmu.stage2_tlb.walker 779 780[system.cpu.istage2_mmu.stage2_tlb.walker] 781type=ArmTableWalker 782clk_domain=system.cpu_clk_domain 783eventq_index=0 784is_stage2=true 785num_squash_per_cycle=2 786sys=system 787 788[system.cpu.itb] 789type=ArmTLB 790children=walker 791eventq_index=0 792is_stage2=false 793size=64 794walker=system.cpu.itb.walker 795 796[system.cpu.itb.walker] 797type=ArmTableWalker 798clk_domain=system.cpu_clk_domain 799eventq_index=0 800is_stage2=false 801num_squash_per_cycle=2 802sys=system 803port=system.cpu.toL2Bus.slave[2] 804 805[system.cpu.l2cache] 806type=Cache 807children=tags 808addr_ranges=0:18446744073709551615 809assoc=8 810clk_domain=system.cpu_clk_domain 811clusivity=mostly_incl 812demand_mshr_reserve=1 813eventq_index=0 814forward_snoops=true 815hit_latency=20 816is_read_only=false 817max_miss_count=0 818mshrs=20 819prefetch_on_access=false 820prefetcher=Null 821response_latency=20 822sequential_access=false 823size=2097152 824system=system 825tags=system.cpu.l2cache.tags 826tgts_per_mshr=12 827write_buffers=8 828writeback_clean=false 829cpu_side=system.cpu.toL2Bus.master[0] 830mem_side=system.membus.slave[1] 831 832[system.cpu.l2cache.tags] 833type=LRU 834assoc=8 835block_size=64 836clk_domain=system.cpu_clk_domain 837eventq_index=0 838hit_latency=20 839sequential_access=false 840size=2097152 841 842[system.cpu.toL2Bus] 843type=CoherentXBar 844children=snoop_filter 845clk_domain=system.cpu_clk_domain 846eventq_index=0 847forward_latency=0 848frontend_latency=1 849response_latency=1 850snoop_filter=system.cpu.toL2Bus.snoop_filter 851snoop_response_latency=1 852system=system 853use_default_range=false 854width=32 855master=system.cpu.l2cache.cpu_side 856slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 857 858[system.cpu.toL2Bus.snoop_filter] 859type=SnoopFilter 860eventq_index=0 861lookup_latency=0 862max_capacity=8388608 863system=system 864 865[system.cpu.tracer] 866type=ExeTracer 867eventq_index=0 868 869[system.cpu.workload] 870type=LiveProcess 871cmd=hello 872cwd= 873drivers= 874egid=100 875env= 876errout=cerr 877euid=100 878eventq_index=0 879executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello 880gid=100 881input=cin 882kvmInSE=false 883max_stack_size=67108864 884output=cout 885pid=100 886ppid=99 887simpoint=0 888system=system 889uid=100 890useArchPT=false 891 892[system.cpu_clk_domain] 893type=SrcClockDomain 894clock=500 895domain_id=-1 896eventq_index=0 897init_perf_level=0 898voltage_domain=system.voltage_domain 899 900[system.dvfs_handler] 901type=DVFSHandler 902domains= 903enable=false 904eventq_index=0 905sys_clk_domain=system.clk_domain 906transition_latency=100000000 907 908[system.membus] 909type=CoherentXBar 910clk_domain=system.clk_domain 911eventq_index=0 912forward_latency=4 913frontend_latency=3 914response_latency=2 915snoop_filter=Null 916snoop_response_latency=4 917system=system 918use_default_range=false 919width=16 920master=system.physmem.port 921slave=system.system_port system.cpu.l2cache.mem_side 922 923[system.physmem] 924type=DRAMCtrl 925IDD0=0.075000 926IDD02=0.000000 927IDD2N=0.050000 928IDD2N2=0.000000 929IDD2P0=0.000000 930IDD2P02=0.000000 931IDD2P1=0.000000 932IDD2P12=0.000000 933IDD3N=0.057000 934IDD3N2=0.000000 935IDD3P0=0.000000 936IDD3P02=0.000000 937IDD3P1=0.000000 938IDD3P12=0.000000 939IDD4R=0.187000 940IDD4R2=0.000000 941IDD4W=0.165000 942IDD4W2=0.000000 943IDD5=0.220000 944IDD52=0.000000 945IDD6=0.000000 946IDD62=0.000000 947VDD=1.500000 948VDD2=0.000000 949activation_limit=4 950addr_mapping=RoRaBaCoCh 951bank_groups_per_rank=0 952banks_per_rank=8 953burst_length=8 954channels=1 955clk_domain=system.clk_domain 956conf_table_reported=true 957device_bus_width=8 958device_rowbuffer_size=1024 959device_size=536870912 960devices_per_rank=8 961dll=true 962eventq_index=0 963in_addr_map=true 964max_accesses_per_row=16 965mem_sched_policy=frfcfs 966min_writes_per_switch=16 967null=false 968page_policy=open_adaptive 969range=0:134217727 970ranks_per_channel=2 971read_buffer_size=32 972static_backend_latency=10000 973static_frontend_latency=10000 974tBURST=5000 975tCCD_L=0 976tCK=1250 977tCL=13750 978tCS=2500 979tRAS=35000 980tRCD=13750 981tREFI=7800000 982tRFC=260000 983tRP=13750 984tRRD=6000 985tRRD_L=0 986tRTP=7500 987tRTW=2500 988tWR=15000 989tWTR=7500 990tXAW=30000 991tXP=0 992tXPDLL=0 993tXS=0 994tXSDLL=0 995write_buffer_size=64 996write_high_thresh_perc=85 997write_low_thresh_perc=50 998port=system.membus.master[0] 999 1000[system.voltage_domain] 1001type=VoltageDomain 1002eventq_index=0 1003voltage=1.000000 1004 1005