stats.txt revision 11530:6e143fd2cabf
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000107 # Number of seconds simulated 4sim_ticks 107065 # Number of ticks simulated 5final_tick 107065 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000 # Frequency of simulated ticks 7host_inst_rate 58028 # Simulator instruction rate (inst/s) 8host_op_rate 58023 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 970128 # Simulator tick rate (ticks/s) 10host_mem_usage 456600 # Number of bytes of host memory used 11host_seconds 0.11 # Real time elapsed on the host 12sim_insts 6403 # Number of instructions simulated 13sim_ops 6403 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 110784 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 110784 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 110528 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 110528 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 1731 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 1731 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 1727 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 1727 # Number of write requests responded to by this memory 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 1034735908 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 1034735908 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 1032344837 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 1032344837 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 2067080745 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 2067080745 # Total bandwidth to/from this memory (bytes/s) 31system.mem_ctrls.readReqs 1731 # Number of read requests accepted 32system.mem_ctrls.writeReqs 1727 # Number of write requests accepted 33system.mem_ctrls.readBursts 1731 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 1727 # Number of DRAM write bursts, including those merged in the write queue 35system.mem_ctrls.bytesReadDRAM 56512 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 54272 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 57856 # Total number of bytes written to DRAM 38system.mem_ctrls.bytesReadSys 110784 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 110528 # Total written bytes from the system interface side 40system.mem_ctrls.servicedByWrQ 848 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 792 # Number of DRAM write bursts merged with an existing one 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 43system.mem_ctrls.perBankRdBursts::0 85 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::1 47 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::2 74 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::3 68 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 112 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 23 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::6 1 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 3 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 1 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 49 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 33 # Per bank write bursts 55system.mem_ctrls.perBankRdBursts::12 17 # Per bank write bursts 56system.mem_ctrls.perBankRdBursts::13 263 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::14 79 # Per bank write bursts 58system.mem_ctrls.perBankRdBursts::15 28 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::0 83 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::1 47 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::2 80 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::3 68 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::4 133 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::5 25 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 1 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 4 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::9 1 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::10 46 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 28 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::12 11 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::13 268 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::14 81 # Per bank write bursts 74system.mem_ctrls.perBankWrBursts::15 28 # Per bank write bursts 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 77system.mem_ctrls.totGap 106993 # Total gap between requests 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 1731 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 1727 # Write request sizes (log2) 92system.mem_ctrls.rdQLenPdf::0 883 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 117system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 118system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 119system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 120system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 121system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 122system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 123system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::15 9 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::16 10 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 50 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::18 57 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 60 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::20 61 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 57 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 56 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 57 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 56 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 56 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 56 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 56 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 56 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 56 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 56 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 55 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 55 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 188system.mem_ctrls.bytesPerActivate::samples 275 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 406.341818 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 258.682678 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 357.059585 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 55 20.00% 20.00% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 74 26.91% 46.91% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 37 13.45% 60.36% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 16 5.82% 66.18% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 18 6.55% 72.73% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 12 4.36% 77.09% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 8 2.91% 80.00% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 6 2.18% 82.18% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 49 17.82% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 275 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 55 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 15.781818 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.596648 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 2.973282 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 4 7.27% 7.27% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 25 45.45% 52.73% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 21 38.18% 90.91% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 4 7.27% 98.18% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::34-35 1 1.82% 100.00% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::total 55 # Reads before turning the bus around for writes 212system.mem_ctrls.wrPerTurnAround::samples 55 # Writes before turning the bus around for reads 213system.mem_ctrls.wrPerTurnAround::mean 16.436364 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::gmean 16.408895 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::stdev 0.995613 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::16 45 81.82% 81.82% # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::17 2 3.64% 85.45% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::18 2 3.64% 89.09% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::19 6 10.91% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 55 # Writes before turning the bus around for reads 221system.mem_ctrls.totQLat 10887 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 27664 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 4415 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 12.33 # Average queueing delay per DRAM burst 225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst 226system.mem_ctrls.avgMemAccLat 31.33 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 527.83 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 540.38 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 1034.74 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 1032.34 # Average system write bandwidth in MiByte/s 231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 232system.mem_ctrls.busUtil 8.35 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 4.12 # Data bus utilization in percentage for reads 234system.mem_ctrls.busUtilWrite 4.22 # Data bus utilization in percentage for writes 235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing 236system.mem_ctrls.avgWrQLen 26.13 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 670 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 835 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 75.88 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 89.30 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 30.94 # Average gap between requests 242system.mem_ctrls.pageHitRate 82.78 # Row buffer hit rate, read and write combined 243system.mem_ctrls_0.actEnergy 876960 # Energy for activate commands per rank (pJ) 244system.mem_ctrls_0.preEnergy 487200 # Energy for precharge commands per rank (pJ) 245system.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ) 246system.mem_ctrls_0.writeEnergy 4489344 # Energy for write commands per rank (pJ) 247system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ) 248system.mem_ctrls_0.actBackEnergy 63943740 # Energy for active background per rank (pJ) 249system.mem_ctrls_0.preBackEnergy 4795800 # Energy for precharge background per rank (pJ) 250system.mem_ctrls_0.totalEnergy 86196324 # Total energy per rank (pJ) 251system.mem_ctrls_0.averagePower 849.408975 # Core power per rank (mW) 252system.mem_ctrls_0.memoryStateTime::IDLE 8418 # Time in different power states 253system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states 254system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 255system.mem_ctrls_0.memoryStateTime::ACT 90483 # Time in different power states 256system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 257system.mem_ctrls_1.actEnergy 1156680 # Energy for activate commands per rank (pJ) 258system.mem_ctrls_1.preEnergy 642600 # Energy for precharge commands per rank (pJ) 259system.mem_ctrls_1.readEnergy 5366400 # Energy for read commands per rank (pJ) 260system.mem_ctrls_1.writeEnergy 4385664 # Energy for write commands per rank (pJ) 261system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ) 262system.mem_ctrls_1.actBackEnergy 65375352 # Energy for active background per rank (pJ) 263system.mem_ctrls_1.preBackEnergy 3540000 # Energy for precharge background per rank (pJ) 264system.mem_ctrls_1.totalEnergy 87077976 # Total energy per rank (pJ) 265system.mem_ctrls_1.averagePower 858.097085 # Core power per rank (mW) 266system.mem_ctrls_1.memoryStateTime::IDLE 5471 # Time in different power states 267system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states 268system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 269system.mem_ctrls_1.memoryStateTime::ACT 92641 # Time in different power states 270system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 271system.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 272system.cpu.clk_domain.clock 1 # Clock period in ticks 273system.cpu.dtb.fetch_hits 0 # ITB hits 274system.cpu.dtb.fetch_misses 0 # ITB misses 275system.cpu.dtb.fetch_acv 0 # ITB acv 276system.cpu.dtb.fetch_accesses 0 # ITB accesses 277system.cpu.dtb.read_hits 1185 # DTB read hits 278system.cpu.dtb.read_misses 7 # DTB read misses 279system.cpu.dtb.read_acv 0 # DTB read access violations 280system.cpu.dtb.read_accesses 1192 # DTB read accesses 281system.cpu.dtb.write_hits 865 # DTB write hits 282system.cpu.dtb.write_misses 3 # DTB write misses 283system.cpu.dtb.write_acv 0 # DTB write access violations 284system.cpu.dtb.write_accesses 868 # DTB write accesses 285system.cpu.dtb.data_hits 2050 # DTB hits 286system.cpu.dtb.data_misses 10 # DTB misses 287system.cpu.dtb.data_acv 0 # DTB access violations 288system.cpu.dtb.data_accesses 2060 # DTB accesses 289system.cpu.itb.fetch_hits 6414 # ITB hits 290system.cpu.itb.fetch_misses 17 # ITB misses 291system.cpu.itb.fetch_acv 0 # ITB acv 292system.cpu.itb.fetch_accesses 6431 # ITB accesses 293system.cpu.itb.read_hits 0 # DTB read hits 294system.cpu.itb.read_misses 0 # DTB read misses 295system.cpu.itb.read_acv 0 # DTB read access violations 296system.cpu.itb.read_accesses 0 # DTB read accesses 297system.cpu.itb.write_hits 0 # DTB write hits 298system.cpu.itb.write_misses 0 # DTB write misses 299system.cpu.itb.write_acv 0 # DTB write access violations 300system.cpu.itb.write_accesses 0 # DTB write accesses 301system.cpu.itb.data_hits 0 # DTB hits 302system.cpu.itb.data_misses 0 # DTB misses 303system.cpu.itb.data_acv 0 # DTB access violations 304system.cpu.itb.data_accesses 0 # DTB accesses 305system.cpu.workload.num_syscalls 17 # Number of system calls 306system.cpu.pwrStateResidencyTicks::ON 107065 # Cumulative time (in ticks) in various power states 307system.cpu.numCycles 107065 # number of cpu cycles simulated 308system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 309system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 310system.cpu.committedInsts 6403 # Number of instructions committed 311system.cpu.committedOps 6403 # Number of ops (including micro ops) committed 312system.cpu.num_int_alu_accesses 6329 # Number of integer alu accesses 313system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses 314system.cpu.num_func_calls 251 # number of times a function call or return occured 315system.cpu.num_conditional_control_insts 754 # number of instructions that are conditional controls 316system.cpu.num_int_insts 6329 # number of integer instructions 317system.cpu.num_fp_insts 10 # number of float instructions 318system.cpu.num_int_register_reads 8297 # number of times the integer registers were read 319system.cpu.num_int_register_writes 4575 # number of times the integer registers were written 320system.cpu.num_fp_register_reads 8 # number of times the floating registers were read 321system.cpu.num_fp_register_writes 2 # number of times the floating registers were written 322system.cpu.num_mem_refs 2060 # number of memory refs 323system.cpu.num_load_insts 1192 # Number of load instructions 324system.cpu.num_store_insts 868 # Number of store instructions 325system.cpu.num_idle_cycles 0 # Number of idle cycles 326system.cpu.num_busy_cycles 107065 # Number of busy cycles 327system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 328system.cpu.idle_fraction 0 # Percentage of idle cycles 329system.cpu.Branches 1056 # Number of branches fetched 330system.cpu.op_class::No_OpClass 19 0.30% 0.30% # Class of executed instruction 331system.cpu.op_class::IntAlu 4331 67.53% 67.83% # Class of executed instruction 332system.cpu.op_class::IntMult 1 0.02% 67.85% # Class of executed instruction 333system.cpu.op_class::IntDiv 0 0.00% 67.85% # Class of executed instruction 334system.cpu.op_class::FloatAdd 2 0.03% 67.88% # Class of executed instruction 335system.cpu.op_class::FloatCmp 0 0.00% 67.88% # Class of executed instruction 336system.cpu.op_class::FloatCvt 0 0.00% 67.88% # Class of executed instruction 337system.cpu.op_class::FloatMult 0 0.00% 67.88% # Class of executed instruction 338system.cpu.op_class::FloatDiv 0 0.00% 67.88% # Class of executed instruction 339system.cpu.op_class::FloatSqrt 0 0.00% 67.88% # Class of executed instruction 340system.cpu.op_class::SimdAdd 0 0.00% 67.88% # Class of executed instruction 341system.cpu.op_class::SimdAddAcc 0 0.00% 67.88% # Class of executed instruction 342system.cpu.op_class::SimdAlu 0 0.00% 67.88% # Class of executed instruction 343system.cpu.op_class::SimdCmp 0 0.00% 67.88% # Class of executed instruction 344system.cpu.op_class::SimdCvt 0 0.00% 67.88% # Class of executed instruction 345system.cpu.op_class::SimdMisc 0 0.00% 67.88% # Class of executed instruction 346system.cpu.op_class::SimdMult 0 0.00% 67.88% # Class of executed instruction 347system.cpu.op_class::SimdMultAcc 0 0.00% 67.88% # Class of executed instruction 348system.cpu.op_class::SimdShift 0 0.00% 67.88% # Class of executed instruction 349system.cpu.op_class::SimdShiftAcc 0 0.00% 67.88% # Class of executed instruction 350system.cpu.op_class::SimdSqrt 0 0.00% 67.88% # Class of executed instruction 351system.cpu.op_class::SimdFloatAdd 0 0.00% 67.88% # Class of executed instruction 352system.cpu.op_class::SimdFloatAlu 0 0.00% 67.88% # Class of executed instruction 353system.cpu.op_class::SimdFloatCmp 0 0.00% 67.88% # Class of executed instruction 354system.cpu.op_class::SimdFloatCvt 0 0.00% 67.88% # Class of executed instruction 355system.cpu.op_class::SimdFloatDiv 0 0.00% 67.88% # Class of executed instruction 356system.cpu.op_class::SimdFloatMisc 0 0.00% 67.88% # Class of executed instruction 357system.cpu.op_class::SimdFloatMult 0 0.00% 67.88% # Class of executed instruction 358system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.88% # Class of executed instruction 359system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.88% # Class of executed instruction 360system.cpu.op_class::MemRead 1192 18.59% 86.46% # Class of executed instruction 361system.cpu.op_class::MemWrite 868 13.54% 100.00% # Class of executed instruction 362system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 363system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 364system.cpu.op_class::total 6413 # Class of executed instruction 365system.ruby.clk_domain.clock 1 # Clock period in ticks 366system.ruby.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 367system.ruby.delayHist::bucket_size 1 # delay histogram for all message 368system.ruby.delayHist::max_bucket 9 # delay histogram for all message 369system.ruby.delayHist::samples 3458 # delay histogram for all message 370system.ruby.delayHist | 3458 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 371system.ruby.delayHist::total 3458 # delay histogram for all message 372system.ruby.outstanding_req_hist_seqr::bucket_size 1 373system.ruby.outstanding_req_hist_seqr::max_bucket 9 374system.ruby.outstanding_req_hist_seqr::samples 8464 375system.ruby.outstanding_req_hist_seqr::mean 1 376system.ruby.outstanding_req_hist_seqr::gmean 1 377system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8464 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 378system.ruby.outstanding_req_hist_seqr::total 8464 379system.ruby.latency_hist_seqr::bucket_size 64 380system.ruby.latency_hist_seqr::max_bucket 639 381system.ruby.latency_hist_seqr::samples 8463 382system.ruby.latency_hist_seqr::mean 11.650951 383system.ruby.latency_hist_seqr::gmean 2.202191 384system.ruby.latency_hist_seqr::stdev 25.742711 385system.ruby.latency_hist_seqr | 8220 97.13% 97.13% | 190 2.25% 99.37% | 41 0.48% 99.86% | 1 0.01% 99.87% | 6 0.07% 99.94% | 4 0.05% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 386system.ruby.latency_hist_seqr::total 8463 387system.ruby.hit_latency_hist_seqr::bucket_size 1 388system.ruby.hit_latency_hist_seqr::max_bucket 9 389system.ruby.hit_latency_hist_seqr::samples 6732 390system.ruby.hit_latency_hist_seqr::mean 1 391system.ruby.hit_latency_hist_seqr::gmean 1 392system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 6732 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 393system.ruby.hit_latency_hist_seqr::total 6732 394system.ruby.miss_latency_hist_seqr::bucket_size 64 395system.ruby.miss_latency_hist_seqr::max_bucket 639 396system.ruby.miss_latency_hist_seqr::samples 1731 397system.ruby.miss_latency_hist_seqr::mean 53.073368 398system.ruby.miss_latency_hist_seqr::gmean 47.451096 399system.ruby.miss_latency_hist_seqr::stdev 32.911544 400system.ruby.miss_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 401system.ruby.miss_latency_hist_seqr::total 1731 402system.ruby.Directory.incomplete_times_seqr 1730 403system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 404system.ruby.l1_cntrl0.cacheMemory.demand_hits 6732 # Number of cache demand hits 405system.ruby.l1_cntrl0.cacheMemory.demand_misses 1731 # Number of cache demand misses 406system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8463 # Number of cache demand accesses 407system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 408system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 409system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 410system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 411system.ruby.network.routers0.percent_links_utilized 8.074534 412system.ruby.network.routers0.msg_count.Control::2 1731 413system.ruby.network.routers0.msg_count.Data::2 1727 414system.ruby.network.routers0.msg_count.Response_Data::4 1731 415system.ruby.network.routers0.msg_count.Writeback_Control::3 1727 416system.ruby.network.routers0.msg_bytes.Control::2 13848 417system.ruby.network.routers0.msg_bytes.Data::2 124344 418system.ruby.network.routers0.msg_bytes.Response_Data::4 124632 419system.ruby.network.routers0.msg_bytes.Writeback_Control::3 13816 420system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 421system.ruby.network.routers1.percent_links_utilized 8.074534 422system.ruby.network.routers1.msg_count.Control::2 1731 423system.ruby.network.routers1.msg_count.Data::2 1727 424system.ruby.network.routers1.msg_count.Response_Data::4 1731 425system.ruby.network.routers1.msg_count.Writeback_Control::3 1727 426system.ruby.network.routers1.msg_bytes.Control::2 13848 427system.ruby.network.routers1.msg_bytes.Data::2 124344 428system.ruby.network.routers1.msg_bytes.Response_Data::4 124632 429system.ruby.network.routers1.msg_bytes.Writeback_Control::3 13816 430system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 431system.ruby.network.routers2.percent_links_utilized 8.074534 432system.ruby.network.routers2.msg_count.Control::2 1731 433system.ruby.network.routers2.msg_count.Data::2 1727 434system.ruby.network.routers2.msg_count.Response_Data::4 1731 435system.ruby.network.routers2.msg_count.Writeback_Control::3 1727 436system.ruby.network.routers2.msg_bytes.Control::2 13848 437system.ruby.network.routers2.msg_bytes.Data::2 124344 438system.ruby.network.routers2.msg_bytes.Response_Data::4 124632 439system.ruby.network.routers2.msg_bytes.Writeback_Control::3 13816 440system.ruby.network.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 441system.ruby.network.msg_count.Control 5193 442system.ruby.network.msg_count.Data 5181 443system.ruby.network.msg_count.Response_Data 5193 444system.ruby.network.msg_count.Writeback_Control 5181 445system.ruby.network.msg_byte.Control 41544 446system.ruby.network.msg_byte.Data 373032 447system.ruby.network.msg_byte.Response_Data 373896 448system.ruby.network.msg_byte.Writeback_Control 41448 449system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states 450system.ruby.network.routers0.throttle0.link_utilization 8.082006 451system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1731 452system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1727 453system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 124632 454system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 13816 455system.ruby.network.routers0.throttle1.link_utilization 8.067062 456system.ruby.network.routers0.throttle1.msg_count.Control::2 1731 457system.ruby.network.routers0.throttle1.msg_count.Data::2 1727 458system.ruby.network.routers0.throttle1.msg_bytes.Control::2 13848 459system.ruby.network.routers0.throttle1.msg_bytes.Data::2 124344 460system.ruby.network.routers1.throttle0.link_utilization 8.067062 461system.ruby.network.routers1.throttle0.msg_count.Control::2 1731 462system.ruby.network.routers1.throttle0.msg_count.Data::2 1727 463system.ruby.network.routers1.throttle0.msg_bytes.Control::2 13848 464system.ruby.network.routers1.throttle0.msg_bytes.Data::2 124344 465system.ruby.network.routers1.throttle1.link_utilization 8.082006 466system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1731 467system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1727 468system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 124632 469system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 13816 470system.ruby.network.routers2.throttle0.link_utilization 8.082006 471system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1731 472system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1727 473system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 124632 474system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 13816 475system.ruby.network.routers2.throttle1.link_utilization 8.067062 476system.ruby.network.routers2.throttle1.msg_count.Control::2 1731 477system.ruby.network.routers2.throttle1.msg_count.Data::2 1727 478system.ruby.network.routers2.throttle1.msg_bytes.Control::2 13848 479system.ruby.network.routers2.throttle1.msg_bytes.Data::2 124344 480system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 481system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 482system.ruby.delayVCHist.vnet_1::samples 1731 # delay histogram for vnet_1 483system.ruby.delayVCHist.vnet_1 | 1731 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 484system.ruby.delayVCHist.vnet_1::total 1731 # delay histogram for vnet_1 485system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 486system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 487system.ruby.delayVCHist.vnet_2::samples 1727 # delay histogram for vnet_2 488system.ruby.delayVCHist.vnet_2 | 1727 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 489system.ruby.delayVCHist.vnet_2::total 1727 # delay histogram for vnet_2 490system.ruby.LD.latency_hist_seqr::bucket_size 64 491system.ruby.LD.latency_hist_seqr::max_bucket 639 492system.ruby.LD.latency_hist_seqr::samples 1185 493system.ruby.LD.latency_hist_seqr::mean 31.532489 494system.ruby.LD.latency_hist_seqr::gmean 10.421226 495system.ruby.LD.latency_hist_seqr::stdev 34.906160 496system.ruby.LD.latency_hist_seqr | 1091 92.07% 92.07% | 75 6.33% 98.40% | 15 1.27% 99.66% | 0 0.00% 99.66% | 2 0.17% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 497system.ruby.LD.latency_hist_seqr::total 1185 498system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 499system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 500system.ruby.LD.hit_latency_hist_seqr::samples 457 501system.ruby.LD.hit_latency_hist_seqr::mean 1 502system.ruby.LD.hit_latency_hist_seqr::gmean 1 503system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 457 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 504system.ruby.LD.hit_latency_hist_seqr::total 457 505system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 506system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 507system.ruby.LD.miss_latency_hist_seqr::samples 728 508system.ruby.LD.miss_latency_hist_seqr::mean 50.699176 509system.ruby.LD.miss_latency_hist_seqr::gmean 45.385232 510system.ruby.LD.miss_latency_hist_seqr::stdev 32.101179 511system.ruby.LD.miss_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 512system.ruby.LD.miss_latency_hist_seqr::total 728 513system.ruby.ST.latency_hist_seqr::bucket_size 32 514system.ruby.ST.latency_hist_seqr::max_bucket 319 515system.ruby.ST.latency_hist_seqr::samples 865 516system.ruby.ST.latency_hist_seqr::mean 16.426590 517system.ruby.ST.latency_hist_seqr::gmean 3.318487 518system.ruby.ST.latency_hist_seqr::stdev 28.264983 519system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 242 27.98% 96.42% | 21 2.43% 98.84% | 1 0.12% 98.96% | 4 0.46% 99.42% | 4 0.46% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 1 0.12% 100.00% 520system.ruby.ST.latency_hist_seqr::total 865 521system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 522system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 523system.ruby.ST.hit_latency_hist_seqr::samples 592 524system.ruby.ST.hit_latency_hist_seqr::mean 1 525system.ruby.ST.hit_latency_hist_seqr::gmean 1 526system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 592 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 527system.ruby.ST.hit_latency_hist_seqr::total 592 528system.ruby.ST.miss_latency_hist_seqr::bucket_size 32 529system.ruby.ST.miss_latency_hist_seqr::max_bucket 319 530system.ruby.ST.miss_latency_hist_seqr::samples 273 531system.ruby.ST.miss_latency_hist_seqr::mean 49.879121 532system.ruby.ST.miss_latency_hist_seqr::gmean 44.729882 533system.ruby.ST.miss_latency_hist_seqr::stdev 29.942777 534system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00% 535system.ruby.ST.miss_latency_hist_seqr::total 273 536system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 537system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 538system.ruby.IFETCH.latency_hist_seqr::samples 6413 539system.ruby.IFETCH.latency_hist_seqr::mean 7.333073 540system.ruby.IFETCH.latency_hist_seqr::gmean 1.563492 541system.ruby.IFETCH.latency_hist_seqr::stdev 21.145733 542system.ruby.IFETCH.latency_hist_seqr | 6295 98.16% 98.16% | 93 1.45% 99.61% | 18 0.28% 99.89% | 1 0.02% 99.91% | 3 0.05% 99.95% | 3 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 543system.ruby.IFETCH.latency_hist_seqr::total 6413 544system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 545system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 546system.ruby.IFETCH.hit_latency_hist_seqr::samples 5683 547system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 548system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 549system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 5683 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 550system.ruby.IFETCH.hit_latency_hist_seqr::total 5683 551system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 552system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 553system.ruby.IFETCH.miss_latency_hist_seqr::samples 730 554system.ruby.IFETCH.miss_latency_hist_seqr::mean 56.635616 555system.ruby.IFETCH.miss_latency_hist_seqr::gmean 50.712708 556system.ruby.IFETCH.miss_latency_hist_seqr::stdev 34.440483 557system.ruby.IFETCH.miss_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 558system.ruby.IFETCH.miss_latency_hist_seqr::total 730 559system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 560system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 561system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1731 562system.ruby.Directory.miss_mach_latency_hist_seqr::mean 53.073368 563system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 47.451096 564system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 32.911544 565system.ruby.Directory.miss_mach_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 566system.ruby.Directory.miss_mach_latency_hist_seqr::total 1731 567system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 568system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 570system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 571system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 572system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 573system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 574system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9 575system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1 576system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan 577system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 578system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1 579system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1 580system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9 581system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1 582system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan 583system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 584system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1 585system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8 586system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79 587system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1 588system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 590system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 591system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 592system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 593system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 594system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 728 596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 50.699176 597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 45.385232 598system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.101179 599system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 728 601system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32 602system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319 603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 273 604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 49.879121 605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 44.729882 606system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 29.942777 607system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00% 608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 273 609system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 610system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 730 612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 56.635616 613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 50.712708 614system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 34.440483 615system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 730 617system.ruby.Directory_Controller.GETX 1731 0.00% 0.00% 618system.ruby.Directory_Controller.PUTX 1727 0.00% 0.00% 619system.ruby.Directory_Controller.Memory_Data 1731 0.00% 0.00% 620system.ruby.Directory_Controller.Memory_Ack 1727 0.00% 0.00% 621system.ruby.Directory_Controller.I.GETX 1731 0.00% 0.00% 622system.ruby.Directory_Controller.M.PUTX 1727 0.00% 0.00% 623system.ruby.Directory_Controller.IM.Memory_Data 1731 0.00% 0.00% 624system.ruby.Directory_Controller.MI.Memory_Ack 1727 0.00% 0.00% 625system.ruby.L1Cache_Controller.Load 1185 0.00% 0.00% 626system.ruby.L1Cache_Controller.Ifetch 6413 0.00% 0.00% 627system.ruby.L1Cache_Controller.Store 865 0.00% 0.00% 628system.ruby.L1Cache_Controller.Data 1731 0.00% 0.00% 629system.ruby.L1Cache_Controller.Replacement 1727 0.00% 0.00% 630system.ruby.L1Cache_Controller.Writeback_Ack 1727 0.00% 0.00% 631system.ruby.L1Cache_Controller.I.Load 728 0.00% 0.00% 632system.ruby.L1Cache_Controller.I.Ifetch 730 0.00% 0.00% 633system.ruby.L1Cache_Controller.I.Store 273 0.00% 0.00% 634system.ruby.L1Cache_Controller.M.Load 457 0.00% 0.00% 635system.ruby.L1Cache_Controller.M.Ifetch 5683 0.00% 0.00% 636system.ruby.L1Cache_Controller.M.Store 592 0.00% 0.00% 637system.ruby.L1Cache_Controller.M.Replacement 1727 0.00% 0.00% 638system.ruby.L1Cache_Controller.MI.Writeback_Ack 1727 0.00% 0.00% 639system.ruby.L1Cache_Controller.IS.Data 1458 0.00% 0.00% 640system.ruby.L1Cache_Controller.IM.Data 273 0.00% 0.00% 641 642---------- End Simulation Statistics ---------- 643