stats.txt revision 8428
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000003 # Number of seconds simulated 4sim_ticks 3215000 # Number of ticks simulated 5sim_freq 1000000000000 # Frequency of simulated ticks 6host_inst_rate 887593 # Simulator instruction rate (inst/s) 7host_tick_rate 444402423 # Simulator tick rate (ticks/s) 8host_mem_usage 183180 # Number of bytes of host memory used 9host_seconds 0.01 # Real time elapsed on the host 10sim_insts 6404 # Number of instructions simulated 11system.cpu.dtb.fetch_hits 0 # ITB hits 12system.cpu.dtb.fetch_misses 0 # ITB misses 13system.cpu.dtb.fetch_acv 0 # ITB acv 14system.cpu.dtb.fetch_accesses 0 # ITB accesses 15system.cpu.dtb.read_hits 1185 # DTB read hits 16system.cpu.dtb.read_misses 7 # DTB read misses 17system.cpu.dtb.read_acv 0 # DTB read access violations 18system.cpu.dtb.read_accesses 1192 # DTB read accesses 19system.cpu.dtb.write_hits 865 # DTB write hits 20system.cpu.dtb.write_misses 3 # DTB write misses 21system.cpu.dtb.write_acv 0 # DTB write access violations 22system.cpu.dtb.write_accesses 868 # DTB write accesses 23system.cpu.dtb.data_hits 2050 # DTB hits 24system.cpu.dtb.data_misses 10 # DTB misses 25system.cpu.dtb.data_acv 0 # DTB access violations 26system.cpu.dtb.data_accesses 2060 # DTB accesses 27system.cpu.itb.fetch_hits 6414 # ITB hits 28system.cpu.itb.fetch_misses 17 # ITB misses 29system.cpu.itb.fetch_acv 0 # ITB acv 30system.cpu.itb.fetch_accesses 6431 # ITB accesses 31system.cpu.itb.read_hits 0 # DTB read hits 32system.cpu.itb.read_misses 0 # DTB read misses 33system.cpu.itb.read_acv 0 # DTB read access violations 34system.cpu.itb.read_accesses 0 # DTB read accesses 35system.cpu.itb.write_hits 0 # DTB write hits 36system.cpu.itb.write_misses 0 # DTB write misses 37system.cpu.itb.write_acv 0 # DTB write access violations 38system.cpu.itb.write_accesses 0 # DTB write accesses 39system.cpu.itb.data_hits 0 # DTB hits 40system.cpu.itb.data_misses 0 # DTB misses 41system.cpu.itb.data_acv 0 # DTB access violations 42system.cpu.itb.data_accesses 0 # DTB accesses 43system.cpu.workload.num_syscalls 17 # Number of system calls 44system.cpu.numCycles 6431 # number of cpu cycles simulated 45system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 46system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 47system.cpu.num_insts 6404 # Number of instructions executed 48system.cpu.num_int_alu_accesses 6331 # Number of integer alu accesses 49system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses 50system.cpu.num_func_calls 251 # number of times a function call or return occured 51system.cpu.num_conditional_control_insts 750 # number of instructions that are conditional controls 52system.cpu.num_int_insts 6331 # number of integer instructions 53system.cpu.num_fp_insts 10 # number of float instructions 54system.cpu.num_int_register_reads 8304 # number of times the integer registers were read 55system.cpu.num_int_register_writes 4581 # number of times the integer registers were written 56system.cpu.num_fp_register_reads 8 # number of times the floating registers were read 57system.cpu.num_fp_register_writes 2 # number of times the floating registers were written 58system.cpu.num_mem_refs 2060 # number of memory refs 59system.cpu.num_load_insts 1192 # Number of load instructions 60system.cpu.num_store_insts 868 # Number of store instructions 61system.cpu.num_idle_cycles 0 # Number of idle cycles 62system.cpu.num_busy_cycles 6431 # Number of busy cycles 63system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 64system.cpu.idle_fraction 0 # Percentage of idle cycles 65 66---------- End Simulation Statistics ---------- 67