stats.txt revision 11502
13048SN/A 23048SN/A---------- Begin Simulation Statistics ---------- 34391SN/Asim_seconds 0.000003 # Number of seconds simulated 411390Ssteve.reinhardt@amd.comsim_ticks 3214500 # Number of ticks simulated 511390Ssteve.reinhardt@amd.comfinal_tick 3214500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68428SN/Asim_freq 1000000000000 # Frequency of simulated ticks 711502SCurtis.Dunham@arm.comhost_inst_rate 1011674 # Simulator instruction rate (inst/s) 811502SCurtis.Dunham@arm.comhost_op_rate 1009913 # Simulator op (including micro ops) rate (op/s) 911502SCurtis.Dunham@arm.comhost_tick_rate 506215370 # Simulator tick rate (ticks/s) 1011502SCurtis.Dunham@arm.comhost_mem_usage 237756 # Number of bytes of host memory used 1111502SCurtis.Dunham@arm.comhost_seconds 0.01 # Real time elapsed on the host 1211390Ssteve.reinhardt@amd.comsim_insts 6403 # Number of instructions simulated 1311390Ssteve.reinhardt@amd.comsim_ops 6403 # Number of ops (including micro ops) simulated 1410036SAli.Saidi@ARM.comsystem.voltage_domain.voltage 1 # Voltage in Volts 1510036SAli.Saidi@ARM.comsystem.clk_domain.clock 1000 # Clock period in ticks 1611390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::cpu.inst 25652 # Number of bytes read from this memory 1711390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::cpu.data 8804 # Number of bytes read from this memory 1811390Ssteve.reinhardt@amd.comsystem.physmem.bytes_read::total 34456 # Number of bytes read from this memory 1911390Ssteve.reinhardt@amd.comsystem.physmem.bytes_inst_read::cpu.inst 25652 # Number of instructions bytes read from this memory 2011390Ssteve.reinhardt@amd.comsystem.physmem.bytes_inst_read::total 25652 # Number of instructions bytes read from this memory 219055Ssaidi@eecs.umich.edusystem.physmem.bytes_written::cpu.data 6696 # Number of bytes written to this memory 229055Ssaidi@eecs.umich.edusystem.physmem.bytes_written::total 6696 # Number of bytes written to this memory 2311390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::cpu.inst 6413 # Number of read requests responded to by this memory 2411390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::cpu.data 1185 # Number of read requests responded to by this memory 2511390Ssteve.reinhardt@amd.comsystem.physmem.num_reads::total 7598 # Number of read requests responded to by this memory 269055Ssaidi@eecs.umich.edusystem.physmem.num_writes::cpu.data 865 # Number of write requests responded to by this memory 279055Ssaidi@eecs.umich.edusystem.physmem.num_writes::total 865 # Number of write requests responded to by this memory 2811390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::cpu.inst 7980090216 # Total read bandwidth from this memory (bytes/s) 2911390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::cpu.data 2738839633 # Total read bandwidth from this memory (bytes/s) 3011390Ssteve.reinhardt@amd.comsystem.physmem.bw_read::total 10718929849 # Total read bandwidth from this memory (bytes/s) 3111390Ssteve.reinhardt@amd.comsystem.physmem.bw_inst_read::cpu.inst 7980090216 # Instruction read bandwidth from this memory (bytes/s) 3211390Ssteve.reinhardt@amd.comsystem.physmem.bw_inst_read::total 7980090216 # Instruction read bandwidth from this memory (bytes/s) 3311390Ssteve.reinhardt@amd.comsystem.physmem.bw_write::cpu.data 2083061129 # Write bandwidth from this memory (bytes/s) 3411390Ssteve.reinhardt@amd.comsystem.physmem.bw_write::total 2083061129 # Write bandwidth from this memory (bytes/s) 3511390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::cpu.inst 7980090216 # Total bandwidth to/from this memory (bytes/s) 3611390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::cpu.data 4821900762 # Total bandwidth to/from this memory (bytes/s) 3711390Ssteve.reinhardt@amd.comsystem.physmem.bw_total::total 12801990978 # Total bandwidth to/from this memory (bytes/s) 3810036SAli.Saidi@ARM.comsystem.cpu_clk_domain.clock 500 # Clock period in ticks 398428SN/Asystem.cpu.dtb.fetch_hits 0 # ITB hits 408428SN/Asystem.cpu.dtb.fetch_misses 0 # ITB misses 418428SN/Asystem.cpu.dtb.fetch_acv 0 # ITB acv 428428SN/Asystem.cpu.dtb.fetch_accesses 0 # ITB accesses 4311390Ssteve.reinhardt@amd.comsystem.cpu.dtb.read_hits 1185 # DTB read hits 448428SN/Asystem.cpu.dtb.read_misses 7 # DTB read misses 458428SN/Asystem.cpu.dtb.read_acv 0 # DTB read access violations 4611390Ssteve.reinhardt@amd.comsystem.cpu.dtb.read_accesses 1192 # DTB read accesses 478428SN/Asystem.cpu.dtb.write_hits 865 # DTB write hits 488428SN/Asystem.cpu.dtb.write_misses 3 # DTB write misses 498428SN/Asystem.cpu.dtb.write_acv 0 # DTB write access violations 508428SN/Asystem.cpu.dtb.write_accesses 868 # DTB write accesses 5111390Ssteve.reinhardt@amd.comsystem.cpu.dtb.data_hits 2050 # DTB hits 526024SN/Asystem.cpu.dtb.data_misses 10 # DTB misses 538428SN/Asystem.cpu.dtb.data_acv 0 # DTB access violations 5411390Ssteve.reinhardt@amd.comsystem.cpu.dtb.data_accesses 2060 # DTB accesses 5511390Ssteve.reinhardt@amd.comsystem.cpu.itb.fetch_hits 6413 # ITB hits 568428SN/Asystem.cpu.itb.fetch_misses 17 # ITB misses 578428SN/Asystem.cpu.itb.fetch_acv 0 # ITB acv 5811390Ssteve.reinhardt@amd.comsystem.cpu.itb.fetch_accesses 6430 # ITB accesses 598428SN/Asystem.cpu.itb.read_hits 0 # DTB read hits 608428SN/Asystem.cpu.itb.read_misses 0 # DTB read misses 618428SN/Asystem.cpu.itb.read_acv 0 # DTB read access violations 628428SN/Asystem.cpu.itb.read_accesses 0 # DTB read accesses 638428SN/Asystem.cpu.itb.write_hits 0 # DTB write hits 648428SN/Asystem.cpu.itb.write_misses 0 # DTB write misses 658428SN/Asystem.cpu.itb.write_acv 0 # DTB write access violations 668428SN/Asystem.cpu.itb.write_accesses 0 # DTB write accesses 676024SN/Asystem.cpu.itb.data_hits 0 # DTB hits 686024SN/Asystem.cpu.itb.data_misses 0 # DTB misses 698428SN/Asystem.cpu.itb.data_acv 0 # DTB access violations 708428SN/Asystem.cpu.itb.data_accesses 0 # DTB accesses 718428SN/Asystem.cpu.workload.num_syscalls 17 # Number of system calls 7211390Ssteve.reinhardt@amd.comsystem.cpu.numCycles 6430 # number of cpu cycles simulated 738428SN/Asystem.cpu.numWorkItemsStarted 0 # number of work items this cpu started 747935SN/Asystem.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 7511390Ssteve.reinhardt@amd.comsystem.cpu.committedInsts 6403 # Number of instructions committed 7611390Ssteve.reinhardt@amd.comsystem.cpu.committedOps 6403 # Number of ops (including micro ops) committed 7711390Ssteve.reinhardt@amd.comsystem.cpu.num_int_alu_accesses 6329 # Number of integer alu accesses 788428SN/Asystem.cpu.num_fp_alu_accesses 10 # Number of float alu accesses 798428SN/Asystem.cpu.num_func_calls 251 # number of times a function call or return occured 8011390Ssteve.reinhardt@amd.comsystem.cpu.num_conditional_control_insts 754 # number of instructions that are conditional controls 8111390Ssteve.reinhardt@amd.comsystem.cpu.num_int_insts 6329 # number of integer instructions 827935SN/Asystem.cpu.num_fp_insts 10 # number of float instructions 8311390Ssteve.reinhardt@amd.comsystem.cpu.num_int_register_reads 8297 # number of times the integer registers were read 8411390Ssteve.reinhardt@amd.comsystem.cpu.num_int_register_writes 4575 # number of times the integer registers were written 857935SN/Asystem.cpu.num_fp_register_reads 8 # number of times the floating registers were read 867935SN/Asystem.cpu.num_fp_register_writes 2 # number of times the floating registers were written 8711390Ssteve.reinhardt@amd.comsystem.cpu.num_mem_refs 2060 # number of memory refs 8811390Ssteve.reinhardt@amd.comsystem.cpu.num_load_insts 1192 # Number of load instructions 898428SN/Asystem.cpu.num_store_insts 868 # Number of store instructions 907935SN/Asystem.cpu.num_idle_cycles 0 # Number of idle cycles 9111390Ssteve.reinhardt@amd.comsystem.cpu.num_busy_cycles 6430 # Number of busy cycles 928428SN/Asystem.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 938428SN/Asystem.cpu.idle_fraction 0 # Percentage of idle cycles 9411390Ssteve.reinhardt@amd.comsystem.cpu.Branches 1056 # Number of branches fetched 9510220Sandreas.hansson@arm.comsystem.cpu.op_class::No_OpClass 19 0.30% 0.30% # Class of executed instruction 9611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntAlu 4331 67.53% 67.83% # Class of executed instruction 9711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntMult 1 0.02% 67.85% # Class of executed instruction 9811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::IntDiv 0 0.00% 67.85% # Class of executed instruction 9911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatAdd 2 0.03% 67.88% # Class of executed instruction 10011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatCmp 0 0.00% 67.88% # Class of executed instruction 10111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatCvt 0 0.00% 67.88% # Class of executed instruction 10211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatMult 0 0.00% 67.88% # Class of executed instruction 10311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatDiv 0 0.00% 67.88% # Class of executed instruction 10411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::FloatSqrt 0 0.00% 67.88% # Class of executed instruction 10511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAdd 0 0.00% 67.88% # Class of executed instruction 10611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAddAcc 0 0.00% 67.88% # Class of executed instruction 10711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdAlu 0 0.00% 67.88% # Class of executed instruction 10811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdCmp 0 0.00% 67.88% # Class of executed instruction 10911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdCvt 0 0.00% 67.88% # Class of executed instruction 11011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMisc 0 0.00% 67.88% # Class of executed instruction 11111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMult 0 0.00% 67.88% # Class of executed instruction 11211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdMultAcc 0 0.00% 67.88% # Class of executed instruction 11311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdShift 0 0.00% 67.88% # Class of executed instruction 11411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdShiftAcc 0 0.00% 67.88% # Class of executed instruction 11511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdSqrt 0 0.00% 67.88% # Class of executed instruction 11611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatAdd 0 0.00% 67.88% # Class of executed instruction 11711390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatAlu 0 0.00% 67.88% # Class of executed instruction 11811390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatCmp 0 0.00% 67.88% # Class of executed instruction 11911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatCvt 0 0.00% 67.88% # Class of executed instruction 12011390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatDiv 0 0.00% 67.88% # Class of executed instruction 12111390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMisc 0 0.00% 67.88% # Class of executed instruction 12211390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMult 0 0.00% 67.88% # Class of executed instruction 12311390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.88% # Class of executed instruction 12411390Ssteve.reinhardt@amd.comsystem.cpu.op_class::SimdFloatSqrt 0 0.00% 67.88% # Class of executed instruction 12511390Ssteve.reinhardt@amd.comsystem.cpu.op_class::MemRead 1192 18.59% 86.46% # Class of executed instruction 12611390Ssteve.reinhardt@amd.comsystem.cpu.op_class::MemWrite 868 13.54% 100.00% # Class of executed instruction 12710220Sandreas.hansson@arm.comsystem.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 12810220Sandreas.hansson@arm.comsystem.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 12911390Ssteve.reinhardt@amd.comsystem.cpu.op_class::total 6413 # Class of executed instruction 13011390Ssteve.reinhardt@amd.comsystem.membus.trans_dist::ReadReq 7598 # Transaction distribution 13111390Ssteve.reinhardt@amd.comsystem.membus.trans_dist::ReadResp 7598 # Transaction distribution 13211268Satgutier@umich.edusystem.membus.trans_dist::WriteReq 865 # Transaction distribution 13311268Satgutier@umich.edusystem.membus.trans_dist::WriteResp 865 # Transaction distribution 13411390Ssteve.reinhardt@amd.comsystem.membus.pkt_count_system.cpu.icache_port::system.physmem.port 12826 # Packet count per connected master and slave (bytes) 13511390Ssteve.reinhardt@amd.comsystem.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 4100 # Packet count per connected master and slave (bytes) 13611390Ssteve.reinhardt@amd.comsystem.membus.pkt_count::total 16926 # Packet count per connected master and slave (bytes) 13711390Ssteve.reinhardt@amd.comsystem.membus.pkt_size_system.cpu.icache_port::system.physmem.port 25652 # Cumulative packet size per connected master and slave (bytes) 13811390Ssteve.reinhardt@amd.comsystem.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 15500 # Cumulative packet size per connected master and slave (bytes) 13911390Ssteve.reinhardt@amd.comsystem.membus.pkt_size::total 41152 # Cumulative packet size per connected master and slave (bytes) 14011268Satgutier@umich.edusystem.membus.snoops 0 # Total snoops (count) 14111390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::samples 8463 # Request fanout histogram 14211390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::mean 0.757769 # Request fanout histogram 14311390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::stdev 0.428459 # Request fanout histogram 14411268Satgutier@umich.edusystem.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 14511390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::0 2050 24.22% 24.22% # Request fanout histogram 14611390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::1 6413 75.78% 100.00% # Request fanout histogram 14711268Satgutier@umich.edusystem.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 14811268Satgutier@umich.edusystem.membus.snoop_fanout::min_value 0 # Request fanout histogram 14911268Satgutier@umich.edusystem.membus.snoop_fanout::max_value 1 # Request fanout histogram 15011390Ssteve.reinhardt@amd.comsystem.membus.snoop_fanout::total 8463 # Request fanout histogram 1513048SN/A 1523048SN/A---------- End Simulation Statistics ---------- 153