stats.txt revision 6127
110515SAli.Saidi@ARM.com 210515SAli.Saidi@ARM.com---------- Begin Simulation Statistics ---------- 310628Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_accesses 401302 # DTB accesses 410628Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_acv 40 # DTB access violations 510628Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_hits 624235 # DTB hits 610515SAli.Saidi@ARM.comdrivesys.cpu.dtb.data_misses 569 # DTB misses 710636Snilay@cs.wisc.edudrivesys.cpu.dtb.fetch_accesses 0 # ITB accesses 810636Snilay@cs.wisc.edudrivesys.cpu.dtb.fetch_acv 0 # ITB acv 910636Snilay@cs.wisc.edudrivesys.cpu.dtb.fetch_hits 0 # ITB hits 1010636Snilay@cs.wisc.edudrivesys.cpu.dtb.fetch_misses 0 # ITB misses 1110636Snilay@cs.wisc.edudrivesys.cpu.dtb.read_accesses 268057 # DTB read accesses 1210628Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_acv 30 # DTB read access violations 1310628Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_hits 393500 # DTB read hits 1410515SAli.Saidi@ARM.comdrivesys.cpu.dtb.read_misses 487 # DTB read misses 1510515SAli.Saidi@ARM.comdrivesys.cpu.dtb.write_accesses 133245 # DTB write accesses 1610628Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_acv 10 # DTB write access violations 1710628Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_hits 230735 # DTB write hits 1810636Snilay@cs.wisc.edudrivesys.cpu.dtb.write_misses 82 # DTB write misses 1910636Snilay@cs.wisc.edudrivesys.cpu.idle_fraction 1.000000 # Percentage of idle cycles 2010628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_accesses 0 # DTB accesses 2110628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_acv 0 # DTB access violations 2210628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_hits 0 # DTB hits 2310628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_misses 0 # DTB misses 2410628Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_accesses 1337980 # ITB accesses 2510636Snilay@cs.wisc.edudrivesys.cpu.itb.fetch_acv 22 # ITB acv 2610628Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_hits 1337786 # ITB hits 2710628Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_misses 194 # ITB misses 2810628Sandreas.hansson@arm.comdrivesys.cpu.itb.read_accesses 0 # DTB read accesses 2910636Snilay@cs.wisc.edudrivesys.cpu.itb.read_acv 0 # DTB read access violations 3010636Snilay@cs.wisc.edudrivesys.cpu.itb.read_hits 0 # DTB read hits 3110628Sandreas.hansson@arm.comdrivesys.cpu.itb.read_misses 0 # DTB read misses 3210628Sandreas.hansson@arm.comdrivesys.cpu.itb.write_accesses 0 # DTB write accesses 3310628Sandreas.hansson@arm.comdrivesys.cpu.itb.write_acv 0 # DTB write access violations 3410636Snilay@cs.wisc.edudrivesys.cpu.itb.write_hits 0 # DTB write hits 3510628Sandreas.hansson@arm.comdrivesys.cpu.itb.write_misses 0 # DTB write misses 3610628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::swpctx 70 1.58% # number of callpals executed 3710628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::tbi 5 0.11% # number of callpals executed 3810636Snilay@cs.wisc.edudrivesys.cpu.kern.callpal::swpipl 3654 82.24% # number of callpals executed 3910636Snilay@cs.wisc.edudrivesys.cpu.kern.callpal::rdps 359 8.08% # number of callpals executed 4010628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::rdusp 1 0.02% # number of callpals executed 4110628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::rti 322 7.25% # number of callpals executed 4210628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::callsys 25 0.56% # number of callpals executed 4310628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::imb 7 0.16% # number of callpals executed 4410628Sandreas.hansson@arm.comdrivesys.cpu.kern.callpal::total 4443 # number of callpals executed 4510636Snilay@cs.wisc.edudrivesys.cpu.kern.inst.arm 0 # number of arm instructions executed 4610628Sandreas.hansson@arm.comdrivesys.cpu.kern.inst.hwrei 5483 # number of hwrei instructions executed 4710628Sandreas.hansson@arm.comdrivesys.cpu.kern.inst.quiesce 215 # number of quiesce instructions executed 4810628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_count::0 1189 28.37% # number of times we switched to this ipl 4910628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_count::21 10 0.24% # number of times we switched to this ipl 5010636Snilay@cs.wisc.edudrivesys.cpu.kern.ipl_count::22 205 4.89% # number of times we switched to this ipl 5110636Snilay@cs.wisc.edudrivesys.cpu.kern.ipl_count::31 2787 66.50% # number of times we switched to this ipl 5210628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_count::total 4191 # number of times we switched to this ipl 5310628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_good::0 1189 45.85% # number of times we switched to this ipl from a different ipl 5410628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_good::21 10 0.39% # number of times we switched to this ipl from a different ipl 5510628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_good::22 205 7.91% # number of times we switched to this ipl from a different ipl 5610628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_good::31 1189 45.85% # number of times we switched to this ipl from a different ipl 5710628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_good::total 2593 # number of times we switched to this ipl from a different ipl 5810628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_ticks::0 199571043172 100.00% # number of cycles we spent at this ipl 5910628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_ticks::21 1620 0.00% # number of cycles we spent at this ipl 6010628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_ticks::22 17630 0.00% # number of cycles we spent at this ipl 6110628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_ticks::31 300462 0.00% # number of cycles we spent at this ipl 6210628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_ticks::total 199571362884 # number of cycles we spent at this ipl 6310628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl 6410628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 6510628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 6610628Sandreas.hansson@arm.comdrivesys.cpu.kern.ipl_used::31 0.426624 # fraction of swpipl calls that actually changed the ipl 6710628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::kernel 110 6810628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::user 107 6910628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::idle 3 7010628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::kernel 174 # number of protection mode switches 7110628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::user 107 # number of protection mode switches 7210628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::idle 218 # number of protection mode switches 7310628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::kernel 0.632184 # fraction of useful protection mode switches 7410628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 7510628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::idle 0.013761 # fraction of useful protection mode switches 7610628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::total 1.645945 # fraction of useful protection mode switches 7710628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::kernel 263256 0.24% # number of ticks spent at the given mode 7810628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::user 1278343 1.15% # number of ticks spent at the given mode 7910628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::idle 109686421 98.61% # number of ticks spent at the given mode 8010628Sandreas.hansson@arm.comdrivesys.cpu.kern.swap_context 70 # number of times the context was actually changed 8110628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::2 1 4.55% # number of syscalls executed 8210628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::6 3 13.64% # number of syscalls executed 8310628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::17 2 9.09% # number of syscalls executed 8410628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::97 1 4.55% # number of syscalls executed 8510628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::99 2 9.09% # number of syscalls executed 8610628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::101 2 9.09% # number of syscalls executed 8710628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::102 3 13.64% # number of syscalls executed 8810628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::104 1 4.55% # number of syscalls executed 8910628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::105 3 13.64% # number of syscalls executed 9010628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::106 1 4.55% # number of syscalls executed 9110628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::118 2 9.09% # number of syscalls executed 9210628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::150 1 4.55% # number of syscalls executed 9310628Sandreas.hansson@arm.comdrivesys.cpu.kern.syscall::total 22 # number of syscalls executed 9410628Sandreas.hansson@arm.comdrivesys.cpu.not_idle_fraction 0.000000 # Percentage of non-idle cycles 9510628Sandreas.hansson@arm.comdrivesys.cpu.numCycles 199571362884 # number of cpu cycles simulated 9610628Sandreas.hansson@arm.comdrivesys.cpu.num_insts 1958129 # Number of instructions executed 9710628Sandreas.hansson@arm.comdrivesys.cpu.num_refs 626223 # Number of memory references 9810515SAli.Saidi@ARM.comdrivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 9910585Sandreas.hansson@arm.comdrivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 10010628Sandreas.hansson@arm.comdrivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 10110515SAli.Saidi@ARM.comdrivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 10210515SAli.Saidi@ARM.comdrivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. 10310515SAli.Saidi@ARM.comdrivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. 10410515SAli.Saidi@ARM.comdrivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 10510515SAli.Saidi@ARM.comdrivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 10610515SAli.Saidi@ARM.comdrivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 10710628Sandreas.hansson@arm.comdrivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 10810515SAli.Saidi@ARM.comdrivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. 10910515SAli.Saidi@ARM.comdrivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. 11010515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post 11110515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post 11210515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post 11310515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post 11410628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post 11510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post 11610628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post 11710628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxIdle 0 # average number of TxIdle's coalesced into each post 11810628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post 11910628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDMAReads 4 # Number of descriptors the device read w/ DMA 12010628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA 12110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDmaReadBytes 96 # number of descriptor bytes read w/ DMA 12210628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA 12310628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped 12410628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedInterrupts 16 # number of posts to CPU 12510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxDesc 6 # number of RxDesc interrupts posted to CPU 12610628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 12710628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 12810628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 12910628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 13010628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 13110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxIdle 4 # number of TxIdle interrupts posted to CPU 13210628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 13310628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.rxBandwidth 38400 # Receive Bandwidth (bits/s) 13410628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.rxBytes 960 # Bytes Received 13510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.rxIpChecksums 8 # Number of rx IP Checksums done by device 13610628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.rxPPS 40 # Packet Reception Rate (packets/s) 13710515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.rxPackets 8 # Number of Packets Received 13810515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.rxTcpChecksums 8 # Number of rx TCP Checksums done by device 13910515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device 14010515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totBandwidth 70320 # Total Bandwidth (bits/s) 14110515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totBytes 1758 # Total Bytes 14210515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totPackets 13 # Total Packets 14310515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalRxDesc 8 # total number of RxDesc written to ISR 14410515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 14510515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 14610515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 14710515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 14810515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 14910515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalTxIdle 4 # total number of TxIdle written to ISR 15010515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 15110515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txBandwidth 31920 # Transmit Bandwidth (bits/s) 15210515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txBytes 798 # Bytes Transmitted 15310515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device 15410515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txPPS 25 # Packet Tranmission Rate (packets/s) 15510515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txPackets 5 # Number of Packets Transmitted 15610515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device 15710515SAli.Saidi@ARM.comdrivesys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device 15810515SAli.Saidi@ARM.comhost_inst_rate 246734646 # Simulator instruction rate (inst/s) 15910515SAli.Saidi@ARM.comhost_mem_usage 482136 # Number of bytes of host memory used 16010515SAli.Saidi@ARM.comhost_seconds 1.11 # Real time elapsed on the host 16110515SAli.Saidi@ARM.comhost_tick_rate 180478925530 # Simulator tick rate (ticks/s) 16210628Sandreas.hansson@arm.comsim_freq 1000000000000 # Frequency of simulated ticks 16310628Sandreas.hansson@arm.comsim_insts 273374833 # Number of instructions simulated 16410628Sandreas.hansson@arm.comsim_seconds 0.200001 # Number of seconds simulated 16510628Sandreas.hansson@arm.comsim_ticks 200000789468 # Number of ticks simulated 16610628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_accesses 335402 # DTB accesses 16710628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_acv 161 # DTB access violations 16810628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_hits 1163288 # DTB hits 16910628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_misses 3815 # DTB misses 17010628Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_accesses 0 # ITB accesses 17110628Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_acv 0 # ITB acv 17210628Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_hits 0 # ITB hits 17310628Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_misses 0 # ITB misses 17410628Sandreas.hansson@arm.comtestsys.cpu.dtb.read_accesses 225414 # DTB read accesses 17510628Sandreas.hansson@arm.comtestsys.cpu.dtb.read_acv 80 # DTB read access violations 17610628Sandreas.hansson@arm.comtestsys.cpu.dtb.read_hits 658435 # DTB read hits 17710628Sandreas.hansson@arm.comtestsys.cpu.dtb.read_misses 3287 # DTB read misses 17810628Sandreas.hansson@arm.comtestsys.cpu.dtb.write_accesses 109988 # DTB write accesses 17910628Sandreas.hansson@arm.comtestsys.cpu.dtb.write_acv 81 # DTB write access violations 18010628Sandreas.hansson@arm.comtestsys.cpu.dtb.write_hits 504853 # DTB write hits 18110628Sandreas.hansson@arm.comtestsys.cpu.dtb.write_misses 528 # DTB write misses 18210628Sandreas.hansson@arm.comtestsys.cpu.idle_fraction 0.999999 # Percentage of idle cycles 18310628Sandreas.hansson@arm.comtestsys.cpu.itb.data_accesses 0 # DTB accesses 18410628Sandreas.hansson@arm.comtestsys.cpu.itb.data_acv 0 # DTB access violations 18510628Sandreas.hansson@arm.comtestsys.cpu.itb.data_hits 0 # DTB hits 18610628Sandreas.hansson@arm.comtestsys.cpu.itb.data_misses 0 # DTB misses 18710628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_accesses 1249822 # ITB accesses 18810628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_acv 69 # ITB acv 18910628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_hits 1248325 # ITB hits 19010628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_misses 1497 # ITB misses 19110628Sandreas.hansson@arm.comtestsys.cpu.itb.read_accesses 0 # DTB read accesses 19210628Sandreas.hansson@arm.comtestsys.cpu.itb.read_acv 0 # DTB read access violations 19310628Sandreas.hansson@arm.comtestsys.cpu.itb.read_hits 0 # DTB read hits 19410628Sandreas.hansson@arm.comtestsys.cpu.itb.read_misses 0 # DTB read misses 19510628Sandreas.hansson@arm.comtestsys.cpu.itb.write_accesses 0 # DTB write accesses 19610628Sandreas.hansson@arm.comtestsys.cpu.itb.write_acv 0 # DTB write access violations 19710628Sandreas.hansson@arm.comtestsys.cpu.itb.write_hits 0 # DTB write hits 19810628Sandreas.hansson@arm.comtestsys.cpu.itb.write_misses 0 # DTB write misses 19910628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::swpctx 438 3.34% # number of callpals executed 20010628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::tbi 20 0.15% # number of callpals executed 20110628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::swpipl 11074 84.39% # number of callpals executed 20210628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::rdps 359 2.74% # number of callpals executed 20310628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::wrusp 3 0.02% # number of callpals executed 20410628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::rdusp 3 0.02% # number of callpals executed 20510628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::rti 1041 7.93% # number of callpals executed 20610628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::callsys 140 1.07% # number of callpals executed 20710628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::imb 44 0.34% # number of callpals executed 20810628Sandreas.hansson@arm.comtestsys.cpu.kern.callpal::total 13122 # number of callpals executed 20910628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.arm 0 # number of arm instructions executed 21010628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.hwrei 19053 # number of hwrei instructions executed 21110628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.quiesce 376 # number of quiesce instructions executed 21210628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_count::0 5061 40.48% # number of times we switched to this ipl 21310628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_count::21 184 1.47% # number of times we switched to this ipl 21410628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_count::22 205 1.64% # number of times we switched to this ipl 21510628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_count::31 7054 56.41% # number of times we switched to this ipl 21610628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_count::total 12504 # number of times we switched to this ipl 21710628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_good::0 5055 48.15% # number of times we switched to this ipl from a different ipl 21810628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_good::21 184 1.75% # number of times we switched to this ipl from a different ipl 21910628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_good::22 205 1.95% # number of times we switched to this ipl from a different ipl 22010628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_good::31 5055 48.15% # number of times we switched to this ipl from a different ipl 22110628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_good::total 10499 # number of times we switched to this ipl from a different ipl 22210628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_ticks::0 199568845670 100.00% # number of cycles we spent at this ipl 22310628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_ticks::21 31026 0.00% # number of cycles we spent at this ipl 22410628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_ticks::22 17630 0.00% # number of cycles we spent at this ipl 22510628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_ticks::31 566504 0.00% # number of cycles we spent at this ipl 22610628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_ticks::total 199569460830 # number of cycles we spent at this ipl 22710628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_used::0 0.998814 # fraction of swpipl calls that actually changed the ipl 22810628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 22910628Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 23010585Sandreas.hansson@arm.comtestsys.cpu.kern.ipl_used::31 0.716615 # fraction of swpipl calls that actually changed the ipl 23110585Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::kernel 654 23210628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::user 649 23310628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::idle 5 23410628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::kernel 1099 # number of protection mode switches 23510628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::user 649 # number of protection mode switches 23610628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::idle 381 # number of protection mode switches 23710628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::kernel 0.595086 # fraction of useful protection mode switches 23810628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 23910628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::idle 0.013123 # fraction of useful protection mode switches 24010628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::total 1.608210 # fraction of useful protection mode switches 24110628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::kernel 1821131 2.10% # number of ticks spent at the given mode 24210628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::user 1065606 1.23% # number of ticks spent at the given mode 24310628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::idle 83963628 96.68% # number of ticks spent at the given mode 24410628Sandreas.hansson@arm.comtestsys.cpu.kern.swap_context 438 # number of times the context was actually changed 24510628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::2 3 3.61% # number of syscalls executed 24610628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::3 7 8.43% # number of syscalls executed 24710628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::4 1 1.20% # number of syscalls executed 24810628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::6 7 8.43% # number of syscalls executed 24910628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::17 7 8.43% # number of syscalls executed 25010628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::19 2 2.41% # number of syscalls executed 25110628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::20 1 1.20% # number of syscalls executed 25210628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::33 3 3.61% # number of syscalls executed 25310628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::45 10 12.05% # number of syscalls executed 25410628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::48 5 6.02% # number of syscalls executed 25510628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::54 1 1.20% # number of syscalls executed 25610628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::59 3 3.61% # number of syscalls executed 25710628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::71 15 18.07% # number of syscalls executed 25810628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::74 4 4.82% # number of syscalls executed 25910628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::97 2 2.41% # number of syscalls executed 26010628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::98 2 2.41% # number of syscalls executed 26110628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::101 2 2.41% # number of syscalls executed 26210628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::102 2 2.41% # number of syscalls executed 26310628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::104 1 1.20% # number of syscalls executed 26410628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::105 3 3.61% # number of syscalls executed 26510628Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::118 2 2.41% # number of syscalls executed 26610585Sandreas.hansson@arm.comtestsys.cpu.kern.syscall::total 83 # number of syscalls executed 26710628Sandreas.hansson@arm.comtestsys.cpu.not_idle_fraction 0.000001 # Percentage of non-idle cycles 26810628Sandreas.hansson@arm.comtestsys.cpu.numCycles 199569460393 # number of cpu cycles simulated 26910628Sandreas.hansson@arm.comtestsys.cpu.num_insts 3560411 # Number of instructions executed 27010628Sandreas.hansson@arm.comtestsys.cpu.num_refs 1173571 # Number of memory references 27110628Sandreas.hansson@arm.comtestsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 27210515SAli.Saidi@ARM.comtestsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 27310628Sandreas.hansson@arm.comtestsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 27410585Sandreas.hansson@arm.comtestsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 27510628Sandreas.hansson@arm.comtestsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. 27610585Sandreas.hansson@arm.comtestsys.disk0.dma_write_txs 0 # Number of DMA write transactions. 27710585Sandreas.hansson@arm.comtestsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 27810515SAli.Saidi@ARM.comtestsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 27910585Sandreas.hansson@arm.comtestsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 28010515SAli.Saidi@ARM.comtestsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 28110515SAli.Saidi@ARM.comtestsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. 28210515SAli.Saidi@ARM.comtestsys.disk2.dma_write_txs 0 # Number of DMA write transactions. 28310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post 28410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post 28510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post 28610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post 28710628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post 28810628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post 28910628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post 29010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxIdle 0 # average number of TxIdle's coalesced into each post 29110628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post 29210628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDMAReads 6 # Number of descriptors the device read w/ DMA 29310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA 29410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDmaReadBytes 144 # number of descriptor bytes read w/ DMA 29510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA 29610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped 29710628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedInterrupts 15 # number of posts to CPU 29810628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxDesc 4 # number of RxDesc interrupts posted to CPU 29910628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 30010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 30110628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 30210628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 30310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 30410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxIdle 6 # number of TxIdle interrupts posted to CPU 30510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 30610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxBandwidth 31920 # Receive Bandwidth (bits/s) 30710628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxBytes 798 # Bytes Received 30810628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxIpChecksums 5 # Number of rx IP Checksums done by device 30910628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxPPS 25 # Packet Reception Rate (packets/s) 31010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxPackets 5 # Number of Packets Received 31110628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxTcpChecksums 5 # Number of rx TCP Checksums done by device 31210628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device 31310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totBandwidth 70320 # Total Bandwidth (bits/s) 31410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totBytes 1758 # Total Bytes 31510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totPackets 13 # Total Packets 31610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxDesc 5 # total number of RxDesc written to ISR 31710628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 31810636Snilay@cs.wisc.edutestsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 31910636Snilay@cs.wisc.edutestsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 32010515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 32110515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 32210515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.totalTxIdle 6 # total number of TxIdle written to ISR 32310636Snilay@cs.wisc.edutestsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 32410636Snilay@cs.wisc.edutestsys.tsunami.ethernet.txBandwidth 38400 # Transmit Bandwidth (bits/s) 32510515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.txBytes 960 # Bytes Transmitted 32610515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device 32710636Snilay@cs.wisc.edutestsys.tsunami.ethernet.txPPS 40 # Packet Tranmission Rate (packets/s) 32810515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.txPackets 8 # Number of Packets Transmitted 32910515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device 33010515SAli.Saidi@ARM.comtestsys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device 33110515SAli.Saidi@ARM.com 33210636Snilay@cs.wisc.edu---------- End Simulation Statistics ---------- 33310515SAli.Saidi@ARM.com 33410585Sandreas.hansson@arm.com---------- Begin Simulation Statistics ---------- 33510585Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_accesses 0 # DTB accesses 33610585Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_acv 0 # DTB access violations 33710585Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_hits 0 # DTB hits 33810585Sandreas.hansson@arm.comdrivesys.cpu.dtb.data_misses 0 # DTB misses 33910585Sandreas.hansson@arm.comdrivesys.cpu.dtb.fetch_accesses 0 # ITB accesses 34010628Sandreas.hansson@arm.comdrivesys.cpu.dtb.fetch_acv 0 # ITB acv 34110628Sandreas.hansson@arm.comdrivesys.cpu.dtb.fetch_hits 0 # ITB hits 34210628Sandreas.hansson@arm.comdrivesys.cpu.dtb.fetch_misses 0 # ITB misses 34310628Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_accesses 0 # DTB read accesses 34410628Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_acv 0 # DTB read access violations 34510585Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_hits 0 # DTB read hits 34610628Sandreas.hansson@arm.comdrivesys.cpu.dtb.read_misses 0 # DTB read misses 34710628Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_accesses 0 # DTB write accesses 34810628Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_acv 0 # DTB write access violations 34910585Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_hits 0 # DTB write hits 35010628Sandreas.hansson@arm.comdrivesys.cpu.dtb.write_misses 0 # DTB write misses 35110628Sandreas.hansson@arm.comdrivesys.cpu.idle_fraction 1 # Percentage of idle cycles 35210628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_accesses 0 # DTB accesses 35310628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_acv 0 # DTB access violations 35410628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_hits 0 # DTB hits 35510628Sandreas.hansson@arm.comdrivesys.cpu.itb.data_misses 0 # DTB misses 35610628Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_accesses 0 # ITB accesses 35710628Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_acv 0 # ITB acv 35810585Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_hits 0 # ITB hits 35910585Sandreas.hansson@arm.comdrivesys.cpu.itb.fetch_misses 0 # ITB misses 36010585Sandreas.hansson@arm.comdrivesys.cpu.itb.read_accesses 0 # DTB read accesses 36110585Sandreas.hansson@arm.comdrivesys.cpu.itb.read_acv 0 # DTB read access violations 36210585Sandreas.hansson@arm.comdrivesys.cpu.itb.read_hits 0 # DTB read hits 36310585Sandreas.hansson@arm.comdrivesys.cpu.itb.read_misses 0 # DTB read misses 36410585Sandreas.hansson@arm.comdrivesys.cpu.itb.write_accesses 0 # DTB write accesses 36510585Sandreas.hansson@arm.comdrivesys.cpu.itb.write_acv 0 # DTB write access violations 36610585Sandreas.hansson@arm.comdrivesys.cpu.itb.write_hits 0 # DTB write hits 36710585Sandreas.hansson@arm.comdrivesys.cpu.itb.write_misses 0 # DTB write misses 36810585Sandreas.hansson@arm.comdrivesys.cpu.kern.inst.arm 0 # number of arm instructions executed 36910585Sandreas.hansson@arm.comdrivesys.cpu.kern.inst.hwrei 0 # number of hwrei instructions executed 37010585Sandreas.hansson@arm.comdrivesys.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 37110585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::kernel 0 37210585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::user 0 37310585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_good::idle 0 37410585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches 37510585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::user 0 # number of protection mode switches 37610585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch::idle 0 # number of protection mode switches 37710585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::kernel no_value # fraction of useful protection mode switches 37810585Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::user no_value # fraction of useful protection mode switches 37910628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches 38010628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_switch_good::total no_value # fraction of useful protection mode switches 38110628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode 38210628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode 38310628Sandreas.hansson@arm.comdrivesys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode 38410628Sandreas.hansson@arm.comdrivesys.cpu.kern.swap_context 0 # number of times the context was actually changed 38510628Sandreas.hansson@arm.comdrivesys.cpu.not_idle_fraction 0 # Percentage of non-idle cycles 38610628Sandreas.hansson@arm.comdrivesys.cpu.numCycles 0 # number of cpu cycles simulated 38710628Sandreas.hansson@arm.comdrivesys.cpu.num_insts 0 # Number of instructions executed 38810628Sandreas.hansson@arm.comdrivesys.cpu.num_refs 0 # Number of memory references 38910628Sandreas.hansson@arm.comdrivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 39010628Sandreas.hansson@arm.comdrivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 39110628Sandreas.hansson@arm.comdrivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 39210628Sandreas.hansson@arm.comdrivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 39310628Sandreas.hansson@arm.comdrivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. 39410628Sandreas.hansson@arm.comdrivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. 39510628Sandreas.hansson@arm.comdrivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 39610628Sandreas.hansson@arm.comdrivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 39710628Sandreas.hansson@arm.comdrivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 39810628Sandreas.hansson@arm.comdrivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 39910628Sandreas.hansson@arm.comdrivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. 40010628Sandreas.hansson@arm.comdrivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. 40110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post 40210628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post 40310628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post 40410628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post 40510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post 40610628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post 40710628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post 40810628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post 40910628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post 41010628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 41110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 41210628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 41310585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 41410585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped 41510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 41610628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 41710628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 41810628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 41910585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 42010585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 42110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 42210585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 42310628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 42410628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 42510628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 42610585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 42710628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 42810628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 42910628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 43010585Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 43110628Sandreas.hansson@arm.comdrivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 43210628Sandreas.hansson@arm.comhost_inst_rate 133810490945 # Simulator instruction rate (inst/s) 43310628Sandreas.hansson@arm.comhost_mem_usage 482136 # Number of bytes of host memory used 43410628Sandreas.hansson@arm.comhost_seconds 0.00 # Real time elapsed on the host 43510628Sandreas.hansson@arm.comhost_tick_rate 365741275 # Simulator tick rate (ticks/s) 43610628Sandreas.hansson@arm.comsim_freq 1000000000000 # Frequency of simulated ticks 43710628Sandreas.hansson@arm.comsim_insts 273374833 # Number of instructions simulated 43810628Sandreas.hansson@arm.comsim_seconds 0.000001 # Number of seconds simulated 43910628Sandreas.hansson@arm.comsim_ticks 785978 # Number of ticks simulated 44010628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_accesses 0 # DTB accesses 44110628Sandreas.hansson@arm.comtestsys.cpu.dtb.data_acv 0 # DTB access violations 44210585Sandreas.hansson@arm.comtestsys.cpu.dtb.data_hits 0 # DTB hits 44310585Sandreas.hansson@arm.comtestsys.cpu.dtb.data_misses 0 # DTB misses 44410585Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_accesses 0 # ITB accesses 44510585Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_acv 0 # ITB acv 44610585Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_hits 0 # ITB hits 44710585Sandreas.hansson@arm.comtestsys.cpu.dtb.fetch_misses 0 # ITB misses 44810585Sandreas.hansson@arm.comtestsys.cpu.dtb.read_accesses 0 # DTB read accesses 44910585Sandreas.hansson@arm.comtestsys.cpu.dtb.read_acv 0 # DTB read access violations 45010585Sandreas.hansson@arm.comtestsys.cpu.dtb.read_hits 0 # DTB read hits 45110585Sandreas.hansson@arm.comtestsys.cpu.dtb.read_misses 0 # DTB read misses 45210585Sandreas.hansson@arm.comtestsys.cpu.dtb.write_accesses 0 # DTB write accesses 45310585Sandreas.hansson@arm.comtestsys.cpu.dtb.write_acv 0 # DTB write access violations 45410585Sandreas.hansson@arm.comtestsys.cpu.dtb.write_hits 0 # DTB write hits 45510585Sandreas.hansson@arm.comtestsys.cpu.dtb.write_misses 0 # DTB write misses 45610585Sandreas.hansson@arm.comtestsys.cpu.idle_fraction 1 # Percentage of idle cycles 45710585Sandreas.hansson@arm.comtestsys.cpu.itb.data_accesses 0 # DTB accesses 45810585Sandreas.hansson@arm.comtestsys.cpu.itb.data_acv 0 # DTB access violations 45910585Sandreas.hansson@arm.comtestsys.cpu.itb.data_hits 0 # DTB hits 46010585Sandreas.hansson@arm.comtestsys.cpu.itb.data_misses 0 # DTB misses 46110585Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_accesses 0 # ITB accesses 46210585Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_acv 0 # ITB acv 46310628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_hits 0 # ITB hits 46410628Sandreas.hansson@arm.comtestsys.cpu.itb.fetch_misses 0 # ITB misses 46510628Sandreas.hansson@arm.comtestsys.cpu.itb.read_accesses 0 # DTB read accesses 46610628Sandreas.hansson@arm.comtestsys.cpu.itb.read_acv 0 # DTB read access violations 46710628Sandreas.hansson@arm.comtestsys.cpu.itb.read_hits 0 # DTB read hits 46810628Sandreas.hansson@arm.comtestsys.cpu.itb.read_misses 0 # DTB read misses 46910628Sandreas.hansson@arm.comtestsys.cpu.itb.write_accesses 0 # DTB write accesses 47010628Sandreas.hansson@arm.comtestsys.cpu.itb.write_acv 0 # DTB write access violations 47110628Sandreas.hansson@arm.comtestsys.cpu.itb.write_hits 0 # DTB write hits 47210628Sandreas.hansson@arm.comtestsys.cpu.itb.write_misses 0 # DTB write misses 47310628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.arm 0 # number of arm instructions executed 47410628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.hwrei 0 # number of hwrei instructions executed 47510628Sandreas.hansson@arm.comtestsys.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 47610628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::kernel 0 47710628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::user 0 47810628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_good::idle 0 47910628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches 48010628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::user 0 # number of protection mode switches 48110628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch::idle 0 # number of protection mode switches 48210628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::kernel no_value # fraction of useful protection mode switches 48310628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::user no_value # fraction of useful protection mode switches 48410628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches 48510628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_switch_good::total no_value # fraction of useful protection mode switches 48610628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode 48710628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode 48810628Sandreas.hansson@arm.comtestsys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode 48910628Sandreas.hansson@arm.comtestsys.cpu.kern.swap_context 0 # number of times the context was actually changed 49010628Sandreas.hansson@arm.comtestsys.cpu.not_idle_fraction 0 # Percentage of non-idle cycles 49110628Sandreas.hansson@arm.comtestsys.cpu.numCycles 0 # number of cpu cycles simulated 49210628Sandreas.hansson@arm.comtestsys.cpu.num_insts 0 # Number of instructions executed 49310628Sandreas.hansson@arm.comtestsys.cpu.num_refs 0 # Number of memory references 49410628Sandreas.hansson@arm.comtestsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 49510628Sandreas.hansson@arm.comtestsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 49610628Sandreas.hansson@arm.comtestsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 49710628Sandreas.hansson@arm.comtestsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 49810585Sandreas.hansson@arm.comtestsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. 49910585Sandreas.hansson@arm.comtestsys.disk0.dma_write_txs 0 # Number of DMA write transactions. 50010585Sandreas.hansson@arm.comtestsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 50110585Sandreas.hansson@arm.comtestsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 50210585Sandreas.hansson@arm.comtestsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 50310585Sandreas.hansson@arm.comtestsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 50410628Sandreas.hansson@arm.comtestsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. 50510585Sandreas.hansson@arm.comtestsys.disk2.dma_write_txs 0 # Number of DMA write transactions. 50610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post 50710585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post 50810585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post 50910585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post 51010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post 51110585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post 51210585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post 51310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post 51410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post 51510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 51610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 51710628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 51810585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 51910585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped 52010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 52110628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 52210628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 52310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 52410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 52510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 52610628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 52710585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 52810628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 52910628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 53010628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 53110628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 53210628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 53310628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 53410628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 53510628Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 53610585Sandreas.hansson@arm.comtestsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 53710636Snilay@cs.wisc.edu 53810636Snilay@cs.wisc.edu---------- End Simulation Statistics ---------- 53910585Sandreas.hansson@arm.com