simerr revision 7934
12083SN/Awarn: Sockets disabled, not accepting terminal connections 22083SN/AFor more information see: http://www.m5sim.org/warn/8742226b 32083SN/Awarn: Sockets disabled, not accepting gdb connections 42083SN/AFor more information see: http://www.m5sim.org/warn/d946bea6 52083SN/Awarn: The clidr register always reports 0 caches. 62083SN/AFor more information see: http://www.m5sim.org/warn/23a3c326 72083SN/Awarn: The csselr register isn't implemented. 82083SN/AFor more information see: http://www.m5sim.org/warn/c0c486b8 92083SN/Awarn: Need to flush all TLBs in MP 102083SN/AFor more information see: http://www.m5sim.org/warn/6cccf999 112083SN/Awarn: instruction 'mcr bpiall' unimplemented 122083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 132083SN/Awarn: The ccsidr register isn't implemented and always reads as 0. 142083SN/AFor more information see: http://www.m5sim.org/warn/2c4acb9c 152083SN/Awarn: instruction 'mcr dccimvac' unimplemented 162083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 172083SN/Awarn: Need to flush all TLBs in MP 182083SN/AFor more information see: http://www.m5sim.org/warn/6cccf999 192083SN/Awarn: instruction 'mcr bpiall' unimplemented 202083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 212083SN/Awarn: instruction 'mcr dccmvau' unimplemented 222083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 232083SN/Awarn: instruction 'mcr icimvau' unimplemented 242083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 252083SN/Awarn: instruction 'mcr bpiall' unimplemented 262083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 272083SN/Awarn: instruction 'mcr bpiall' unimplemented 282083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 292649Ssaidi@eecs.umich.eduwarn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors 302649Ssaidi@eecs.umich.eduFor more information see: http://www.m5sim.org/warn/7998f2ea 312649Ssaidi@eecs.umich.eduwarn: instruction 'mcr bpiall' unimplemented 322649Ssaidi@eecs.umich.eduFor more information see: http://www.m5sim.org/warn/21b09adb 332649Ssaidi@eecs.umich.eduwarn: Complete acc isn't called on normal stores in O3. 342083SN/AFor more information see: http://www.m5sim.org/warn/138d8573 352083SN/Awarn: instruction 'mcr bpiall' unimplemented 362083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 372083SN/Awarn: Complete acc isn't called on normal stores in O3. 382083SN/AFor more information see: http://www.m5sim.org/warn/138d8573 392083SN/Awarn: Complete acc isn't called on normal stores in O3. 402083SN/AFor more information see: http://www.m5sim.org/warn/138d8573 412083SN/Awarn: Need to flush all TLBs in MP 422125SN/AFor more information see: http://www.m5sim.org/warn/6cccf999 432083SN/Awarn: instruction 'mcr bpiall' unimplemented 442083SN/AFor more information see: http://www.m5sim.org/warn/21b09adb 452083SN/Ahack: be nice to actually delete the event here 462083SN/A