simerr revision 7934
110260SAndrew.Bardsley@arm.comwarn: Sockets disabled, not accepting terminal connections 210260SAndrew.Bardsley@arm.comFor more information see: http://www.m5sim.org/warn/8742226b 3warn: Sockets disabled, not accepting gdb connections 4For more information see: http://www.m5sim.org/warn/d946bea6 5warn: The clidr register always reports 0 caches. 6For more information see: http://www.m5sim.org/warn/23a3c326 7warn: The csselr register isn't implemented. 8For more information see: http://www.m5sim.org/warn/c0c486b8 9warn: Need to flush all TLBs in MP 10For more information see: http://www.m5sim.org/warn/6cccf999 11warn: instruction 'mcr bpiall' unimplemented 12For more information see: http://www.m5sim.org/warn/21b09adb 13warn: The ccsidr register isn't implemented and always reads as 0. 14For more information see: http://www.m5sim.org/warn/2c4acb9c 15warn: instruction 'mcr dccimvac' unimplemented 16For more information see: http://www.m5sim.org/warn/21b09adb 17warn: Need to flush all TLBs in MP 18For more information see: http://www.m5sim.org/warn/6cccf999 19warn: instruction 'mcr bpiall' unimplemented 20For more information see: http://www.m5sim.org/warn/21b09adb 21warn: instruction 'mcr dccmvau' unimplemented 22For more information see: http://www.m5sim.org/warn/21b09adb 23warn: instruction 'mcr icimvau' unimplemented 24For more information see: http://www.m5sim.org/warn/21b09adb 25warn: instruction 'mcr bpiall' unimplemented 26For more information see: http://www.m5sim.org/warn/21b09adb 27warn: instruction 'mcr bpiall' unimplemented 28For more information see: http://www.m5sim.org/warn/21b09adb 29warn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors 30For more information see: http://www.m5sim.org/warn/7998f2ea 31warn: instruction 'mcr bpiall' unimplemented 32For more information see: http://www.m5sim.org/warn/21b09adb 33warn: instruction 'mcr bpiall' unimplemented 34For more information see: http://www.m5sim.org/warn/21b09adb 35warn: Need to flush all TLBs in MP 36For more information see: http://www.m5sim.org/warn/6cccf999 37warn: instruction 'mcr bpiall' unimplemented 38For more information see: http://www.m5sim.org/warn/21b09adb 39hack: be nice to actually delete the event here 40