stats.txt revision 8911
18844SAli.Saidi@ARM.com 28844SAli.Saidi@ARM.com---------- Begin Simulation Statistics ---------- 38844SAli.Saidi@ARM.comsim_seconds 2.411694 # Number of seconds simulated 48844SAli.Saidi@ARM.comsim_ticks 2411694099500 # Number of ticks simulated 58844SAli.Saidi@ARM.comfinal_tick 2411694099500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 68844SAli.Saidi@ARM.comsim_freq 1000000000000 # Frequency of simulated ticks 78911SAli.Saidi@ARM.comhost_inst_rate 2019241 # Simulator instruction rate (inst/s) 88911SAli.Saidi@ARM.comhost_op_rate 2610327 # Simulator op (including micro ops) rate (op/s) 98911SAli.Saidi@ARM.comhost_tick_rate 79123006525 # Simulator tick rate (ticks/s) 108911SAli.Saidi@ARM.comhost_mem_usage 377328 # Number of bytes of host memory used 118911SAli.Saidi@ARM.comhost_seconds 30.48 # Real time elapsed on the host 128911SAli.Saidi@ARM.comsim_insts 61547057 # Number of instructions simulated 138911SAli.Saidi@ARM.comsim_ops 79563547 # Number of ops (including micro ops) simulated 148875Sandreas.hansson@arm.comsystem.realview.nvmem.bytes_read 68 # Number of bytes read from this memory 158875Sandreas.hansson@arm.comsystem.realview.nvmem.bytes_inst_read 68 # Number of instructions bytes read from this memory 168875Sandreas.hansson@arm.comsystem.realview.nvmem.bytes_written 0 # Number of bytes written to this memory 178875Sandreas.hansson@arm.comsystem.realview.nvmem.num_reads 17 # Number of read requests responded to by this memory 188875Sandreas.hansson@arm.comsystem.realview.nvmem.num_writes 0 # Number of write requests responded to by this memory 198875Sandreas.hansson@arm.comsystem.realview.nvmem.num_other 0 # Number of other requests responded to by this memory 208875Sandreas.hansson@arm.comsystem.realview.nvmem.bw_read 28 # Total read bandwidth from this memory (bytes/s) 218875Sandreas.hansson@arm.comsystem.realview.nvmem.bw_inst_read 28 # Instruction read bandwidth from this memory (bytes/s) 228875Sandreas.hansson@arm.comsystem.realview.nvmem.bw_total 28 # Total bandwidth to/from this memory (bytes/s) 238844SAli.Saidi@ARM.comsystem.physmem.bytes_read 123270308 # Number of bytes read from this memory 248844SAli.Saidi@ARM.comsystem.physmem.bytes_inst_read 1011392 # Number of instructions bytes read from this memory 258844SAli.Saidi@ARM.comsystem.physmem.bytes_written 10185232 # Number of bytes written to this memory 268844SAli.Saidi@ARM.comsystem.physmem.num_reads 14146769 # Number of read requests responded to by this memory 278844SAli.Saidi@ARM.comsystem.physmem.num_writes 869038 # Number of write requests responded to by this memory 288844SAli.Saidi@ARM.comsystem.physmem.num_other 0 # Number of other requests responded to by this memory 298844SAli.Saidi@ARM.comsystem.physmem.bw_read 51113575 # Total read bandwidth from this memory (bytes/s) 308844SAli.Saidi@ARM.comsystem.physmem.bw_inst_read 419370 # Instruction read bandwidth from this memory (bytes/s) 318844SAli.Saidi@ARM.comsystem.physmem.bw_write 4223269 # Write bandwidth from this memory (bytes/s) 328844SAli.Saidi@ARM.comsystem.physmem.bw_total 55336844 # Total bandwidth to/from this memory (bytes/s) 338844SAli.Saidi@ARM.comsystem.l2c.replacements 127720 # number of replacements 348911SAli.Saidi@ARM.comsystem.l2c.tagsinuse 25547.920882 # Cycle average of tags in use 358911SAli.Saidi@ARM.comsystem.l2c.total_refs 1498993 # Total number of references to valid blocks. 368844SAli.Saidi@ARM.comsystem.l2c.sampled_refs 156132 # Sample count of references to valid blocks. 378911SAli.Saidi@ARM.comsystem.l2c.avg_refs 9.600806 # Average number of references to valid blocks. 388844SAli.Saidi@ARM.comsystem.l2c.warmup_cycle 0 # Cycle when the warmup percentage was hit. 398911SAli.Saidi@ARM.comsystem.l2c.occ_blocks::writebacks 14919.913613 # Average occupied blocks per requestor 408844SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu0.dtb.walker 1.146267 # Average occupied blocks per requestor 418844SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu0.itb.walker 0.046172 # Average occupied blocks per requestor 428911SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu0.inst 3116.154275 # Average occupied blocks per requestor 438911SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu0.data 1287.935036 # Average occupied blocks per requestor 448844SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu1.dtb.walker 4.789000 # Average occupied blocks per requestor 458844SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu1.itb.walker 0.017808 # Average occupied blocks per requestor 468911SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu1.inst 2080.961372 # Average occupied blocks per requestor 478911SAli.Saidi@ARM.comsystem.l2c.occ_blocks::cpu1.data 4136.957340 # Average occupied blocks per requestor 488844SAli.Saidi@ARM.comsystem.l2c.occ_percent::writebacks 0.227660 # Average percentage of cache occupancy 498844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu0.dtb.walker 0.000017 # Average percentage of cache occupancy 508844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu0.itb.walker 0.000001 # Average percentage of cache occupancy 518844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu0.inst 0.047549 # Average percentage of cache occupancy 528844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu0.data 0.019652 # Average percentage of cache occupancy 538844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu1.dtb.walker 0.000073 # Average percentage of cache occupancy 548844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu1.itb.walker 0.000000 # Average percentage of cache occupancy 558844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu1.inst 0.031753 # Average percentage of cache occupancy 568844SAli.Saidi@ARM.comsystem.l2c.occ_percent::cpu1.data 0.063125 # Average percentage of cache occupancy 578844SAli.Saidi@ARM.comsystem.l2c.occ_percent::total 0.389830 # Average percentage of cache occupancy 588844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu0.dtb.walker 5051 # number of ReadReq hits 598844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu0.itb.walker 2156 # number of ReadReq hits 608844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu0.inst 493019 # number of ReadReq hits 618844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu0.data 213171 # number of ReadReq hits 628844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu1.dtb.walker 4123 # number of ReadReq hits 638844SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu1.itb.walker 1590 # number of ReadReq hits 648911SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu1.inst 368111 # number of ReadReq hits 658911SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::cpu1.data 131707 # number of ReadReq hits 668911SAli.Saidi@ARM.comsystem.l2c.ReadReq_hits::total 1218928 # number of ReadReq hits 678911SAli.Saidi@ARM.comsystem.l2c.Writeback_hits::writebacks 580462 # number of Writeback hits 688911SAli.Saidi@ARM.comsystem.l2c.Writeback_hits::total 580462 # number of Writeback hits 698844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_hits::cpu0.data 776 # number of UpgradeReq hits 708844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_hits::cpu1.data 523 # number of UpgradeReq hits 718844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_hits::total 1299 # number of UpgradeReq hits 728844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_hits::cpu0.data 147 # number of SCUpgradeReq hits 738844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_hits::cpu1.data 202 # number of SCUpgradeReq hits 748844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_hits::total 349 # number of SCUpgradeReq hits 758844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_hits::cpu0.data 64831 # number of ReadExReq hits 768844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_hits::cpu1.data 37797 # number of ReadExReq hits 778844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_hits::total 102628 # number of ReadExReq hits 788844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu0.dtb.walker 5051 # number of demand (read+write) hits 798844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu0.itb.walker 2156 # number of demand (read+write) hits 808844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu0.inst 493019 # number of demand (read+write) hits 818844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu0.data 278002 # number of demand (read+write) hits 828844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu1.dtb.walker 4123 # number of demand (read+write) hits 838844SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu1.itb.walker 1590 # number of demand (read+write) hits 848911SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu1.inst 368111 # number of demand (read+write) hits 858911SAli.Saidi@ARM.comsystem.l2c.demand_hits::cpu1.data 169504 # number of demand (read+write) hits 868911SAli.Saidi@ARM.comsystem.l2c.demand_hits::total 1321556 # number of demand (read+write) hits 878844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu0.dtb.walker 5051 # number of overall hits 888844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu0.itb.walker 2156 # number of overall hits 898844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu0.inst 493019 # number of overall hits 908844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu0.data 278002 # number of overall hits 918844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu1.dtb.walker 4123 # number of overall hits 928844SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu1.itb.walker 1590 # number of overall hits 938911SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu1.inst 368111 # number of overall hits 948911SAli.Saidi@ARM.comsystem.l2c.overall_hits::cpu1.data 169504 # number of overall hits 958911SAli.Saidi@ARM.comsystem.l2c.overall_hits::total 1321556 # number of overall hits 968844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu0.dtb.walker 11 # number of ReadReq misses 978844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu0.itb.walker 7 # number of ReadReq misses 988844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu0.inst 10289 # number of ReadReq misses 998844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu0.data 9386 # number of ReadReq misses 1008844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu1.dtb.walker 21 # number of ReadReq misses 1018844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu1.itb.walker 13 # number of ReadReq misses 1028844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu1.inst 5094 # number of ReadReq misses 1038844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::cpu1.data 10130 # number of ReadReq misses 1048844SAli.Saidi@ARM.comsystem.l2c.ReadReq_misses::total 34951 # number of ReadReq misses 1058844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_misses::cpu0.data 6349 # number of UpgradeReq misses 1068844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_misses::cpu1.data 3492 # number of UpgradeReq misses 1078844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_misses::total 9841 # number of UpgradeReq misses 1088844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_misses::cpu0.data 791 # number of SCUpgradeReq misses 1098844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_misses::cpu1.data 531 # number of SCUpgradeReq misses 1108844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_misses::total 1322 # number of SCUpgradeReq misses 1118844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_misses::cpu0.data 99048 # number of ReadExReq misses 1128844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_misses::cpu1.data 48785 # number of ReadExReq misses 1138844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_misses::total 147833 # number of ReadExReq misses 1148844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu0.dtb.walker 11 # number of demand (read+write) misses 1158844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu0.itb.walker 7 # number of demand (read+write) misses 1168844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu0.inst 10289 # number of demand (read+write) misses 1178844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu0.data 108434 # number of demand (read+write) misses 1188844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu1.dtb.walker 21 # number of demand (read+write) misses 1198844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu1.itb.walker 13 # number of demand (read+write) misses 1208844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu1.inst 5094 # number of demand (read+write) misses 1218844SAli.Saidi@ARM.comsystem.l2c.demand_misses::cpu1.data 58915 # number of demand (read+write) misses 1228844SAli.Saidi@ARM.comsystem.l2c.demand_misses::total 182784 # number of demand (read+write) misses 1238844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu0.dtb.walker 11 # number of overall misses 1248844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu0.itb.walker 7 # number of overall misses 1258844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu0.inst 10289 # number of overall misses 1268844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu0.data 108434 # number of overall misses 1278844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu1.dtb.walker 21 # number of overall misses 1288844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu1.itb.walker 13 # number of overall misses 1298844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu1.inst 5094 # number of overall misses 1308844SAli.Saidi@ARM.comsystem.l2c.overall_misses::cpu1.data 58915 # number of overall misses 1318844SAli.Saidi@ARM.comsystem.l2c.overall_misses::total 182784 # number of overall misses 1328844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu0.dtb.walker 5062 # number of ReadReq accesses(hits+misses) 1338844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu0.itb.walker 2163 # number of ReadReq accesses(hits+misses) 1348844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu0.inst 503308 # number of ReadReq accesses(hits+misses) 1358844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu0.data 222557 # number of ReadReq accesses(hits+misses) 1368844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu1.dtb.walker 4144 # number of ReadReq accesses(hits+misses) 1378844SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu1.itb.walker 1603 # number of ReadReq accesses(hits+misses) 1388911SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu1.inst 373205 # number of ReadReq accesses(hits+misses) 1398911SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::cpu1.data 141837 # number of ReadReq accesses(hits+misses) 1408911SAli.Saidi@ARM.comsystem.l2c.ReadReq_accesses::total 1253879 # number of ReadReq accesses(hits+misses) 1418911SAli.Saidi@ARM.comsystem.l2c.Writeback_accesses::writebacks 580462 # number of Writeback accesses(hits+misses) 1428911SAli.Saidi@ARM.comsystem.l2c.Writeback_accesses::total 580462 # number of Writeback accesses(hits+misses) 1438844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_accesses::cpu0.data 7125 # number of UpgradeReq accesses(hits+misses) 1448844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_accesses::cpu1.data 4015 # number of UpgradeReq accesses(hits+misses) 1458844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_accesses::total 11140 # number of UpgradeReq accesses(hits+misses) 1468844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_accesses::cpu0.data 938 # number of SCUpgradeReq accesses(hits+misses) 1478844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_accesses::cpu1.data 733 # number of SCUpgradeReq accesses(hits+misses) 1488844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_accesses::total 1671 # number of SCUpgradeReq accesses(hits+misses) 1498844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_accesses::cpu0.data 163879 # number of ReadExReq accesses(hits+misses) 1508844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_accesses::cpu1.data 86582 # number of ReadExReq accesses(hits+misses) 1518844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_accesses::total 250461 # number of ReadExReq accesses(hits+misses) 1528844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu0.dtb.walker 5062 # number of demand (read+write) accesses 1538844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu0.itb.walker 2163 # number of demand (read+write) accesses 1548844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu0.inst 503308 # number of demand (read+write) accesses 1558844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu0.data 386436 # number of demand (read+write) accesses 1568844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu1.dtb.walker 4144 # number of demand (read+write) accesses 1578844SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu1.itb.walker 1603 # number of demand (read+write) accesses 1588911SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu1.inst 373205 # number of demand (read+write) accesses 1598911SAli.Saidi@ARM.comsystem.l2c.demand_accesses::cpu1.data 228419 # number of demand (read+write) accesses 1608911SAli.Saidi@ARM.comsystem.l2c.demand_accesses::total 1504340 # number of demand (read+write) accesses 1618844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu0.dtb.walker 5062 # number of overall (read+write) accesses 1628844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu0.itb.walker 2163 # number of overall (read+write) accesses 1638844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu0.inst 503308 # number of overall (read+write) accesses 1648844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu0.data 386436 # number of overall (read+write) accesses 1658844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu1.dtb.walker 4144 # number of overall (read+write) accesses 1668844SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu1.itb.walker 1603 # number of overall (read+write) accesses 1678911SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu1.inst 373205 # number of overall (read+write) accesses 1688911SAli.Saidi@ARM.comsystem.l2c.overall_accesses::cpu1.data 228419 # number of overall (read+write) accesses 1698911SAli.Saidi@ARM.comsystem.l2c.overall_accesses::total 1504340 # number of overall (read+write) accesses 1708844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu0.dtb.walker 0.002173 # miss rate for ReadReq accesses 1718844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu0.itb.walker 0.003236 # miss rate for ReadReq accesses 1728844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu0.inst 0.020443 # miss rate for ReadReq accesses 1738844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu0.data 0.042173 # miss rate for ReadReq accesses 1748844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu1.dtb.walker 0.005068 # miss rate for ReadReq accesses 1758844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu1.itb.walker 0.008110 # miss rate for ReadReq accesses 1768844SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu1.inst 0.013649 # miss rate for ReadReq accesses 1778911SAli.Saidi@ARM.comsystem.l2c.ReadReq_miss_rate::cpu1.data 0.071420 # miss rate for ReadReq accesses 1788844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_miss_rate::cpu0.data 0.891088 # miss rate for UpgradeReq accesses 1798844SAli.Saidi@ARM.comsystem.l2c.UpgradeReq_miss_rate::cpu1.data 0.869738 # miss rate for UpgradeReq accesses 1808844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.843284 # miss rate for SCUpgradeReq accesses 1818844SAli.Saidi@ARM.comsystem.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.724420 # miss rate for SCUpgradeReq accesses 1828844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_miss_rate::cpu0.data 0.604397 # miss rate for ReadExReq accesses 1838844SAli.Saidi@ARM.comsystem.l2c.ReadExReq_miss_rate::cpu1.data 0.563454 # miss rate for ReadExReq accesses 1848844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu0.dtb.walker 0.002173 # miss rate for demand accesses 1858844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu0.itb.walker 0.003236 # miss rate for demand accesses 1868844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu0.inst 0.020443 # miss rate for demand accesses 1878844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu0.data 0.280600 # miss rate for demand accesses 1888844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu1.dtb.walker 0.005068 # miss rate for demand accesses 1898844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu1.itb.walker 0.008110 # miss rate for demand accesses 1908844SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu1.inst 0.013649 # miss rate for demand accesses 1918911SAli.Saidi@ARM.comsystem.l2c.demand_miss_rate::cpu1.data 0.257925 # miss rate for demand accesses 1928844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu0.dtb.walker 0.002173 # miss rate for overall accesses 1938844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu0.itb.walker 0.003236 # miss rate for overall accesses 1948844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu0.inst 0.020443 # miss rate for overall accesses 1958844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu0.data 0.280600 # miss rate for overall accesses 1968844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu1.dtb.walker 0.005068 # miss rate for overall accesses 1978844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu1.itb.walker 0.008110 # miss rate for overall accesses 1988844SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu1.inst 0.013649 # miss rate for overall accesses 1998911SAli.Saidi@ARM.comsystem.l2c.overall_miss_rate::cpu1.data 0.257925 # miss rate for overall accesses 2008844SAli.Saidi@ARM.comsystem.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 2018844SAli.Saidi@ARM.comsystem.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 2028844SAli.Saidi@ARM.comsystem.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 2038844SAli.Saidi@ARM.comsystem.l2c.blocked::no_targets 0 # number of cycles access was blocked 2048844SAli.Saidi@ARM.comsystem.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 2058844SAli.Saidi@ARM.comsystem.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 2068844SAli.Saidi@ARM.comsystem.l2c.fast_writes 0 # number of fast writes performed 2078844SAli.Saidi@ARM.comsystem.l2c.cache_copies 0 # number of cache copies performed 2088844SAli.Saidi@ARM.comsystem.l2c.writebacks::writebacks 111818 # number of writebacks 2098844SAli.Saidi@ARM.comsystem.l2c.writebacks::total 111818 # number of writebacks 2108844SAli.Saidi@ARM.comsystem.l2c.no_allocate_misses 0 # Number of misses that were no-allocate 2118844SAli.Saidi@ARM.comsystem.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 2128844SAli.Saidi@ARM.comsystem.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 2138844SAli.Saidi@ARM.comsystem.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 2148844SAli.Saidi@ARM.comsystem.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 2158844SAli.Saidi@ARM.comsystem.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 2168844SAli.Saidi@ARM.comsystem.cf0.dma_write_txs 0 # Number of DMA write transactions. 2178844SAli.Saidi@ARM.comsystem.cpu0.dtb.inst_hits 0 # ITB inst hits 2188844SAli.Saidi@ARM.comsystem.cpu0.dtb.inst_misses 0 # ITB inst misses 2198911SAli.Saidi@ARM.comsystem.cpu0.dtb.read_hits 9339290 # DTB read hits 2208844SAli.Saidi@ARM.comsystem.cpu0.dtb.read_misses 5153 # DTB read misses 2218911SAli.Saidi@ARM.comsystem.cpu0.dtb.write_hits 6907877 # DTB write hits 2228844SAli.Saidi@ARM.comsystem.cpu0.dtb.write_misses 1048 # DTB write misses 2238844SAli.Saidi@ARM.comsystem.cpu0.dtb.flush_tlb 4 # Number of times complete TLB was flushed 2248844SAli.Saidi@ARM.comsystem.cpu0.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 2258844SAli.Saidi@ARM.comsystem.cpu0.dtb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 2268844SAli.Saidi@ARM.comsystem.cpu0.dtb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 2278844SAli.Saidi@ARM.comsystem.cpu0.dtb.flush_entries 2247 # Number of entries that have been flushed from TLB 2288844SAli.Saidi@ARM.comsystem.cpu0.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions 2298844SAli.Saidi@ARM.comsystem.cpu0.dtb.prefetch_faults 150 # Number of TLB faults due to prefetch 2308844SAli.Saidi@ARM.comsystem.cpu0.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 2318844SAli.Saidi@ARM.comsystem.cpu0.dtb.perms_faults 248 # Number of TLB faults due to permissions restrictions 2328911SAli.Saidi@ARM.comsystem.cpu0.dtb.read_accesses 9344443 # DTB read accesses 2338911SAli.Saidi@ARM.comsystem.cpu0.dtb.write_accesses 6908925 # DTB write accesses 2348844SAli.Saidi@ARM.comsystem.cpu0.dtb.inst_accesses 0 # ITB inst accesses 2358911SAli.Saidi@ARM.comsystem.cpu0.dtb.hits 16247167 # DTB hits 2368844SAli.Saidi@ARM.comsystem.cpu0.dtb.misses 6201 # DTB misses 2378911SAli.Saidi@ARM.comsystem.cpu0.dtb.accesses 16253368 # DTB accesses 2388911SAli.Saidi@ARM.comsystem.cpu0.itb.inst_hits 34822572 # ITB inst hits 2398844SAli.Saidi@ARM.comsystem.cpu0.itb.inst_misses 2978 # ITB inst misses 2408844SAli.Saidi@ARM.comsystem.cpu0.itb.read_hits 0 # DTB read hits 2418844SAli.Saidi@ARM.comsystem.cpu0.itb.read_misses 0 # DTB read misses 2428844SAli.Saidi@ARM.comsystem.cpu0.itb.write_hits 0 # DTB write hits 2438844SAli.Saidi@ARM.comsystem.cpu0.itb.write_misses 0 # DTB write misses 2448844SAli.Saidi@ARM.comsystem.cpu0.itb.flush_tlb 4 # Number of times complete TLB was flushed 2458844SAli.Saidi@ARM.comsystem.cpu0.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 2468844SAli.Saidi@ARM.comsystem.cpu0.itb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 2478844SAli.Saidi@ARM.comsystem.cpu0.itb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 2488844SAli.Saidi@ARM.comsystem.cpu0.itb.flush_entries 1462 # Number of entries that have been flushed from TLB 2498844SAli.Saidi@ARM.comsystem.cpu0.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 2508844SAli.Saidi@ARM.comsystem.cpu0.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 2518844SAli.Saidi@ARM.comsystem.cpu0.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 2528844SAli.Saidi@ARM.comsystem.cpu0.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 2538844SAli.Saidi@ARM.comsystem.cpu0.itb.read_accesses 0 # DTB read accesses 2548844SAli.Saidi@ARM.comsystem.cpu0.itb.write_accesses 0 # DTB write accesses 2558911SAli.Saidi@ARM.comsystem.cpu0.itb.inst_accesses 34825550 # ITB inst accesses 2568911SAli.Saidi@ARM.comsystem.cpu0.itb.hits 34822572 # DTB hits 2578844SAli.Saidi@ARM.comsystem.cpu0.itb.misses 2978 # DTB misses 2588911SAli.Saidi@ARM.comsystem.cpu0.itb.accesses 34825550 # DTB accesses 2598844SAli.Saidi@ARM.comsystem.cpu0.numCycles 4823340800 # number of cpu cycles simulated 2608844SAli.Saidi@ARM.comsystem.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 2618844SAli.Saidi@ARM.comsystem.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 2628911SAli.Saidi@ARM.comsystem.cpu0.committedInsts 34068123 # Number of instructions committed 2638911SAli.Saidi@ARM.comsystem.cpu0.committedOps 44975817 # Number of ops (including micro ops) committed 2648911SAli.Saidi@ARM.comsystem.cpu0.num_int_alu_accesses 39858141 # Number of integer alu accesses 2658844SAli.Saidi@ARM.comsystem.cpu0.num_fp_alu_accesses 4945 # Number of float alu accesses 2668844SAli.Saidi@ARM.comsystem.cpu0.num_func_calls 1311755 # number of times a function call or return occured 2678911SAli.Saidi@ARM.comsystem.cpu0.num_conditional_control_insts 4519198 # number of instructions that are conditional controls 2688911SAli.Saidi@ARM.comsystem.cpu0.num_int_insts 39858141 # number of integer instructions 2698844SAli.Saidi@ARM.comsystem.cpu0.num_fp_insts 4945 # number of float instructions 2708911SAli.Saidi@ARM.comsystem.cpu0.num_int_register_reads 202125837 # number of times the integer registers were read 2718911SAli.Saidi@ARM.comsystem.cpu0.num_int_register_writes 42204153 # number of times the integer registers were written 2728844SAli.Saidi@ARM.comsystem.cpu0.num_fp_register_reads 3641 # number of times the floating registers were read 2738844SAli.Saidi@ARM.comsystem.cpu0.num_fp_register_writes 1308 # number of times the floating registers were written 2748911SAli.Saidi@ARM.comsystem.cpu0.num_mem_refs 17030949 # number of memory refs 2758911SAli.Saidi@ARM.comsystem.cpu0.num_load_insts 9786551 # Number of load instructions 2768911SAli.Saidi@ARM.comsystem.cpu0.num_store_insts 7244398 # Number of store instructions 2778911SAli.Saidi@ARM.comsystem.cpu0.num_idle_cycles 4777543048.852804 # Number of idle cycles 2788911SAli.Saidi@ARM.comsystem.cpu0.num_busy_cycles 45797751.147196 # Number of busy cycles 2798844SAli.Saidi@ARM.comsystem.cpu0.not_idle_fraction 0.009495 # Percentage of non-idle cycles 2808844SAli.Saidi@ARM.comsystem.cpu0.idle_fraction 0.990505 # Percentage of idle cycles 2818844SAli.Saidi@ARM.comsystem.cpu0.kern.inst.arm 0 # number of arm instructions executed 2828844SAli.Saidi@ARM.comsystem.cpu0.kern.inst.quiesce 59311 # number of quiesce instructions executed 2838844SAli.Saidi@ARM.comsystem.cpu0.icache.replacements 504460 # number of replacements 2848844SAli.Saidi@ARM.comsystem.cpu0.icache.tagsinuse 511.627588 # Cycle average of tags in use 2858911SAli.Saidi@ARM.comsystem.cpu0.icache.total_refs 34319175 # Total number of references to valid blocks. 2868844SAli.Saidi@ARM.comsystem.cpu0.icache.sampled_refs 504972 # Sample count of references to valid blocks. 2878911SAli.Saidi@ARM.comsystem.cpu0.icache.avg_refs 67.962531 # Average number of references to valid blocks. 2888844SAli.Saidi@ARM.comsystem.cpu0.icache.warmup_cycle 64519524000 # Cycle when the warmup percentage was hit. 2898844SAli.Saidi@ARM.comsystem.cpu0.icache.occ_blocks::cpu0.inst 511.627588 # Average occupied blocks per requestor 2908844SAli.Saidi@ARM.comsystem.cpu0.icache.occ_percent::cpu0.inst 0.999273 # Average percentage of cache occupancy 2918844SAli.Saidi@ARM.comsystem.cpu0.icache.occ_percent::total 0.999273 # Average percentage of cache occupancy 2928911SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_hits::cpu0.inst 34319175 # number of ReadReq hits 2938911SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_hits::total 34319175 # number of ReadReq hits 2948911SAli.Saidi@ARM.comsystem.cpu0.icache.demand_hits::cpu0.inst 34319175 # number of demand (read+write) hits 2958911SAli.Saidi@ARM.comsystem.cpu0.icache.demand_hits::total 34319175 # number of demand (read+write) hits 2968911SAli.Saidi@ARM.comsystem.cpu0.icache.overall_hits::cpu0.inst 34319175 # number of overall hits 2978911SAli.Saidi@ARM.comsystem.cpu0.icache.overall_hits::total 34319175 # number of overall hits 2988844SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_misses::cpu0.inst 504973 # number of ReadReq misses 2998844SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_misses::total 504973 # number of ReadReq misses 3008844SAli.Saidi@ARM.comsystem.cpu0.icache.demand_misses::cpu0.inst 504973 # number of demand (read+write) misses 3018844SAli.Saidi@ARM.comsystem.cpu0.icache.demand_misses::total 504973 # number of demand (read+write) misses 3028844SAli.Saidi@ARM.comsystem.cpu0.icache.overall_misses::cpu0.inst 504973 # number of overall misses 3038844SAli.Saidi@ARM.comsystem.cpu0.icache.overall_misses::total 504973 # number of overall misses 3048911SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_accesses::cpu0.inst 34824148 # number of ReadReq accesses(hits+misses) 3058911SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_accesses::total 34824148 # number of ReadReq accesses(hits+misses) 3068911SAli.Saidi@ARM.comsystem.cpu0.icache.demand_accesses::cpu0.inst 34824148 # number of demand (read+write) accesses 3078911SAli.Saidi@ARM.comsystem.cpu0.icache.demand_accesses::total 34824148 # number of demand (read+write) accesses 3088911SAli.Saidi@ARM.comsystem.cpu0.icache.overall_accesses::cpu0.inst 34824148 # number of overall (read+write) accesses 3098911SAli.Saidi@ARM.comsystem.cpu0.icache.overall_accesses::total 34824148 # number of overall (read+write) accesses 3108844SAli.Saidi@ARM.comsystem.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.014501 # miss rate for ReadReq accesses 3118844SAli.Saidi@ARM.comsystem.cpu0.icache.demand_miss_rate::cpu0.inst 0.014501 # miss rate for demand accesses 3128844SAli.Saidi@ARM.comsystem.cpu0.icache.overall_miss_rate::cpu0.inst 0.014501 # miss rate for overall accesses 3138844SAli.Saidi@ARM.comsystem.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 3148844SAli.Saidi@ARM.comsystem.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 3158844SAli.Saidi@ARM.comsystem.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 3168844SAli.Saidi@ARM.comsystem.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 3178844SAli.Saidi@ARM.comsystem.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 3188844SAli.Saidi@ARM.comsystem.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 3198844SAli.Saidi@ARM.comsystem.cpu0.icache.fast_writes 0 # number of fast writes performed 3208844SAli.Saidi@ARM.comsystem.cpu0.icache.cache_copies 0 # number of cache copies performed 3218844SAli.Saidi@ARM.comsystem.cpu0.icache.writebacks::writebacks 24728 # number of writebacks 3228844SAli.Saidi@ARM.comsystem.cpu0.icache.writebacks::total 24728 # number of writebacks 3238844SAli.Saidi@ARM.comsystem.cpu0.icache.no_allocate_misses 0 # Number of misses that were no-allocate 3248844SAli.Saidi@ARM.comsystem.cpu0.dcache.replacements 380107 # number of replacements 3258844SAli.Saidi@ARM.comsystem.cpu0.dcache.tagsinuse 479.716402 # Cycle average of tags in use 3268911SAli.Saidi@ARM.comsystem.cpu0.dcache.total_refs 14708289 # Total number of references to valid blocks. 3278844SAli.Saidi@ARM.comsystem.cpu0.dcache.sampled_refs 380619 # Sample count of references to valid blocks. 3288911SAli.Saidi@ARM.comsystem.cpu0.dcache.avg_refs 38.643076 # Average number of references to valid blocks. 3298844SAli.Saidi@ARM.comsystem.cpu0.dcache.warmup_cycle 22115000 # Cycle when the warmup percentage was hit. 3308844SAli.Saidi@ARM.comsystem.cpu0.dcache.occ_blocks::cpu0.data 479.716402 # Average occupied blocks per requestor 3318844SAli.Saidi@ARM.comsystem.cpu0.dcache.occ_percent::cpu0.data 0.936946 # Average percentage of cache occupancy 3328844SAli.Saidi@ARM.comsystem.cpu0.dcache.occ_percent::total 0.936946 # Average percentage of cache occupancy 3338911SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_hits::cpu0.data 7803298 # number of ReadReq hits 3348911SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_hits::total 7803298 # number of ReadReq hits 3358911SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_hits::cpu0.data 6534060 # number of WriteReq hits 3368911SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_hits::total 6534060 # number of WriteReq hits 3378844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_hits::cpu0.data 172314 # number of LoadLockedReq hits 3388844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_hits::total 172314 # number of LoadLockedReq hits 3398844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_hits::cpu0.data 174866 # number of StoreCondReq hits 3408844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_hits::total 174866 # number of StoreCondReq hits 3418911SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_hits::cpu0.data 14337358 # number of demand (read+write) hits 3428911SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_hits::total 14337358 # number of demand (read+write) hits 3438911SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_hits::cpu0.data 14337358 # number of overall hits 3448911SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_hits::total 14337358 # number of overall hits 3458844SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_misses::cpu0.data 237350 # number of ReadReq misses 3468844SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_misses::total 237350 # number of ReadReq misses 3478844SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_misses::cpu0.data 183580 # number of WriteReq misses 3488844SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_misses::total 183580 # number of WriteReq misses 3498844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_misses::cpu0.data 9878 # number of LoadLockedReq misses 3508844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_misses::total 9878 # number of LoadLockedReq misses 3518844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_misses::cpu0.data 7293 # number of StoreCondReq misses 3528844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_misses::total 7293 # number of StoreCondReq misses 3538844SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_misses::cpu0.data 420930 # number of demand (read+write) misses 3548844SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_misses::total 420930 # number of demand (read+write) misses 3558844SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_misses::cpu0.data 420930 # number of overall misses 3568844SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_misses::total 420930 # number of overall misses 3578911SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_accesses::cpu0.data 8040648 # number of ReadReq accesses(hits+misses) 3588911SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_accesses::total 8040648 # number of ReadReq accesses(hits+misses) 3598911SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_accesses::cpu0.data 6717640 # number of WriteReq accesses(hits+misses) 3608911SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_accesses::total 6717640 # number of WriteReq accesses(hits+misses) 3618844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 182192 # number of LoadLockedReq accesses(hits+misses) 3628844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_accesses::total 182192 # number of LoadLockedReq accesses(hits+misses) 3638844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_accesses::cpu0.data 182159 # number of StoreCondReq accesses(hits+misses) 3648844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_accesses::total 182159 # number of StoreCondReq accesses(hits+misses) 3658911SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_accesses::cpu0.data 14758288 # number of demand (read+write) accesses 3668911SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_accesses::total 14758288 # number of demand (read+write) accesses 3678911SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_accesses::cpu0.data 14758288 # number of overall (read+write) accesses 3688911SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_accesses::total 14758288 # number of overall (read+write) accesses 3698844SAli.Saidi@ARM.comsystem.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.029519 # miss rate for ReadReq accesses 3708844SAli.Saidi@ARM.comsystem.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.027328 # miss rate for WriteReq accesses 3718844SAli.Saidi@ARM.comsystem.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.054218 # miss rate for LoadLockedReq accesses 3728844SAli.Saidi@ARM.comsystem.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.040036 # miss rate for StoreCondReq accesses 3738844SAli.Saidi@ARM.comsystem.cpu0.dcache.demand_miss_rate::cpu0.data 0.028522 # miss rate for demand accesses 3748844SAli.Saidi@ARM.comsystem.cpu0.dcache.overall_miss_rate::cpu0.data 0.028522 # miss rate for overall accesses 3758844SAli.Saidi@ARM.comsystem.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 3768844SAli.Saidi@ARM.comsystem.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 3778844SAli.Saidi@ARM.comsystem.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 3788844SAli.Saidi@ARM.comsystem.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 3798844SAli.Saidi@ARM.comsystem.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 3808844SAli.Saidi@ARM.comsystem.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 3818844SAli.Saidi@ARM.comsystem.cpu0.dcache.fast_writes 0 # number of fast writes performed 3828844SAli.Saidi@ARM.comsystem.cpu0.dcache.cache_copies 0 # number of cache copies performed 3838844SAli.Saidi@ARM.comsystem.cpu0.dcache.writebacks::writebacks 339627 # number of writebacks 3848844SAli.Saidi@ARM.comsystem.cpu0.dcache.writebacks::total 339627 # number of writebacks 3858844SAli.Saidi@ARM.comsystem.cpu0.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 3868844SAli.Saidi@ARM.comsystem.cpu1.dtb.inst_hits 0 # ITB inst hits 3878844SAli.Saidi@ARM.comsystem.cpu1.dtb.inst_misses 0 # ITB inst misses 3888911SAli.Saidi@ARM.comsystem.cpu1.dtb.read_hits 6258240 # DTB read hits 3898844SAli.Saidi@ARM.comsystem.cpu1.dtb.read_misses 2159 # DTB read misses 3908911SAli.Saidi@ARM.comsystem.cpu1.dtb.write_hits 4713968 # DTB write hits 3918844SAli.Saidi@ARM.comsystem.cpu1.dtb.write_misses 1181 # DTB write misses 3928844SAli.Saidi@ARM.comsystem.cpu1.dtb.flush_tlb 4 # Number of times complete TLB was flushed 3938844SAli.Saidi@ARM.comsystem.cpu1.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 3948844SAli.Saidi@ARM.comsystem.cpu1.dtb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 3958844SAli.Saidi@ARM.comsystem.cpu1.dtb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 3968844SAli.Saidi@ARM.comsystem.cpu1.dtb.flush_entries 1498 # Number of entries that have been flushed from TLB 3978844SAli.Saidi@ARM.comsystem.cpu1.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions 3988844SAli.Saidi@ARM.comsystem.cpu1.dtb.prefetch_faults 92 # Number of TLB faults due to prefetch 3998844SAli.Saidi@ARM.comsystem.cpu1.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 4008844SAli.Saidi@ARM.comsystem.cpu1.dtb.perms_faults 204 # Number of TLB faults due to permissions restrictions 4018911SAli.Saidi@ARM.comsystem.cpu1.dtb.read_accesses 6260399 # DTB read accesses 4028911SAli.Saidi@ARM.comsystem.cpu1.dtb.write_accesses 4715149 # DTB write accesses 4038844SAli.Saidi@ARM.comsystem.cpu1.dtb.inst_accesses 0 # ITB inst accesses 4048911SAli.Saidi@ARM.comsystem.cpu1.dtb.hits 10972208 # DTB hits 4058844SAli.Saidi@ARM.comsystem.cpu1.dtb.misses 3340 # DTB misses 4068911SAli.Saidi@ARM.comsystem.cpu1.dtb.accesses 10975548 # DTB accesses 4078911SAli.Saidi@ARM.comsystem.cpu1.itb.inst_hits 27739473 # ITB inst hits 4088844SAli.Saidi@ARM.comsystem.cpu1.itb.inst_misses 1388 # ITB inst misses 4098844SAli.Saidi@ARM.comsystem.cpu1.itb.read_hits 0 # DTB read hits 4108844SAli.Saidi@ARM.comsystem.cpu1.itb.read_misses 0 # DTB read misses 4118844SAli.Saidi@ARM.comsystem.cpu1.itb.write_hits 0 # DTB write hits 4128844SAli.Saidi@ARM.comsystem.cpu1.itb.write_misses 0 # DTB write misses 4138844SAli.Saidi@ARM.comsystem.cpu1.itb.flush_tlb 4 # Number of times complete TLB was flushed 4148844SAli.Saidi@ARM.comsystem.cpu1.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 4158844SAli.Saidi@ARM.comsystem.cpu1.itb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 4168844SAli.Saidi@ARM.comsystem.cpu1.itb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 4178844SAli.Saidi@ARM.comsystem.cpu1.itb.flush_entries 1342 # Number of entries that have been flushed from TLB 4188844SAli.Saidi@ARM.comsystem.cpu1.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 4198844SAli.Saidi@ARM.comsystem.cpu1.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 4208844SAli.Saidi@ARM.comsystem.cpu1.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 4218844SAli.Saidi@ARM.comsystem.cpu1.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 4228844SAli.Saidi@ARM.comsystem.cpu1.itb.read_accesses 0 # DTB read accesses 4238844SAli.Saidi@ARM.comsystem.cpu1.itb.write_accesses 0 # DTB write accesses 4248911SAli.Saidi@ARM.comsystem.cpu1.itb.inst_accesses 27740861 # ITB inst accesses 4258911SAli.Saidi@ARM.comsystem.cpu1.itb.hits 27739473 # DTB hits 4268844SAli.Saidi@ARM.comsystem.cpu1.itb.misses 1388 # DTB misses 4278911SAli.Saidi@ARM.comsystem.cpu1.itb.accesses 27740861 # DTB accesses 4288844SAli.Saidi@ARM.comsystem.cpu1.numCycles 4822838236 # number of cpu cycles simulated 4298844SAli.Saidi@ARM.comsystem.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 4308844SAli.Saidi@ARM.comsystem.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 4318911SAli.Saidi@ARM.comsystem.cpu1.committedInsts 27478934 # Number of instructions committed 4328911SAli.Saidi@ARM.comsystem.cpu1.committedOps 34587730 # Number of ops (including micro ops) committed 4338911SAli.Saidi@ARM.comsystem.cpu1.num_int_alu_accesses 30998282 # Number of integer alu accesses 4348844SAli.Saidi@ARM.comsystem.cpu1.num_fp_alu_accesses 5772 # Number of float alu accesses 4358844SAli.Saidi@ARM.comsystem.cpu1.num_func_calls 758024 # number of times a function call or return occured 4368911SAli.Saidi@ARM.comsystem.cpu1.num_conditional_control_insts 3403316 # number of instructions that are conditional controls 4378911SAli.Saidi@ARM.comsystem.cpu1.num_int_insts 30998282 # number of integer instructions 4388844SAli.Saidi@ARM.comsystem.cpu1.num_fp_insts 5772 # number of float instructions 4398911SAli.Saidi@ARM.comsystem.cpu1.num_int_register_reads 156835224 # number of times the integer registers were read 4408911SAli.Saidi@ARM.comsystem.cpu1.num_int_register_writes 33469234 # number of times the integer registers were written 4418844SAli.Saidi@ARM.comsystem.cpu1.num_fp_register_reads 3980 # number of times the floating registers were read 4428844SAli.Saidi@ARM.comsystem.cpu1.num_fp_register_writes 1792 # number of times the floating registers were written 4438911SAli.Saidi@ARM.comsystem.cpu1.num_mem_refs 11415851 # number of memory refs 4448911SAli.Saidi@ARM.comsystem.cpu1.num_load_insts 6479004 # Number of load instructions 4458911SAli.Saidi@ARM.comsystem.cpu1.num_store_insts 4936847 # Number of store instructions 4468911SAli.Saidi@ARM.comsystem.cpu1.num_idle_cycles 4787960139.182108 # Number of idle cycles 4478911SAli.Saidi@ARM.comsystem.cpu1.num_busy_cycles 34878096.817892 # Number of busy cycles 4488844SAli.Saidi@ARM.comsystem.cpu1.not_idle_fraction 0.007232 # Percentage of non-idle cycles 4498844SAli.Saidi@ARM.comsystem.cpu1.idle_fraction 0.992768 # Percentage of idle cycles 4508844SAli.Saidi@ARM.comsystem.cpu1.kern.inst.arm 0 # number of arm instructions executed 4518844SAli.Saidi@ARM.comsystem.cpu1.kern.inst.quiesce 33011 # number of quiesce instructions executed 4528911SAli.Saidi@ARM.comsystem.cpu1.icache.replacements 374408 # number of replacements 4538844SAli.Saidi@ARM.comsystem.cpu1.icache.tagsinuse 498.143079 # Cycle average of tags in use 4548911SAli.Saidi@ARM.comsystem.cpu1.icache.total_refs 27365609 # Total number of references to valid blocks. 4558911SAli.Saidi@ARM.comsystem.cpu1.icache.sampled_refs 374920 # Sample count of references to valid blocks. 4568911SAli.Saidi@ARM.comsystem.cpu1.icache.avg_refs 72.990529 # Average number of references to valid blocks. 4578911SAli.Saidi@ARM.comsystem.cpu1.icache.warmup_cycle 69956153000 # Cycle when the warmup percentage was hit. 4588844SAli.Saidi@ARM.comsystem.cpu1.icache.occ_blocks::cpu1.inst 498.143079 # Average occupied blocks per requestor 4598844SAli.Saidi@ARM.comsystem.cpu1.icache.occ_percent::cpu1.inst 0.972936 # Average percentage of cache occupancy 4608844SAli.Saidi@ARM.comsystem.cpu1.icache.occ_percent::total 0.972936 # Average percentage of cache occupancy 4618911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_hits::cpu1.inst 27365609 # number of ReadReq hits 4628911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_hits::total 27365609 # number of ReadReq hits 4638911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_hits::cpu1.inst 27365609 # number of demand (read+write) hits 4648911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_hits::total 27365609 # number of demand (read+write) hits 4658911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_hits::cpu1.inst 27365609 # number of overall hits 4668911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_hits::total 27365609 # number of overall hits 4678911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_misses::cpu1.inst 374922 # number of ReadReq misses 4688911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_misses::total 374922 # number of ReadReq misses 4698911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_misses::cpu1.inst 374922 # number of demand (read+write) misses 4708911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_misses::total 374922 # number of demand (read+write) misses 4718911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_misses::cpu1.inst 374922 # number of overall misses 4728911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_misses::total 374922 # number of overall misses 4738911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_accesses::cpu1.inst 27740531 # number of ReadReq accesses(hits+misses) 4748911SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_accesses::total 27740531 # number of ReadReq accesses(hits+misses) 4758911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_accesses::cpu1.inst 27740531 # number of demand (read+write) accesses 4768911SAli.Saidi@ARM.comsystem.cpu1.icache.demand_accesses::total 27740531 # number of demand (read+write) accesses 4778911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_accesses::cpu1.inst 27740531 # number of overall (read+write) accesses 4788911SAli.Saidi@ARM.comsystem.cpu1.icache.overall_accesses::total 27740531 # number of overall (read+write) accesses 4798844SAli.Saidi@ARM.comsystem.cpu1.icache.ReadReq_miss_rate::cpu1.inst 0.013515 # miss rate for ReadReq accesses 4808844SAli.Saidi@ARM.comsystem.cpu1.icache.demand_miss_rate::cpu1.inst 0.013515 # miss rate for demand accesses 4818844SAli.Saidi@ARM.comsystem.cpu1.icache.overall_miss_rate::cpu1.inst 0.013515 # miss rate for overall accesses 4828844SAli.Saidi@ARM.comsystem.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 4838844SAli.Saidi@ARM.comsystem.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 4848844SAli.Saidi@ARM.comsystem.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 4858844SAli.Saidi@ARM.comsystem.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 4868844SAli.Saidi@ARM.comsystem.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 4878844SAli.Saidi@ARM.comsystem.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 4888844SAli.Saidi@ARM.comsystem.cpu1.icache.fast_writes 0 # number of fast writes performed 4898844SAli.Saidi@ARM.comsystem.cpu1.icache.cache_copies 0 # number of cache copies performed 4908844SAli.Saidi@ARM.comsystem.cpu1.icache.writebacks::writebacks 13905 # number of writebacks 4918844SAli.Saidi@ARM.comsystem.cpu1.icache.writebacks::total 13905 # number of writebacks 4928844SAli.Saidi@ARM.comsystem.cpu1.icache.no_allocate_misses 0 # Number of misses that were no-allocate 4938911SAli.Saidi@ARM.comsystem.cpu1.dcache.replacements 247435 # number of replacements 4948911SAli.Saidi@ARM.comsystem.cpu1.dcache.tagsinuse 444.903487 # Cycle average of tags in use 4958911SAli.Saidi@ARM.comsystem.cpu1.dcache.total_refs 9876841 # Total number of references to valid blocks. 4968911SAli.Saidi@ARM.comsystem.cpu1.dcache.sampled_refs 247806 # Sample count of references to valid blocks. 4978911SAli.Saidi@ARM.comsystem.cpu1.dcache.avg_refs 39.857150 # Average number of references to valid blocks. 4988911SAli.Saidi@ARM.comsystem.cpu1.dcache.warmup_cycle 69253216000 # Cycle when the warmup percentage was hit. 4998911SAli.Saidi@ARM.comsystem.cpu1.dcache.occ_blocks::cpu1.data 444.903487 # Average occupied blocks per requestor 5008844SAli.Saidi@ARM.comsystem.cpu1.dcache.occ_percent::cpu1.data 0.868952 # Average percentage of cache occupancy 5018844SAli.Saidi@ARM.comsystem.cpu1.dcache.occ_percent::total 0.868952 # Average percentage of cache occupancy 5028911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_hits::cpu1.data 5955982 # number of ReadReq hits 5038911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_hits::total 5955982 # number of ReadReq hits 5048911SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_hits::cpu1.data 3777044 # number of WriteReq hits 5058911SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_hits::total 3777044 # number of WriteReq hits 5068844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_hits::cpu1.data 59593 # number of LoadLockedReq hits 5078844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_hits::total 59593 # number of LoadLockedReq hits 5088844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_hits::cpu1.data 60090 # number of StoreCondReq hits 5098844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_hits::total 60090 # number of StoreCondReq hits 5108911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_hits::cpu1.data 9733026 # number of demand (read+write) hits 5118911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_hits::total 9733026 # number of demand (read+write) hits 5128911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_hits::cpu1.data 9733026 # number of overall hits 5138911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_hits::total 9733026 # number of overall hits 5148911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_misses::cpu1.data 165800 # number of ReadReq misses 5158911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_misses::total 165800 # number of ReadReq misses 5168844SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_misses::cpu1.data 111467 # number of WriteReq misses 5178844SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_misses::total 111467 # number of WriteReq misses 5188844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_misses::cpu1.data 10725 # number of LoadLockedReq misses 5198844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_misses::total 10725 # number of LoadLockedReq misses 5208844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_misses::cpu1.data 10198 # number of StoreCondReq misses 5218844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_misses::total 10198 # number of StoreCondReq misses 5228911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_misses::cpu1.data 277267 # number of demand (read+write) misses 5238911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_misses::total 277267 # number of demand (read+write) misses 5248911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_misses::cpu1.data 277267 # number of overall misses 5258911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_misses::total 277267 # number of overall misses 5268911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_accesses::cpu1.data 6121782 # number of ReadReq accesses(hits+misses) 5278911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_accesses::total 6121782 # number of ReadReq accesses(hits+misses) 5288911SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_accesses::cpu1.data 3888511 # number of WriteReq accesses(hits+misses) 5298911SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_accesses::total 3888511 # number of WriteReq accesses(hits+misses) 5308844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 70318 # number of LoadLockedReq accesses(hits+misses) 5318844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_accesses::total 70318 # number of LoadLockedReq accesses(hits+misses) 5328844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_accesses::cpu1.data 70288 # number of StoreCondReq accesses(hits+misses) 5338844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_accesses::total 70288 # number of StoreCondReq accesses(hits+misses) 5348911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_accesses::cpu1.data 10010293 # number of demand (read+write) accesses 5358911SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_accesses::total 10010293 # number of demand (read+write) accesses 5368911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_accesses::cpu1.data 10010293 # number of overall (read+write) accesses 5378911SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_accesses::total 10010293 # number of overall (read+write) accesses 5388911SAli.Saidi@ARM.comsystem.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.027084 # miss rate for ReadReq accesses 5398844SAli.Saidi@ARM.comsystem.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.028666 # miss rate for WriteReq accesses 5408844SAli.Saidi@ARM.comsystem.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152521 # miss rate for LoadLockedReq accesses 5418844SAli.Saidi@ARM.comsystem.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.145089 # miss rate for StoreCondReq accesses 5428844SAli.Saidi@ARM.comsystem.cpu1.dcache.demand_miss_rate::cpu1.data 0.027698 # miss rate for demand accesses 5438844SAli.Saidi@ARM.comsystem.cpu1.dcache.overall_miss_rate::cpu1.data 0.027698 # miss rate for overall accesses 5448844SAli.Saidi@ARM.comsystem.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 5458844SAli.Saidi@ARM.comsystem.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 5468844SAli.Saidi@ARM.comsystem.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 5478844SAli.Saidi@ARM.comsystem.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 5488844SAli.Saidi@ARM.comsystem.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 5498844SAli.Saidi@ARM.comsystem.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 5508844SAli.Saidi@ARM.comsystem.cpu1.dcache.fast_writes 0 # number of fast writes performed 5518844SAli.Saidi@ARM.comsystem.cpu1.dcache.cache_copies 0 # number of cache copies performed 5528911SAli.Saidi@ARM.comsystem.cpu1.dcache.writebacks::writebacks 202202 # number of writebacks 5538911SAli.Saidi@ARM.comsystem.cpu1.dcache.writebacks::total 202202 # number of writebacks 5548844SAli.Saidi@ARM.comsystem.cpu1.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 5558844SAli.Saidi@ARM.comsystem.iocache.replacements 0 # number of replacements 5568844SAli.Saidi@ARM.comsystem.iocache.tagsinuse 0 # Cycle average of tags in use 5578844SAli.Saidi@ARM.comsystem.iocache.total_refs 0 # Total number of references to valid blocks. 5588844SAli.Saidi@ARM.comsystem.iocache.sampled_refs 0 # Sample count of references to valid blocks. 5598844SAli.Saidi@ARM.comsystem.iocache.avg_refs no_value # Average number of references to valid blocks. 5608844SAli.Saidi@ARM.comsystem.iocache.warmup_cycle 0 # Cycle when the warmup percentage was hit. 5618844SAli.Saidi@ARM.comsystem.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 5628844SAli.Saidi@ARM.comsystem.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 5638844SAli.Saidi@ARM.comsystem.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 5648844SAli.Saidi@ARM.comsystem.iocache.blocked::no_targets 0 # number of cycles access was blocked 5658844SAli.Saidi@ARM.comsystem.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked 5668844SAli.Saidi@ARM.comsystem.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked 5678844SAli.Saidi@ARM.comsystem.iocache.fast_writes 0 # number of fast writes performed 5688844SAli.Saidi@ARM.comsystem.iocache.cache_copies 0 # number of cache copies performed 5698844SAli.Saidi@ARM.comsystem.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 5708844SAli.Saidi@ARM.com 5718844SAli.Saidi@ARM.com---------- End Simulation Statistics ---------- 572