config.ini revision 9348
17893SN/A[root] 27893SN/Atype=Root 37893SN/Achildren=system 48825Snilay@cs.wisc.edufull_system=false 57893SN/Atime_sync_enable=false 67893SN/Atime_sync_period=100000000000 77893SN/Atime_sync_spin_threshold=100000000 87893SN/A 97893SN/A[system] 107893SN/Atype=System 117893SN/Achildren=cpu membus physmem 128825Snilay@cs.wisc.eduboot_osflags=a 139348SAli.Saidi@ARM.comclock=1000 148825Snilay@cs.wisc.eduinit_param=0 158825Snilay@cs.wisc.edukernel= 168825Snilay@cs.wisc.eduload_addr_mask=1099511627775 177893SN/Amem_mode=atomic 188464SN/Amemories=system.physmem 198721SN/Anum_work_ids=16 208825Snilay@cs.wisc.edureadfile= 218825Snilay@cs.wisc.edusymbolfile= 227935SN/Awork_begin_ckpt_count=0 237935SN/Awork_begin_cpu_id_exit=-1 247935SN/Awork_begin_exit_count=0 257935SN/Awork_cpus_ckpt_count=0 267935SN/Awork_end_ckpt_count=0 277935SN/Awork_end_exit_count=0 287935SN/Awork_item_id=-1 298983Snate@binkert.orgsystem_port=system.membus.slave[0] 307893SN/A 317893SN/A[system.cpu] 327893SN/Atype=DerivO3CPU 339348SAli.Saidi@ARM.comchildren=dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload 347893SN/ABTBEntries=4096 357893SN/ABTBTagSize=16 367893SN/ALFSTSize=1024 377893SN/ALQEntries=32 388241SN/ALSQCheckLoads=true 398241SN/ALSQDepCheckShift=4 407893SN/ARASSize=16 417893SN/ASQEntries=32 427893SN/ASSITSize=1024 437893SN/Aactivity=0 447893SN/AbackComSize=5 457893SN/AcachePorts=200 467893SN/Achecker=Null 477893SN/AchoiceCtrBits=2 487893SN/AchoicePredictorSize=8192 497893SN/Aclock=500 507893SN/AcommitToDecodeDelay=1 517893SN/AcommitToFetchDelay=1 527893SN/AcommitToIEWDelay=1 537893SN/AcommitToRenameDelay=1 547893SN/AcommitWidth=8 557893SN/Acpu_id=0 567893SN/AdecodeToFetchDelay=1 577893SN/AdecodeToRenameDelay=1 587893SN/AdecodeWidth=8 597893SN/Adefer_registration=false 607893SN/AdispatchWidth=8 617893SN/Ado_checkpoint_insts=true 628825Snilay@cs.wisc.edudo_quiesce=true 637893SN/Ado_statistics_insts=true 647893SN/Adtb=system.cpu.dtb 657893SN/AfetchToDecodeDelay=1 667893SN/AfetchTrapLatency=1 677893SN/AfetchWidth=8 687893SN/AforwardComSize=5 697893SN/AfuPool=system.cpu.fuPool 707893SN/Afunction_trace=false 717893SN/Afunction_trace_start=0 727893SN/AglobalCtrBits=2 737893SN/AglobalHistoryBits=13 747893SN/AglobalPredictorSize=8192 757893SN/AiewToCommitDelay=1 767893SN/AiewToDecodeDelay=1 777893SN/AiewToFetchDelay=1 787893SN/AiewToRenameDelay=1 797893SN/AinstShiftAmt=2 808825Snilay@cs.wisc.eduinterrupts=system.cpu.interrupts 819348SAli.Saidi@ARM.comisa=system.cpu.isa 827893SN/AissueToExecuteDelay=1 837893SN/AissueWidth=8 847893SN/Aitb=system.cpu.itb 857893SN/AlocalCtrBits=2 867893SN/AlocalHistoryBits=11 877893SN/AlocalHistoryTableSize=2048 887893SN/AlocalPredictorSize=2048 897893SN/Amax_insts_all_threads=0 907893SN/Amax_insts_any_thread=0 917893SN/Amax_loads_all_threads=0 927893SN/Amax_loads_any_thread=0 938728SN/AneedsTSO=true 947893SN/AnumIQEntries=64 957893SN/AnumPhysFloatRegs=256 967893SN/AnumPhysIntRegs=256 977893SN/AnumROBEntries=192 987893SN/AnumRobs=1 997893SN/AnumThreads=1 1007893SN/ApredType=tournament 1018825Snilay@cs.wisc.eduprofile=0 1027893SN/Aprogress_interval=0 1037893SN/ArenameToDecodeDelay=1 1047893SN/ArenameToFetchDelay=1 1057893SN/ArenameToIEWDelay=2 1067893SN/ArenameToROBDelay=1 1077893SN/ArenameWidth=8 1087893SN/AsmtCommitPolicy=RoundRobin 1097893SN/AsmtFetchPolicy=SingleThread 1107893SN/AsmtIQPolicy=Partitioned 1117893SN/AsmtIQThreshold=100 1127893SN/AsmtLSQPolicy=Partitioned 1137893SN/AsmtLSQThreshold=100 1147893SN/AsmtNumFetchingThreads=1 1157893SN/AsmtROBPolicy=Partitioned 1167893SN/AsmtROBThreshold=100 1177893SN/AsquashWidth=8 1188521SN/Astore_set_clear_period=250000 1197893SN/Asystem=system 1207893SN/Atracer=system.cpu.tracer 1217893SN/AtrapLatency=13 1227893SN/AwbDepth=1 1237893SN/AwbWidth=8 1247893SN/Aworkload=system.cpu.workload 1257893SN/Adcache_port=system.cpu.dcache.cpu_side 1267893SN/Aicache_port=system.cpu.icache.cpu_side 1277893SN/A 1287893SN/A[system.cpu.dcache] 1297893SN/Atype=BaseCache 1308983Snate@binkert.orgaddr_ranges=0:18446744073709551615 1317893SN/Aassoc=2 1327893SN/Ablock_size=64 1339348SAli.Saidi@ARM.comclock=500 1347893SN/Aforward_snoops=true 1357893SN/Ahash_delay=1 1369348SAli.Saidi@ARM.comhit_latency=2 1378200SN/Ais_top_level=true 1387893SN/Amax_miss_count=0 1399348SAli.Saidi@ARM.commshrs=4 1407893SN/Aprefetch_on_access=false 1418835SAli.Saidi@ARM.comprefetcher=Null 1427893SN/AprioritizeRequests=false 1437893SN/Arepl=Null 1449348SAli.Saidi@ARM.comresponse_latency=2 1457893SN/Asize=262144 1467893SN/Asubblock_size=0 1478835SAli.Saidi@ARM.comsystem=system 1487893SN/Atgts_per_mshr=20 1497893SN/Atrace_addr=0 1507893SN/Atwo_queue=false 1517893SN/Awrite_buffers=8 1527893SN/Acpu_side=system.cpu.dcache_port 1538983Snate@binkert.orgmem_side=system.cpu.toL2Bus.slave[1] 1547893SN/A 1557893SN/A[system.cpu.dtb] 1567893SN/Atype=X86TLB 1578825Snilay@cs.wisc.educhildren=walker 1587893SN/Asize=64 1598825Snilay@cs.wisc.eduwalker=system.cpu.dtb.walker 1608825Snilay@cs.wisc.edu 1618825Snilay@cs.wisc.edu[system.cpu.dtb.walker] 1628825Snilay@cs.wisc.edutype=X86PagetableWalker 1639348SAli.Saidi@ARM.comclock=500 1648825Snilay@cs.wisc.edusystem=system 1658983Snate@binkert.orgport=system.cpu.toL2Bus.slave[3] 1667893SN/A 1677893SN/A[system.cpu.fuPool] 1687893SN/Atype=FUPool 1697893SN/Achildren=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 1707893SN/AFUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 1717893SN/A 1727893SN/A[system.cpu.fuPool.FUList0] 1737893SN/Atype=FUDesc 1747893SN/Achildren=opList 1757893SN/Acount=6 1767893SN/AopList=system.cpu.fuPool.FUList0.opList 1777893SN/A 1787893SN/A[system.cpu.fuPool.FUList0.opList] 1797893SN/Atype=OpDesc 1807893SN/AissueLat=1 1817893SN/AopClass=IntAlu 1827893SN/AopLat=1 1837893SN/A 1847893SN/A[system.cpu.fuPool.FUList1] 1857893SN/Atype=FUDesc 1867893SN/Achildren=opList0 opList1 1877893SN/Acount=2 1887893SN/AopList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 1897893SN/A 1907893SN/A[system.cpu.fuPool.FUList1.opList0] 1917893SN/Atype=OpDesc 1927893SN/AissueLat=1 1937893SN/AopClass=IntMult 1947893SN/AopLat=3 1957893SN/A 1967893SN/A[system.cpu.fuPool.FUList1.opList1] 1977893SN/Atype=OpDesc 1987893SN/AissueLat=19 1997893SN/AopClass=IntDiv 2007893SN/AopLat=20 2017893SN/A 2027893SN/A[system.cpu.fuPool.FUList2] 2037893SN/Atype=FUDesc 2047893SN/Achildren=opList0 opList1 opList2 2057893SN/Acount=4 2067893SN/AopList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 2077893SN/A 2087893SN/A[system.cpu.fuPool.FUList2.opList0] 2097893SN/Atype=OpDesc 2107893SN/AissueLat=1 2117893SN/AopClass=FloatAdd 2127893SN/AopLat=2 2137893SN/A 2147893SN/A[system.cpu.fuPool.FUList2.opList1] 2157893SN/Atype=OpDesc 2167893SN/AissueLat=1 2177893SN/AopClass=FloatCmp 2187893SN/AopLat=2 2197893SN/A 2207893SN/A[system.cpu.fuPool.FUList2.opList2] 2217893SN/Atype=OpDesc 2227893SN/AissueLat=1 2237893SN/AopClass=FloatCvt 2247893SN/AopLat=2 2257893SN/A 2267893SN/A[system.cpu.fuPool.FUList3] 2277893SN/Atype=FUDesc 2287893SN/Achildren=opList0 opList1 opList2 2297893SN/Acount=2 2307893SN/AopList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 2317893SN/A 2327893SN/A[system.cpu.fuPool.FUList3.opList0] 2337893SN/Atype=OpDesc 2347893SN/AissueLat=1 2357893SN/AopClass=FloatMult 2367893SN/AopLat=4 2377893SN/A 2387893SN/A[system.cpu.fuPool.FUList3.opList1] 2397893SN/Atype=OpDesc 2407893SN/AissueLat=12 2417893SN/AopClass=FloatDiv 2427893SN/AopLat=12 2437893SN/A 2447893SN/A[system.cpu.fuPool.FUList3.opList2] 2457893SN/Atype=OpDesc 2467893SN/AissueLat=24 2477893SN/AopClass=FloatSqrt 2487893SN/AopLat=24 2497893SN/A 2507893SN/A[system.cpu.fuPool.FUList4] 2517893SN/Atype=FUDesc 2527893SN/Achildren=opList 2537893SN/Acount=0 2547893SN/AopList=system.cpu.fuPool.FUList4.opList 2557893SN/A 2567893SN/A[system.cpu.fuPool.FUList4.opList] 2577893SN/Atype=OpDesc 2587893SN/AissueLat=1 2597893SN/AopClass=MemRead 2607893SN/AopLat=1 2617893SN/A 2627893SN/A[system.cpu.fuPool.FUList5] 2637893SN/Atype=FUDesc 2647893SN/Achildren=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 2657893SN/Acount=4 2667893SN/AopList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 2677893SN/A 2687893SN/A[system.cpu.fuPool.FUList5.opList00] 2697893SN/Atype=OpDesc 2707893SN/AissueLat=1 2717893SN/AopClass=SimdAdd 2727893SN/AopLat=1 2737893SN/A 2747893SN/A[system.cpu.fuPool.FUList5.opList01] 2757893SN/Atype=OpDesc 2767893SN/AissueLat=1 2777893SN/AopClass=SimdAddAcc 2787893SN/AopLat=1 2797893SN/A 2807893SN/A[system.cpu.fuPool.FUList5.opList02] 2817893SN/Atype=OpDesc 2827893SN/AissueLat=1 2837893SN/AopClass=SimdAlu 2847893SN/AopLat=1 2857893SN/A 2867893SN/A[system.cpu.fuPool.FUList5.opList03] 2877893SN/Atype=OpDesc 2887893SN/AissueLat=1 2897893SN/AopClass=SimdCmp 2907893SN/AopLat=1 2917893SN/A 2927893SN/A[system.cpu.fuPool.FUList5.opList04] 2937893SN/Atype=OpDesc 2947893SN/AissueLat=1 2957893SN/AopClass=SimdCvt 2967893SN/AopLat=1 2977893SN/A 2987893SN/A[system.cpu.fuPool.FUList5.opList05] 2997893SN/Atype=OpDesc 3007893SN/AissueLat=1 3017893SN/AopClass=SimdMisc 3027893SN/AopLat=1 3037893SN/A 3047893SN/A[system.cpu.fuPool.FUList5.opList06] 3057893SN/Atype=OpDesc 3067893SN/AissueLat=1 3077893SN/AopClass=SimdMult 3087893SN/AopLat=1 3097893SN/A 3107893SN/A[system.cpu.fuPool.FUList5.opList07] 3117893SN/Atype=OpDesc 3127893SN/AissueLat=1 3137893SN/AopClass=SimdMultAcc 3147893SN/AopLat=1 3157893SN/A 3167893SN/A[system.cpu.fuPool.FUList5.opList08] 3177893SN/Atype=OpDesc 3187893SN/AissueLat=1 3197893SN/AopClass=SimdShift 3207893SN/AopLat=1 3217893SN/A 3227893SN/A[system.cpu.fuPool.FUList5.opList09] 3237893SN/Atype=OpDesc 3247893SN/AissueLat=1 3257893SN/AopClass=SimdShiftAcc 3267893SN/AopLat=1 3277893SN/A 3287893SN/A[system.cpu.fuPool.FUList5.opList10] 3297893SN/Atype=OpDesc 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3687893SN/AopLat=1 3697893SN/A 3707893SN/A[system.cpu.fuPool.FUList5.opList17] 3717893SN/Atype=OpDesc 3727893SN/AissueLat=1 3737893SN/AopClass=SimdFloatMult 3747893SN/AopLat=1 3757893SN/A 3767893SN/A[system.cpu.fuPool.FUList5.opList18] 3777893SN/Atype=OpDesc 3787893SN/AissueLat=1 3797893SN/AopClass=SimdFloatMultAcc 3807893SN/AopLat=1 3817893SN/A 3827893SN/A[system.cpu.fuPool.FUList5.opList19] 3837893SN/Atype=OpDesc 3847893SN/AissueLat=1 3857893SN/AopClass=SimdFloatSqrt 3867893SN/AopLat=1 3877893SN/A 3887893SN/A[system.cpu.fuPool.FUList6] 3897893SN/Atype=FUDesc 3907893SN/Achildren=opList 3917893SN/Acount=0 3927893SN/AopList=system.cpu.fuPool.FUList6.opList 3937893SN/A 3947893SN/A[system.cpu.fuPool.FUList6.opList] 3957893SN/Atype=OpDesc 3967893SN/AissueLat=1 3977893SN/AopClass=MemWrite 3987893SN/AopLat=1 3997893SN/A 4007893SN/A[system.cpu.fuPool.FUList7] 4017893SN/Atype=FUDesc 4027893SN/Achildren=opList0 opList1 4037893SN/Acount=4 4047893SN/AopList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 4057893SN/A 4067893SN/A[system.cpu.fuPool.FUList7.opList0] 4077893SN/Atype=OpDesc 4087893SN/AissueLat=1 4097893SN/AopClass=MemRead 4107893SN/AopLat=1 4117893SN/A 4127893SN/A[system.cpu.fuPool.FUList7.opList1] 4137893SN/Atype=OpDesc 4147893SN/AissueLat=1 4157893SN/AopClass=MemWrite 4167893SN/AopLat=1 4177893SN/A 4187893SN/A[system.cpu.fuPool.FUList8] 4197893SN/Atype=FUDesc 4207893SN/Achildren=opList 4217893SN/Acount=1 4227893SN/AopList=system.cpu.fuPool.FUList8.opList 4237893SN/A 4247893SN/A[system.cpu.fuPool.FUList8.opList] 4257893SN/Atype=OpDesc 4267893SN/AissueLat=3 4277893SN/AopClass=IprAccess 4287893SN/AopLat=3 4297893SN/A 4307893SN/A[system.cpu.icache] 4317893SN/Atype=BaseCache 4328983Snate@binkert.orgaddr_ranges=0:18446744073709551615 4337893SN/Aassoc=2 4347893SN/Ablock_size=64 4359348SAli.Saidi@ARM.comclock=500 4367893SN/Aforward_snoops=true 4377893SN/Ahash_delay=1 4389348SAli.Saidi@ARM.comhit_latency=2 4398200SN/Ais_top_level=true 4407893SN/Amax_miss_count=0 4419348SAli.Saidi@ARM.commshrs=4 4427893SN/Aprefetch_on_access=false 4438835SAli.Saidi@ARM.comprefetcher=Null 4447893SN/AprioritizeRequests=false 4457893SN/Arepl=Null 4469348SAli.Saidi@ARM.comresponse_latency=2 4477893SN/Asize=131072 4487893SN/Asubblock_size=0 4498835SAli.Saidi@ARM.comsystem=system 4507893SN/Atgts_per_mshr=20 4517893SN/Atrace_addr=0 4527893SN/Atwo_queue=false 4537893SN/Awrite_buffers=8 4547893SN/Acpu_side=system.cpu.icache_port 4558983Snate@binkert.orgmem_side=system.cpu.toL2Bus.slave[0] 4567893SN/A 4578825Snilay@cs.wisc.edu[system.cpu.interrupts] 4588825Snilay@cs.wisc.edutype=X86LocalApic 4599348SAli.Saidi@ARM.comclock=500 4608825Snilay@cs.wisc.eduint_latency=1000 4618825Snilay@cs.wisc.edupio_addr=2305843009213693952 4629213Snilay@cs.wisc.edupio_latency=100000 4638825Snilay@cs.wisc.edusystem=system 4648983Snate@binkert.orgint_master=system.membus.slave[2] 4658983Snate@binkert.orgint_slave=system.membus.master[2] 4668983Snate@binkert.orgpio=system.membus.master[1] 4678825Snilay@cs.wisc.edu 4689348SAli.Saidi@ARM.com[system.cpu.isa] 4699348SAli.Saidi@ARM.comtype=X86ISA 4709348SAli.Saidi@ARM.com 4717893SN/A[system.cpu.itb] 4727893SN/Atype=X86TLB 4738825Snilay@cs.wisc.educhildren=walker 4747893SN/Asize=64 4758825Snilay@cs.wisc.eduwalker=system.cpu.itb.walker 4768825Snilay@cs.wisc.edu 4778825Snilay@cs.wisc.edu[system.cpu.itb.walker] 4788825Snilay@cs.wisc.edutype=X86PagetableWalker 4799348SAli.Saidi@ARM.comclock=500 4808825Snilay@cs.wisc.edusystem=system 4818983Snate@binkert.orgport=system.cpu.toL2Bus.slave[2] 4827893SN/A 4837893SN/A[system.cpu.l2cache] 4847893SN/Atype=BaseCache 4858983Snate@binkert.orgaddr_ranges=0:18446744073709551615 4869348SAli.Saidi@ARM.comassoc=8 4877893SN/Ablock_size=64 4889348SAli.Saidi@ARM.comclock=500 4897893SN/Aforward_snoops=true 4907893SN/Ahash_delay=1 4919348SAli.Saidi@ARM.comhit_latency=20 4928200SN/Ais_top_level=false 4937893SN/Amax_miss_count=0 4949348SAli.Saidi@ARM.commshrs=20 4957893SN/Aprefetch_on_access=false 4968835SAli.Saidi@ARM.comprefetcher=Null 4977893SN/AprioritizeRequests=false 4987893SN/Arepl=Null 4999348SAli.Saidi@ARM.comresponse_latency=20 5007893SN/Asize=2097152 5017893SN/Asubblock_size=0 5028835SAli.Saidi@ARM.comsystem=system 5039348SAli.Saidi@ARM.comtgts_per_mshr=12 5047893SN/Atrace_addr=0 5057893SN/Atwo_queue=false 5067893SN/Awrite_buffers=8 5078983Snate@binkert.orgcpu_side=system.cpu.toL2Bus.master[0] 5088983Snate@binkert.orgmem_side=system.membus.slave[1] 5097893SN/A 5107893SN/A[system.cpu.toL2Bus] 5119039Sgblack@eecs.umich.edutype=CoherentBus 5127893SN/Ablock_size=64 5139348SAli.Saidi@ARM.comclock=500 5147893SN/Aheader_cycles=1 5157893SN/Ause_default_range=false 5169348SAli.Saidi@ARM.comwidth=32 5178983Snate@binkert.orgmaster=system.cpu.l2cache.cpu_side 5188983Snate@binkert.orgslave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 5197893SN/A 5207893SN/A[system.cpu.tracer] 5217893SN/Atype=ExeTracer 5227893SN/A 5237893SN/A[system.cpu.workload] 5247893SN/Atype=LiveProcess 5257893SN/Acmd=twolf smred 5269150SAli.Saidi@ARM.comcwd=build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing 5277893SN/Aegid=100 5287893SN/Aenv= 5297893SN/Aerrout=cerr 5307893SN/Aeuid=100 5319348SAli.Saidi@ARM.comexecutable=/projects/pd/randd/dist/cpu2000/binaries/x86/linux/twolf 5327893SN/Agid=100 5337893SN/Ainput=cin 5347893SN/Amax_stack_size=67108864 5357893SN/Aoutput=cout 5367893SN/Apid=100 5377893SN/Appid=99 5387893SN/Asimpoint=0 5397893SN/Asystem=system 5407893SN/Auid=100 5417893SN/A 5427893SN/A[system.membus] 5439039Sgblack@eecs.umich.edutype=CoherentBus 5447893SN/Ablock_size=64 5457893SN/Aclock=1000 5467893SN/Aheader_cycles=1 5477893SN/Ause_default_range=false 5489096Sandreas.hansson@arm.comwidth=8 5499150SAli.Saidi@ARM.commaster=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 5508983Snate@binkert.orgslave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 5517893SN/A 5527893SN/A[system.physmem] 5539348SAli.Saidi@ARM.comtype=SimpleDRAM 5549348SAli.Saidi@ARM.comaddr_mapping=openmap 5559348SAli.Saidi@ARM.combanks_per_rank=8 5569348SAli.Saidi@ARM.comclock=1000 5578983Snate@binkert.orgconf_table_reported=false 5588983Snate@binkert.orgin_addr_map=true 5599348SAli.Saidi@ARM.comlines_per_rowbuffer=64 5609348SAli.Saidi@ARM.commem_sched_policy=fcfs 5617893SN/Anull=false 5629348SAli.Saidi@ARM.compage_policy=open 5637893SN/Arange=0:134217727 5649348SAli.Saidi@ARM.comranks_per_channel=2 5659348SAli.Saidi@ARM.comread_buffer_size=32 5669348SAli.Saidi@ARM.comtBURST=4000 5679348SAli.Saidi@ARM.comtCL=14000 5689348SAli.Saidi@ARM.comtRCD=14000 5699348SAli.Saidi@ARM.comtREFI=7800000 5709348SAli.Saidi@ARM.comtRFC=300000 5719348SAli.Saidi@ARM.comtRP=14000 5729348SAli.Saidi@ARM.comtWTR=1000 5739348SAli.Saidi@ARM.comwrite_buffer_size=32 5749348SAli.Saidi@ARM.comwrite_thresh_perc=70 5757893SN/Azero=false 5768983Snate@binkert.orgport=system.membus.master[0] 5777893SN/A 578