simout revision 9620:89aa34e10625 
1Redirecting stdout to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simout
2Redirecting stderr to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simerr
3gem5 Simulator System.  http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Mar 26 2013 15:15:23
7gem5 started Mar 27 2013 03:01:21
8gem5 executing on ribera.cs.wisc.edu
9command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing
10Couldn't unlink  build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sav
11Couldn't unlink  build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sv2
12Global frequency set at 1000000000000 ticks per second
13info: Entering event queue @ 0.  Starting simulation...
14
15TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
16Standard Cell Placement and Global Routing Program
17Authors: Carl Sechen, Bill Swartz
18         Yale University
19info: Increasing stack size by one page.
20  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
21 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
22 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
23 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
24 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
25 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
26 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
27106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
28122 123 124 Exiting @ tick 74157495500 because target called exit()
29