simout revision 11384
111384Ssteve.reinhardt@amd.comRedirecting stdout to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simout 211384Ssteve.reinhardt@amd.comRedirecting stderr to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simerr 38464SN/Agem5 Simulator System. http://gem5.org 48464SN/Agem5 is copyrighted software; use the --copyright option for details. 57860SN/A 611384Ssteve.reinhardt@amd.comgem5 compiled Mar 15 2016 19:53:43 711384Ssteve.reinhardt@amd.comgem5 started Mar 15 2016 20:14:36 811384Ssteve.reinhardt@amd.comgem5 executing on dinar2c11, pid 10702 911384Ssteve.reinhardt@amd.comcommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing -re /home/stever/gem5-public/tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing 1010798Ssteve.reinhardt@amd.com 1110798Ssteve.reinhardt@amd.comCouldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sav 1210798Ssteve.reinhardt@amd.comCouldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sv2 137860SN/AGlobal frequency set at 1000000000000 ticks per second 147860SN/Ainfo: Entering event queue @ 0. Starting simulation... 157860SN/A 167860SN/ATimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988 177860SN/AStandard Cell Placement and Global Routing Program 187860SN/AAuthors: Carl Sechen, Bill Swartz 197860SN/A Yale University 207860SN/Ainfo: Increasing stack size by one page. 217860SN/A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 227860SN/A 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 237860SN/A 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 247860SN/A 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 257860SN/A 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 267860SN/A 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 277860SN/A 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 287860SN/A106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 2911384Ssteve.reinhardt@amd.com122 123 124 Exiting @ tick 85490431000 because target called exit() 30