config.ini revision 10315:9e02c14446bb
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.clk_domain] 39type=SrcClockDomain 40clock=1000 41domain_id=-1 42eventq_index=0 43init_perf_level=0 44voltage_domain=system.voltage_domain 45 46[system.cpu] 47type=MinorCPU 48children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 49branchPred=system.cpu.branchPred 50checker=Null 51clk_domain=system.cpu_clk_domain 52cpu_id=0 53decodeCycleInput=true 54decodeInputBufferSize=3 55decodeInputWidth=2 56decodeToExecuteForwardDelay=1 57do_checkpoint_insts=true 58do_quiesce=true 59do_statistics_insts=true 60dstage2_mmu=system.cpu.dstage2_mmu 61dtb=system.cpu.dtb 62enableIdling=true 63eventq_index=0 64executeAllowEarlyMemoryIssue=true 65executeBranchDelay=1 66executeCommitLimit=2 67executeCycleInput=true 68executeFuncUnits=system.cpu.executeFuncUnits 69executeInputBufferSize=7 70executeInputWidth=2 71executeIssueLimit=2 72executeLSQMaxStoreBufferStoresPerCycle=2 73executeLSQRequestsQueueSize=1 74executeLSQStoreBufferSize=5 75executeLSQTransfersQueueSize=2 76executeMaxAccessesInMemory=2 77executeMemoryCommitLimit=1 78executeMemoryIssueLimit=1 79executeMemoryWidth=0 80executeSetTraceTimeOnCommit=true 81executeSetTraceTimeOnIssue=false 82fetch1FetchLimit=1 83fetch1LineSnapWidth=0 84fetch1LineWidth=0 85fetch1ToFetch2BackwardDelay=1 86fetch1ToFetch2ForwardDelay=1 87fetch2CycleInput=true 88fetch2InputBufferSize=2 89fetch2ToDecodeForwardDelay=1 90function_trace=false 91function_trace_start=0 92interrupts=system.cpu.interrupts 93isa=system.cpu.isa 94istage2_mmu=system.cpu.istage2_mmu 95itb=system.cpu.itb 96max_insts_all_threads=0 97max_insts_any_thread=0 98max_loads_all_threads=0 99max_loads_any_thread=0 100numThreads=1 101profile=0 102progress_interval=0 103simpoint_start_insts= 104socket_id=0 105switched_out=false 106system=system 107tracer=system.cpu.tracer 108workload=system.cpu.workload 109dcache_port=system.cpu.dcache.cpu_side 110icache_port=system.cpu.icache.cpu_side 111 112[system.cpu.branchPred] 113type=BranchPredictor 114BTBEntries=4096 115BTBTagSize=16 116RASSize=16 117choiceCtrBits=2 118choicePredictorSize=8192 119eventq_index=0 120globalCtrBits=2 121globalPredictorSize=8192 122instShiftAmt=2 123localCtrBits=2 124localHistoryTableSize=2048 125localPredictorSize=2048 126numThreads=1 127predType=tournament 128 129[system.cpu.dcache] 130type=BaseCache 131children=tags 132addr_ranges=0:18446744073709551615 133assoc=2 134clk_domain=system.cpu_clk_domain 135eventq_index=0 136forward_snoops=true 137hit_latency=2 138is_top_level=true 139max_miss_count=0 140mshrs=4 141prefetch_on_access=false 142prefetcher=Null 143response_latency=2 144sequential_access=false 145size=262144 146system=system 147tags=system.cpu.dcache.tags 148tgts_per_mshr=20 149two_queue=false 150write_buffers=8 151cpu_side=system.cpu.dcache_port 152mem_side=system.cpu.toL2Bus.slave[1] 153 154[system.cpu.dcache.tags] 155type=LRU 156assoc=2 157block_size=64 158clk_domain=system.cpu_clk_domain 159eventq_index=0 160hit_latency=2 161sequential_access=false 162size=262144 163 164[system.cpu.dstage2_mmu] 165type=ArmStage2MMU 166children=stage2_tlb 167eventq_index=0 168stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 169tlb=system.cpu.dtb 170 171[system.cpu.dstage2_mmu.stage2_tlb] 172type=ArmTLB 173children=walker 174eventq_index=0 175is_stage2=true 176size=32 177walker=system.cpu.dstage2_mmu.stage2_tlb.walker 178 179[system.cpu.dstage2_mmu.stage2_tlb.walker] 180type=ArmTableWalker 181clk_domain=system.cpu_clk_domain 182eventq_index=0 183is_stage2=true 184num_squash_per_cycle=2 185sys=system 186port=system.cpu.toL2Bus.slave[5] 187 188[system.cpu.dtb] 189type=ArmTLB 190children=walker 191eventq_index=0 192is_stage2=false 193size=64 194walker=system.cpu.dtb.walker 195 196[system.cpu.dtb.walker] 197type=ArmTableWalker 198clk_domain=system.cpu_clk_domain 199eventq_index=0 200is_stage2=false 201num_squash_per_cycle=2 202sys=system 203port=system.cpu.toL2Bus.slave[3] 204 205[system.cpu.executeFuncUnits] 206type=MinorFUPool 207children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 208eventq_index=0 209funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 210 211[system.cpu.executeFuncUnits.funcUnits0] 212type=MinorFU 213children=opClasses timings 214cantForwardFromFUIndices= 215eventq_index=0 216issueLat=1 217opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 218opLat=3 219timings=system.cpu.executeFuncUnits.funcUnits0.timings 220 221[system.cpu.executeFuncUnits.funcUnits0.opClasses] 222type=MinorOpClassSet 223children=opClasses 224eventq_index=0 225opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 226 227[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 228type=MinorOpClass 229eventq_index=0 230opClass=IntAlu 231 232[system.cpu.executeFuncUnits.funcUnits0.timings] 233type=MinorFUTiming 234children=opClasses 235description=Int 236eventq_index=0 237extraAssumedLat=0 238extraCommitLat=0 239extraCommitLatExpr=Null 240mask=0 241match=0 242opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 243srcRegsRelativeLats=2 244suppress=false 245 246[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 247type=MinorOpClassSet 248eventq_index=0 249opClasses= 250 251[system.cpu.executeFuncUnits.funcUnits1] 252type=MinorFU 253children=opClasses timings 254cantForwardFromFUIndices= 255eventq_index=0 256issueLat=1 257opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 258opLat=3 259timings=system.cpu.executeFuncUnits.funcUnits1.timings 260 261[system.cpu.executeFuncUnits.funcUnits1.opClasses] 262type=MinorOpClassSet 263children=opClasses 264eventq_index=0 265opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 266 267[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 268type=MinorOpClass 269eventq_index=0 270opClass=IntAlu 271 272[system.cpu.executeFuncUnits.funcUnits1.timings] 273type=MinorFUTiming 274children=opClasses 275description=Int 276eventq_index=0 277extraAssumedLat=0 278extraCommitLat=0 279extraCommitLatExpr=Null 280mask=0 281match=0 282opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 283srcRegsRelativeLats=2 284suppress=false 285 286[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 287type=MinorOpClassSet 288eventq_index=0 289opClasses= 290 291[system.cpu.executeFuncUnits.funcUnits2] 292type=MinorFU 293children=opClasses timings 294cantForwardFromFUIndices= 295eventq_index=0 296issueLat=1 297opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 298opLat=3 299timings=system.cpu.executeFuncUnits.funcUnits2.timings 300 301[system.cpu.executeFuncUnits.funcUnits2.opClasses] 302type=MinorOpClassSet 303children=opClasses 304eventq_index=0 305opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 306 307[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 308type=MinorOpClass 309eventq_index=0 310opClass=IntMult 311 312[system.cpu.executeFuncUnits.funcUnits2.timings] 313type=MinorFUTiming 314children=opClasses 315description=Mul 316eventq_index=0 317extraAssumedLat=0 318extraCommitLat=0 319extraCommitLatExpr=Null 320mask=0 321match=0 322opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 323srcRegsRelativeLats=0 324suppress=false 325 326[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 327type=MinorOpClassSet 328eventq_index=0 329opClasses= 330 331[system.cpu.executeFuncUnits.funcUnits3] 332type=MinorFU 333children=opClasses 334cantForwardFromFUIndices= 335eventq_index=0 336issueLat=9 337opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 338opLat=9 339timings= 340 341[system.cpu.executeFuncUnits.funcUnits3.opClasses] 342type=MinorOpClassSet 343children=opClasses 344eventq_index=0 345opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 346 347[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 348type=MinorOpClass 349eventq_index=0 350opClass=IntDiv 351 352[system.cpu.executeFuncUnits.funcUnits4] 353type=MinorFU 354children=opClasses timings 355cantForwardFromFUIndices= 356eventq_index=0 357issueLat=1 358opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 359opLat=6 360timings=system.cpu.executeFuncUnits.funcUnits4.timings 361 362[system.cpu.executeFuncUnits.funcUnits4.opClasses] 363type=MinorOpClassSet 364children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 365eventq_index=0 366opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 367 368[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 369type=MinorOpClass 370eventq_index=0 371opClass=FloatAdd 372 373[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 374type=MinorOpClass 375eventq_index=0 376opClass=FloatCmp 377 378[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 379type=MinorOpClass 380eventq_index=0 381opClass=FloatCvt 382 383[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 384type=MinorOpClass 385eventq_index=0 386opClass=FloatMult 387 388[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 389type=MinorOpClass 390eventq_index=0 391opClass=FloatDiv 392 393[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 394type=MinorOpClass 395eventq_index=0 396opClass=FloatSqrt 397 398[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 399type=MinorOpClass 400eventq_index=0 401opClass=SimdAdd 402 403[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 404type=MinorOpClass 405eventq_index=0 406opClass=SimdAddAcc 407 408[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 409type=MinorOpClass 410eventq_index=0 411opClass=SimdAlu 412 413[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 414type=MinorOpClass 415eventq_index=0 416opClass=SimdCmp 417 418[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 419type=MinorOpClass 420eventq_index=0 421opClass=SimdCvt 422 423[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 424type=MinorOpClass 425eventq_index=0 426opClass=SimdMisc 427 428[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 429type=MinorOpClass 430eventq_index=0 431opClass=SimdMult 432 433[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 434type=MinorOpClass 435eventq_index=0 436opClass=SimdMultAcc 437 438[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 439type=MinorOpClass 440eventq_index=0 441opClass=SimdShift 442 443[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdShiftAcc 447 448[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdSqrt 452 453[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdFloatAdd 457 458[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdFloatAlu 462 463[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 464type=MinorOpClass 465eventq_index=0 466opClass=SimdFloatCmp 467 468[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 469type=MinorOpClass 470eventq_index=0 471opClass=SimdFloatCvt 472 473[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 474type=MinorOpClass 475eventq_index=0 476opClass=SimdFloatDiv 477 478[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 479type=MinorOpClass 480eventq_index=0 481opClass=SimdFloatMisc 482 483[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 484type=MinorOpClass 485eventq_index=0 486opClass=SimdFloatMult 487 488[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 489type=MinorOpClass 490eventq_index=0 491opClass=SimdFloatMultAcc 492 493[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 494type=MinorOpClass 495eventq_index=0 496opClass=SimdFloatSqrt 497 498[system.cpu.executeFuncUnits.funcUnits4.timings] 499type=MinorFUTiming 500children=opClasses 501description=FloatSimd 502eventq_index=0 503extraAssumedLat=0 504extraCommitLat=0 505extraCommitLatExpr=Null 506mask=0 507match=0 508opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 509srcRegsRelativeLats=2 510suppress=false 511 512[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 513type=MinorOpClassSet 514eventq_index=0 515opClasses= 516 517[system.cpu.executeFuncUnits.funcUnits5] 518type=MinorFU 519children=opClasses timings 520cantForwardFromFUIndices= 521eventq_index=0 522issueLat=1 523opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 524opLat=1 525timings=system.cpu.executeFuncUnits.funcUnits5.timings 526 527[system.cpu.executeFuncUnits.funcUnits5.opClasses] 528type=MinorOpClassSet 529children=opClasses0 opClasses1 530eventq_index=0 531opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 532 533[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 534type=MinorOpClass 535eventq_index=0 536opClass=MemRead 537 538[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 539type=MinorOpClass 540eventq_index=0 541opClass=MemWrite 542 543[system.cpu.executeFuncUnits.funcUnits5.timings] 544type=MinorFUTiming 545children=opClasses 546description=Mem 547eventq_index=0 548extraAssumedLat=2 549extraCommitLat=0 550extraCommitLatExpr=Null 551mask=0 552match=0 553opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 554srcRegsRelativeLats=1 555suppress=false 556 557[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 558type=MinorOpClassSet 559eventq_index=0 560opClasses= 561 562[system.cpu.executeFuncUnits.funcUnits6] 563type=MinorFU 564children=opClasses 565cantForwardFromFUIndices= 566eventq_index=0 567issueLat=1 568opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 569opLat=1 570timings= 571 572[system.cpu.executeFuncUnits.funcUnits6.opClasses] 573type=MinorOpClassSet 574children=opClasses0 opClasses1 575eventq_index=0 576opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 577 578[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 579type=MinorOpClass 580eventq_index=0 581opClass=IprAccess 582 583[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 584type=MinorOpClass 585eventq_index=0 586opClass=InstPrefetch 587 588[system.cpu.icache] 589type=BaseCache 590children=tags 591addr_ranges=0:18446744073709551615 592assoc=2 593clk_domain=system.cpu_clk_domain 594eventq_index=0 595forward_snoops=true 596hit_latency=2 597is_top_level=true 598max_miss_count=0 599mshrs=4 600prefetch_on_access=false 601prefetcher=Null 602response_latency=2 603sequential_access=false 604size=131072 605system=system 606tags=system.cpu.icache.tags 607tgts_per_mshr=20 608two_queue=false 609write_buffers=8 610cpu_side=system.cpu.icache_port 611mem_side=system.cpu.toL2Bus.slave[0] 612 613[system.cpu.icache.tags] 614type=LRU 615assoc=2 616block_size=64 617clk_domain=system.cpu_clk_domain 618eventq_index=0 619hit_latency=2 620sequential_access=false 621size=131072 622 623[system.cpu.interrupts] 624type=ArmInterrupts 625eventq_index=0 626 627[system.cpu.isa] 628type=ArmISA 629eventq_index=0 630fpsid=1090793632 631id_aa64afr0_el1=0 632id_aa64afr1_el1=0 633id_aa64dfr0_el1=1052678 634id_aa64dfr1_el1=0 635id_aa64isar0_el1=0 636id_aa64isar1_el1=0 637id_aa64mmfr0_el1=15728642 638id_aa64mmfr1_el1=0 639id_aa64pfr0_el1=17 640id_aa64pfr1_el1=0 641id_isar0=34607377 642id_isar1=34677009 643id_isar2=555950401 644id_isar3=17899825 645id_isar4=268501314 646id_isar5=0 647id_mmfr0=270536963 648id_mmfr1=0 649id_mmfr2=19070976 650id_mmfr3=34611729 651id_pfr0=49 652id_pfr1=4113 653midr=1091551472 654system=system 655 656[system.cpu.istage2_mmu] 657type=ArmStage2MMU 658children=stage2_tlb 659eventq_index=0 660stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 661tlb=system.cpu.itb 662 663[system.cpu.istage2_mmu.stage2_tlb] 664type=ArmTLB 665children=walker 666eventq_index=0 667is_stage2=true 668size=32 669walker=system.cpu.istage2_mmu.stage2_tlb.walker 670 671[system.cpu.istage2_mmu.stage2_tlb.walker] 672type=ArmTableWalker 673clk_domain=system.cpu_clk_domain 674eventq_index=0 675is_stage2=true 676num_squash_per_cycle=2 677sys=system 678port=system.cpu.toL2Bus.slave[4] 679 680[system.cpu.itb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=false 685size=64 686walker=system.cpu.itb.walker 687 688[system.cpu.itb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691eventq_index=0 692is_stage2=false 693num_squash_per_cycle=2 694sys=system 695port=system.cpu.toL2Bus.slave[2] 696 697[system.cpu.l2cache] 698type=BaseCache 699children=tags 700addr_ranges=0:18446744073709551615 701assoc=8 702clk_domain=system.cpu_clk_domain 703eventq_index=0 704forward_snoops=true 705hit_latency=20 706is_top_level=false 707max_miss_count=0 708mshrs=20 709prefetch_on_access=false 710prefetcher=Null 711response_latency=20 712sequential_access=false 713size=2097152 714system=system 715tags=system.cpu.l2cache.tags 716tgts_per_mshr=12 717two_queue=false 718write_buffers=8 719cpu_side=system.cpu.toL2Bus.master[0] 720mem_side=system.membus.slave[1] 721 722[system.cpu.l2cache.tags] 723type=LRU 724assoc=8 725block_size=64 726clk_domain=system.cpu_clk_domain 727eventq_index=0 728hit_latency=20 729sequential_access=false 730size=2097152 731 732[system.cpu.toL2Bus] 733type=CoherentBus 734clk_domain=system.cpu_clk_domain 735eventq_index=0 736header_cycles=1 737system=system 738use_default_range=false 739width=32 740master=system.cpu.l2cache.cpu_side 741slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 742 743[system.cpu.tracer] 744type=ExeTracer 745eventq_index=0 746 747[system.cpu.workload] 748type=LiveProcess 749cmd=twolf smred 750cwd=build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing 751egid=100 752env= 753errout=cerr 754euid=100 755eventq_index=0 756executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf 757gid=100 758input=cin 759max_stack_size=67108864 760output=cout 761pid=100 762ppid=99 763simpoint=0 764system=system 765uid=100 766 767[system.cpu_clk_domain] 768type=SrcClockDomain 769clock=500 770domain_id=-1 771eventq_index=0 772init_perf_level=0 773voltage_domain=system.voltage_domain 774 775[system.dvfs_handler] 776type=DVFSHandler 777domains= 778enable=false 779eventq_index=0 780sys_clk_domain=system.clk_domain 781transition_latency=100000000 782 783[system.membus] 784type=CoherentBus 785clk_domain=system.clk_domain 786eventq_index=0 787header_cycles=1 788system=system 789use_default_range=false 790width=8 791master=system.physmem.port 792slave=system.system_port system.cpu.l2cache.mem_side 793 794[system.physmem] 795type=DRAMCtrl 796activation_limit=4 797addr_mapping=RoRaBaChCo 798banks_per_rank=8 799burst_length=8 800channels=1 801clk_domain=system.clk_domain 802conf_table_reported=true 803device_bus_width=8 804device_rowbuffer_size=1024 805devices_per_rank=8 806eventq_index=0 807in_addr_map=true 808max_accesses_per_row=16 809mem_sched_policy=frfcfs 810min_writes_per_switch=16 811null=false 812page_policy=open_adaptive 813range=0:134217727 814ranks_per_channel=2 815read_buffer_size=32 816static_backend_latency=10000 817static_frontend_latency=10000 818tBURST=5000 819tCK=1250 820tCL=13750 821tRAS=35000 822tRCD=13750 823tREFI=7800000 824tRFC=260000 825tRP=13750 826tRRD=6000 827tRTP=7500 828tRTW=2500 829tWR=15000 830tWTR=7500 831tXAW=30000 832write_buffer_size=64 833write_high_thresh_perc=85 834write_low_thresh_perc=50 835port=system.membus.master[0] 836 837[system.voltage_domain] 838type=VoltageDomain 839eventq_index=0 840voltage=1.000000 841 842