stats.txt revision 10036:80e84beef3bb
14434Ssaidi@eecs.umich.edu 24434Ssaidi@eecs.umich.edu---------- Begin Simulation Statistics ---------- 34434Ssaidi@eecs.umich.edusim_seconds 0.861538 # Number of seconds simulated 44434Ssaidi@eecs.umich.edusim_ticks 861538200000 # Number of ticks simulated 54434Ssaidi@eecs.umich.edufinal_tick 861538200000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 64434Ssaidi@eecs.umich.edusim_freq 1000000000000 # Frequency of simulated ticks 74434Ssaidi@eecs.umich.eduhost_inst_rate 2414882 # Simulator instruction rate (inst/s) 84434Ssaidi@eecs.umich.eduhost_op_rate 2693979 # Simulator op (including micro ops) rate (op/s) 94434Ssaidi@eecs.umich.eduhost_tick_rate 1346991470 # Simulator tick rate (ticks/s) 104434Ssaidi@eecs.umich.eduhost_mem_usage 238968 # Number of bytes of host memory used 114434Ssaidi@eecs.umich.eduhost_seconds 639.60 # Real time elapsed on the host 124434Ssaidi@eecs.umich.edusim_insts 1544563041 # Number of instructions simulated 134434Ssaidi@eecs.umich.edusim_ops 1723073853 # Number of ops (including micro ops) simulated 144434Ssaidi@eecs.umich.edusystem.voltage_domain.voltage 1 # Voltage in Volts 154434Ssaidi@eecs.umich.edusystem.clk_domain.clock 1000 # Clock period in ticks 164434Ssaidi@eecs.umich.edusystem.physmem.bytes_read::cpu.inst 6178262356 # Number of bytes read from this memory 174434Ssaidi@eecs.umich.edusystem.physmem.bytes_read::cpu.data 1581387671 # Number of bytes read from this memory 184434Ssaidi@eecs.umich.edusystem.physmem.bytes_read::total 7759650027 # Number of bytes read from this memory 194434Ssaidi@eecs.umich.edusystem.physmem.bytes_inst_read::cpu.inst 6178262356 # Number of instructions bytes read from this memory 204434Ssaidi@eecs.umich.edusystem.physmem.bytes_inst_read::total 6178262356 # Number of instructions bytes read from this memory 214434Ssaidi@eecs.umich.edusystem.physmem.bytes_written::cpu.data 624158392 # Number of bytes written to this memory 224434Ssaidi@eecs.umich.edusystem.physmem.bytes_written::total 624158392 # Number of bytes written to this memory 234434Ssaidi@eecs.umich.edusystem.physmem.num_reads::cpu.inst 1544565589 # Number of read requests responded to by this memory 244434Ssaidi@eecs.umich.edusystem.physmem.num_reads::cpu.data 482384187 # Number of read requests responded to by this memory 254434Ssaidi@eecs.umich.edusystem.physmem.num_reads::total 2026949776 # Number of read requests responded to by this memory 264434Ssaidi@eecs.umich.edusystem.physmem.num_writes::cpu.data 172586108 # Number of write requests responded to by this memory 274434Ssaidi@eecs.umich.edusystem.physmem.num_writes::total 172586108 # Number of write requests responded to by this memory 284434Ssaidi@eecs.umich.edusystem.physmem.bw_read::cpu.inst 7171199554 # Total read bandwidth from this memory (bytes/s) 294434Ssaidi@eecs.umich.edusystem.physmem.bw_read::cpu.data 1835539818 # Total read bandwidth from this memory (bytes/s) 304434Ssaidi@eecs.umich.edusystem.physmem.bw_read::total 9006739373 # Total read bandwidth from this memory (bytes/s) 314434Ssaidi@eecs.umich.edusystem.physmem.bw_inst_read::cpu.inst 7171199554 # Instruction read bandwidth from this memory (bytes/s) 324434Ssaidi@eecs.umich.edusystem.physmem.bw_inst_read::total 7171199554 # Instruction read bandwidth from this memory (bytes/s) 334434Ssaidi@eecs.umich.edusystem.physmem.bw_write::cpu.data 724469782 # Write bandwidth from this memory (bytes/s) 344434Ssaidi@eecs.umich.edusystem.physmem.bw_write::total 724469782 # Write bandwidth from this memory (bytes/s) 354434Ssaidi@eecs.umich.edusystem.physmem.bw_total::cpu.inst 7171199554 # Total bandwidth to/from this memory (bytes/s) 364434Ssaidi@eecs.umich.edusystem.physmem.bw_total::cpu.data 2560009600 # Total bandwidth to/from this memory (bytes/s) 374434Ssaidi@eecs.umich.edusystem.physmem.bw_total::total 9731209155 # Total bandwidth to/from this memory (bytes/s) 388706Sandreas.hansson@arm.comsystem.membus.throughput 9731209155 # Throughput (bytes/s) 394434Ssaidi@eecs.umich.edusystem.membus.data_through_bus 8383808419 # Total data (bytes) 404434Ssaidi@eecs.umich.edusystem.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 414434Ssaidi@eecs.umich.edusystem.cpu_clk_domain.clock 500 # Clock period in ticks 424434Ssaidi@eecs.umich.edusystem.cpu.dtb.inst_hits 0 # ITB inst hits 434434Ssaidi@eecs.umich.edusystem.cpu.dtb.inst_misses 0 # ITB inst misses 444434Ssaidi@eecs.umich.edusystem.cpu.dtb.read_hits 0 # DTB read hits 4514020Sgabeblack@google.comsystem.cpu.dtb.read_misses 0 # DTB read misses 464434Ssaidi@eecs.umich.edusystem.cpu.dtb.write_hits 0 # DTB write hits 474434Ssaidi@eecs.umich.edusystem.cpu.dtb.write_misses 0 # DTB write misses 486227Snate@binkert.orgsystem.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 498737Skoansin.tan@gmail.comsystem.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 5014010Sgabeblack@google.comsystem.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 518852Sandreas.hansson@arm.comsystem.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 524434Ssaidi@eecs.umich.edusystem.cpu.dtb.flush_entries 0 # Number of entries that have been flushed from TLB 534434Ssaidi@eecs.umich.edusystem.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions 544434Ssaidi@eecs.umich.edusystem.cpu.dtb.prefetch_faults 0 # Number of TLB faults due to prefetch 554434Ssaidi@eecs.umich.edusystem.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 564434Ssaidi@eecs.umich.edusystem.cpu.dtb.perms_faults 0 # Number of TLB faults due to permissions restrictions 574434Ssaidi@eecs.umich.edusystem.cpu.dtb.read_accesses 0 # DTB read accesses 5814010Sgabeblack@google.comsystem.cpu.dtb.write_accesses 0 # DTB write accesses 594434Ssaidi@eecs.umich.edusystem.cpu.dtb.inst_accesses 0 # ITB inst accesses 604434Ssaidi@eecs.umich.edusystem.cpu.dtb.hits 0 # DTB hits 614434Ssaidi@eecs.umich.edusystem.cpu.dtb.misses 0 # DTB misses 62system.cpu.dtb.accesses 0 # DTB accesses 63system.cpu.itb.inst_hits 0 # ITB inst hits 64system.cpu.itb.inst_misses 0 # ITB inst misses 65system.cpu.itb.read_hits 0 # DTB read hits 66system.cpu.itb.read_misses 0 # DTB read misses 67system.cpu.itb.write_hits 0 # DTB write hits 68system.cpu.itb.write_misses 0 # DTB write misses 69system.cpu.itb.flush_tlb 0 # Number of times complete TLB was flushed 70system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 71system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID 72system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID 73system.cpu.itb.flush_entries 0 # Number of entries that have been flushed from TLB 74system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 75system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 76system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 77system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 78system.cpu.itb.read_accesses 0 # DTB read accesses 79system.cpu.itb.write_accesses 0 # DTB write accesses 80system.cpu.itb.inst_accesses 0 # ITB inst accesses 81system.cpu.itb.hits 0 # DTB hits 82system.cpu.itb.misses 0 # DTB misses 83system.cpu.itb.accesses 0 # DTB accesses 84system.cpu.workload.num_syscalls 46 # Number of system calls 85system.cpu.numCycles 1723076401 # number of cpu cycles simulated 86system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 87system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 88system.cpu.committedInsts 1544563041 # Number of instructions committed 89system.cpu.committedOps 1723073853 # Number of ops (including micro ops) committed 90system.cpu.num_int_alu_accesses 1536941842 # Number of integer alu accesses 91system.cpu.num_fp_alu_accesses 36 # Number of float alu accesses 92system.cpu.num_func_calls 27330256 # number of times a function call or return occured 93system.cpu.num_conditional_control_insts 177498328 # number of instructions that are conditional controls 94system.cpu.num_int_insts 1536941842 # number of integer instructions 95system.cpu.num_fp_insts 36 # number of float instructions 96system.cpu.num_int_register_reads 7861284498 # number of times the integer registers were read 97system.cpu.num_int_register_writes 1675132405 # number of times the integer registers were written 98system.cpu.num_fp_register_reads 24 # number of times the floating registers were read 99system.cpu.num_fp_register_writes 16 # number of times the floating registers were written 100system.cpu.num_mem_refs 660773815 # number of memory refs 101system.cpu.num_load_insts 485926769 # Number of load instructions 102system.cpu.num_store_insts 174847046 # Number of store instructions 103system.cpu.num_idle_cycles 0 # Number of idle cycles 104system.cpu.num_busy_cycles 1723076401 # Number of busy cycles 105system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 106system.cpu.idle_fraction 0 # Percentage of idle cycles 107 108---------- End Simulation Statistics ---------- 109