simout revision 11103
111103Snilay@cs.wisc.eduRedirecting stdout to build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing/simout 211103Snilay@cs.wisc.eduRedirecting stderr to build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing/simerr 310260SAndrew.Bardsley@arm.comgem5 Simulator System. http://gem5.org 410260SAndrew.Bardsley@arm.comgem5 is copyrighted software; use the --copyright option for details. 510260SAndrew.Bardsley@arm.com 611103Snilay@cs.wisc.edugem5 compiled Sep 14 2015 23:29:19 711103Snilay@cs.wisc.edugem5 started Sep 15 2015 03:05:45 811103Snilay@cs.wisc.edugem5 executing on ribera.cs.wisc.edu 911103Snilay@cs.wisc.educommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing 1011103Snilay@cs.wisc.edu 1110260SAndrew.Bardsley@arm.comGlobal frequency set at 1000000000000 ticks per second 1210260SAndrew.Bardsley@arm.cominfo: Entering event queue @ 0. Starting simulation... 1310260SAndrew.Bardsley@arm.cominfo: Increasing stack size by one page. 1411103Snilay@cs.wisc.eduExiting @ tick 56986224500 because target called exit() 15