simout revision 10260
110260SAndrew.Bardsley@arm.comRedirecting stdout to build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing/simout 210260SAndrew.Bardsley@arm.comRedirecting stderr to build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing/simerr 310260SAndrew.Bardsley@arm.comgem5 Simulator System. http://gem5.org 410260SAndrew.Bardsley@arm.comgem5 is copyrighted software; use the --copyright option for details. 510260SAndrew.Bardsley@arm.com 610260SAndrew.Bardsley@arm.comgem5 compiled May 7 2014 10:57:46 710260SAndrew.Bardsley@arm.comgem5 started May 7 2014 17:09:29 810260SAndrew.Bardsley@arm.comgem5 executing on cz3211bhr8 910260SAndrew.Bardsley@arm.comcommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing -re tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/minor-timing 1010260SAndrew.Bardsley@arm.comGlobal frequency set at 1000000000000 ticks per second 1110260SAndrew.Bardsley@arm.com 0: system.cpu.isa: ISA system set to: 0 0xcee8df0 1210260SAndrew.Bardsley@arm.cominfo: Entering event queue @ 0. Starting simulation... 1310260SAndrew.Bardsley@arm.cominfo: Increasing stack size by one page. 1410260SAndrew.Bardsley@arm.comExiting @ tick 64581408500 because target called exit() 15