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8759348SN/Adomains= 8769885SN/Aenable=false 8779885SN/Aeventq_index=0 8789578SN/Asys_clk_domain=system.clk_domain 87910451SN/Atransition_latency=100000000 88010242SN/A 8819578SN/A[system.membus] 88210451SN/Atype=CoherentXBar 8839988SN/Achildren=snoop_filter 8849578SN/Aclk_domain=system.clk_domain 8859348SN/Adefault_p_state=UNDEFINED 88610242SN/Aeventq_index=0 8879578SN/Aforward_latency=4 88810242SN/Afrontend_latency=3 88910451SN/Ap_state_clk_gate_bins=20 89010242SN/Ap_state_clk_gate_max=1000000000000 89110242SN/Ap_state_clk_gate_min=1000 89210242SN/Apoint_of_coherency=true 8939578SN/Apower_model=Null 89410242SN/Aresponse_latency=2 89511680SCurtis.Dunham@arm.comsnoop_filter=system.membus.snoop_filter 89610451SN/Asnoop_response_latency=4 89711680SCurtis.Dunham@arm.comsystem=system 89810451SN/Ause_default_range=false 89910167SN/Awidth=16 90010167SN/Amaster=system.physmem.port 90110167SN/Aslave=system.system_port system.cpu.l2cache.mem_side 9028983SN/A 9033142SN/A[system.membus.snoop_filter] 9049885SN/Atype=SnoopFilter 9059885SN/Aeventq_index=0 9069988SN/Alookup_latency=1 9079885SN/Amax_capacity=8388608 9089885SN/Asystem=system 909 910[system.physmem] 911type=DRAMCtrl 912IDD0=0.055000 913IDD02=0.000000 914IDD2N=0.032000 915IDD2N2=0.000000 916IDD2P0=0.000000 917IDD2P02=0.000000 918IDD2P1=0.032000 919IDD2P12=0.000000 920IDD3N=0.038000 921IDD3N2=0.000000 922IDD3P0=0.000000 923IDD3P02=0.000000 924IDD3P1=0.038000 925IDD3P12=0.000000 926IDD4R=0.157000 927IDD4R2=0.000000 928IDD4W=0.125000 929IDD4W2=0.000000 930IDD5=0.235000 931IDD52=0.000000 932IDD6=0.020000 933IDD62=0.000000 934VDD=1.500000 935VDD2=0.000000 936activation_limit=4 937addr_mapping=RoRaBaCoCh 938bank_groups_per_rank=0 939banks_per_rank=8 940burst_length=8 941channels=1 942clk_domain=system.clk_domain 943conf_table_reported=true 944default_p_state=UNDEFINED 945device_bus_width=8 946device_rowbuffer_size=1024 947device_size=536870912 948devices_per_rank=8 949dll=true 950eventq_index=0 951in_addr_map=true 952kvm_map=true 953max_accesses_per_row=16 954mem_sched_policy=frfcfs 955min_writes_per_switch=16 956null=false 957p_state_clk_gate_bins=20 958p_state_clk_gate_max=1000000000000 959p_state_clk_gate_min=1000 960page_policy=open_adaptive 961power_model=Null 962range=0:134217727:0:0:0:0 963ranks_per_channel=2 964read_buffer_size=32 965static_backend_latency=10000 966static_frontend_latency=10000 967tBURST=5000 968tCCD_L=0 969tCK=1250 970tCL=13750 971tCS=2500 972tRAS=35000 973tRCD=13750 974tREFI=7800000 975tRFC=260000 976tRP=13750 977tRRD=6000 978tRRD_L=0 979tRTP=7500 980tRTW=2500 981tWR=15000 982tWTR=7500 983tXAW=30000 984tXP=6000 985tXPDLL=0 986tXS=270000 987tXSDLL=0 988write_buffer_size=64 989write_high_thresh_perc=85 990write_low_thresh_perc=50 991port=system.membus.master[0] 992 993[system.voltage_domain] 994type=VoltageDomain 995eventq_index=0 996voltage=1.000000 997 998