config.ini revision 9055
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 19readfile= 20symbolfile= 21work_begin_ckpt_count=0 22work_begin_cpu_id_exit=-1 23work_begin_exit_count=0 24work_cpus_ckpt_count=0 25work_end_ckpt_count=0 26work_end_exit_count=0 27work_item_id=-1 28system_port=system.membus.slave[0] 29 30[system.cpu] 31type=TimingSimpleCPU 32children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload 33checker=Null 34clock=500 35cpu_id=0 36defer_registration=false 37do_checkpoint_insts=true 38do_quiesce=true 39do_statistics_insts=true 40dtb=system.cpu.dtb 41function_trace=false 42function_trace_start=0 43interrupts=system.cpu.interrupts 44itb=system.cpu.itb 45max_insts_all_threads=0 46max_insts_any_thread=0 47max_loads_all_threads=0 48max_loads_any_thread=0 49numThreads=1 50phase=0 51profile=0 52progress_interval=0 53system=system 54tracer=system.cpu.tracer 55workload=system.cpu.workload 56dcache_port=system.cpu.dcache.cpu_side 57icache_port=system.cpu.icache.cpu_side 58 59[system.cpu.dcache] 60type=BaseCache 61addr_ranges=0:18446744073709551615 62assoc=2 63block_size=64 64forward_snoops=true 65hash_delay=1 66is_top_level=true 67latency=1000 68max_miss_count=0 69mshrs=10 70prefetch_on_access=false 71prefetcher=Null 72prioritizeRequests=false 73repl=Null 74size=262144 75subblock_size=0 76system=system 77tgts_per_mshr=5 78trace_addr=0 79two_queue=false 80write_buffers=8 81cpu_side=system.cpu.dcache_port 82mem_side=system.cpu.toL2Bus.slave[1] 83 84[system.cpu.dtb] 85type=ArmTLB 86children=walker 87size=64 88walker=system.cpu.dtb.walker 89 90[system.cpu.dtb.walker] 91type=ArmTableWalker 92max_backoff=100000 93min_backoff=0 94sys=system 95port=system.cpu.toL2Bus.slave[3] 96 97[system.cpu.icache] 98type=BaseCache 99addr_ranges=0:18446744073709551615 100assoc=2 101block_size=64 102forward_snoops=true 103hash_delay=1 104is_top_level=true 105latency=1000 106max_miss_count=0 107mshrs=10 108prefetch_on_access=false 109prefetcher=Null 110prioritizeRequests=false 111repl=Null 112size=131072 113subblock_size=0 114system=system 115tgts_per_mshr=5 116trace_addr=0 117two_queue=false 118write_buffers=8 119cpu_side=system.cpu.icache_port 120mem_side=system.cpu.toL2Bus.slave[0] 121 122[system.cpu.interrupts] 123type=ArmInterrupts 124 125[system.cpu.itb] 126type=ArmTLB 127children=walker 128size=64 129walker=system.cpu.itb.walker 130 131[system.cpu.itb.walker] 132type=ArmTableWalker 133max_backoff=100000 134min_backoff=0 135sys=system 136port=system.cpu.toL2Bus.slave[2] 137 138[system.cpu.l2cache] 139type=BaseCache 140addr_ranges=0:18446744073709551615 141assoc=2 142block_size=64 143forward_snoops=true 144hash_delay=1 145is_top_level=false 146latency=10000 147max_miss_count=0 148mshrs=10 149prefetch_on_access=false 150prefetcher=Null 151prioritizeRequests=false 152repl=Null 153size=2097152 154subblock_size=0 155system=system 156tgts_per_mshr=5 157trace_addr=0 158two_queue=false 159write_buffers=8 160cpu_side=system.cpu.toL2Bus.master[0] 161mem_side=system.membus.slave[1] 162 163[system.cpu.toL2Bus] 164type=CoherentBus 165block_size=64 166clock=1000 167header_cycles=1 168use_default_range=false 169width=64 170master=system.cpu.l2cache.cpu_side 171slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 172 173[system.cpu.tracer] 174type=ExeTracer 175 176[system.cpu.workload] 177type=LiveProcess 178cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 179cwd=build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing 180egid=100 181env= 182errout=cerr 183euid=100 184executable=/dist/m5/cpu2000/binaries/arm/linux/eon 185gid=100 186input=cin 187max_stack_size=67108864 188output=cout 189pid=100 190ppid=99 191simpoint=0 192system=system 193uid=100 194 195[system.membus] 196type=CoherentBus 197block_size=64 198clock=1000 199header_cycles=1 200use_default_range=false 201width=64 202master=system.physmem.port[0] 203slave=system.system_port system.cpu.l2cache.mem_side 204 205[system.physmem] 206type=SimpleMemory 207conf_table_reported=false 208file= 209in_addr_map=true 210latency=30000 211latency_var=0 212null=false 213range=0:134217727 214zero=false 215port=system.membus.master[0] 216 217